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1. 发明授权

US6157847A Base station system including parallel interference cancellation processor 有权
标题翻译：基站系统包括并行干扰消除处理器
公开(公告)号：US6157847A
公开(公告)日：2000-12-05
申请号：US342145
申请日：1999-06-29
申请人： R. Michael Buehrer , Mark D. Hahm , Shang-Chieh Liu , Steven P. Nicoloso
发明人： R. Michael Buehrer , Mark D. Hahm , Shang-Chieh Liu , Steven P. Nicoloso
IPC分类号： H04J13/04 , H04B1/10 , H04B1/12 , H04B7/04 , H04B7/155 , H04B7/24 , H04M1/00 , H04B15/00
CPC分类号： H04B1/126
摘要： The base station system includes a cancellation processor connected to a plurality of conventional signal processors. Under the control of a controller, the signal processors acquire user signals in signals received by the base station antennas. The controller controls the cancellation processor to perform cancellation operations with respect to the acquired user signals. The cancellation processor includes first-nth filter stages. Each filter stage operates in the same manner. A filter stage obtains, in parallel, the acquired user signals from signals supplied thereto by estimating symbols in the acquired user signals under the control of the controller. The cancellation processor also includes a cancellation stage associated with each filter stage. Each cancellation stage cancels, in parallel, the obtained user signals output from the associated filter stage from the signals received by the base station antennas. The resulting residual signals output from a cancellation stage are supplied to the next filter stage, and the signals supplied to the first filter stage are the signals received by the base station antennas. A cancellation stage cancels the obtained user signals received thereby from the received signals at a substantially same time with respect to the received signals.
摘要翻译：基站系统包括连接到多个传统信号处理器的取消处理器。在控制器的控制下，信号处理器以基站天线接收的信号获取用户信号。控制器控制取消处理器对所获取的用户信号执行取消操作。取消处理器包括第n个滤波器级。每个过滤器阶段以相同的方式操作。滤波器级并行地通过在控制器的控制下估计获取的用户信号中的符号来获得来自所提供的信号的所获取的用户信号。取消处理器还包括与每个滤波器级相关联的取消级。每个取消阶段并行地从由基站天线接收的信号中取消从相关联的滤波器级输出的获得的用户信号。从消除级输出的残留信号被提供给下一个滤波级，提供给第一滤波级的信号是由基站天线接收的信号。消除阶段相对于接收到的信号在基本相同的时间从接收到的信号中取消所获得的用户信号。

2. 发明授权

US06378106B1 Viterbi decoding using single-wrong-turn correction 有权
标题翻译：维特比解码使用单错转向校正
公开(公告)号：US06378106B1
公开(公告)日：2002-04-23
申请号：US09321794
申请日：1999-05-28
申请人： Stephan A. Allpress , Mark D. Hahm
发明人： Stephan A. Allpress , Mark D. Hahm
IPC分类号： H03M1300
CPC分类号： H03M13/6502 , H03M13/4107 , H03M13/4115 , H03M13/4169
摘要： A recursive, single-wrong-turn (SWT) decoding method and Viterbi decoder which requires no additional circuitry or processing to keep track of a running list of the L best paths. If the most likely (ML) path fails frame quality metric tests, a search is made through a trellis using an existing survivor (trace back) information stored in a survivor (trace back) memory. An iteration in the recursive algorithm includes tracing back along the ML path to a particular stage, then deviating from the ML path and following the survivor information along that new deviant path, and finally checking the fully decoded frame to see if the frame quality metrics are acceptable for the frame. These same trace back steps can be performed for every stage in the trellis, deviating from a different stage on the ML path each time. A recursive, single-wrong-turn (SWT) decoding method and Viterbi decoder which exceed the performance of the general Viterbi algorithm and the various conventional list Viterbi decoders and which is much less computationally and physical complex.
摘要翻译：递归，单错（SWT）解码方法和维特比解码器，不需要额外的电路或处理来跟踪L个最佳路径的运行列表。如果最可能的（ML）路径失败了帧质量度量测试，则通过使用存储在幸存者（追溯）存储器中的现有幸存者（追踪））信息的网格进行搜索。递归算法中的迭代包括沿着ML路径追溯到特定阶段，然后从ML路径偏离并跟随沿着新的偏离路径的幸存者信息，并且最终检查完全解码的帧以查看帧质量度量是否为框架可以接受。可以对网格中的每个阶段执行相同的追溯步骤，每次在ML路径上偏离不同的阶段。一种递归，单错（SWT）解码方法和维特比解码器，其超过了一般维特比算法和各种常规列表维特比解码器的性能，并且计算量和物理复杂度都低得多。

3. 发明授权

US07342979B2 Incremental redundancy support in a cellular wireless terminal having IR processing module 有权
标题翻译：具有IR处理模块的蜂窝无线终端中的增量冗余支持
公开(公告)号：US07342979B2
公开(公告)日：2008-03-11
申请号：US10791945
申请日：2004-03-03
申请人： Li Fung Chang , Mark D. Hahm
发明人： Li Fung Chang , Mark D. Hahm
IPC分类号： H03K9/00
CPC分类号： H04L25/03318 , H04L1/0003 , H04L1/0009 , H04L1/0026 , H04L1/0059 , H04L1/0068 , H04L1/0072 , H04L1/1819 , H04L1/1845 , H04L1/203 , H04L2025/03401
摘要： A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes a baseband processor, an equalizer, a system processor, a plurality of IR processing module registers, and an IR processing module. The baseband processor receives an analog signal and produces samples. The equalizer is operable to receive the samples, to equalize the samples, and to produce soft decision bits corresponding to the data block. The system processor receives the soft decision bits of the data block, configures the plurality of IR processing module registers, and initiates operations of the IR processing module. The IR processing module accesses the plurality of IR processing module registers, receives the soft decision bits of the data block, and performs IR operations on the soft decision bits of the data block in an attempt to correctly decode the data block.
摘要翻译：用于在无线接收机中实现增量冗余（IR）操作的系统包括基带处理器，均衡器，系统处理器，多个IR处理模块寄存器和IR处理模块。基带处理器接收模拟信号并产生采样。均衡器可操作以接收采样，以使样本均衡，并产生与数据块相对应的软判决位。系统处理器接收数据块的软判决位，配置多个IR处理模块寄存器，并启动IR处理模块的操作。 IR处理模块访问多个IR处理模块寄存器，接收数据块的软判决位，并对数据块的软判决位执行IR操作，以尝试正确解码数据块。

4. 发明授权

US08861600B2 Method and system for dynamically configurable DCT/IDCT module in a wireless handset 有权
标题翻译：无线手机中可动态配置的DCT / IDCT模块的方法和系统
公开(公告)号：US08861600B2
公开(公告)日：2014-10-14
申请号：US10890865
申请日：2004-07-14
申请人： Mark D. Hahm , Li Fung Chang
发明人： Mark D. Hahm , Li Fung Chang
IPC分类号： H04N7/12 , H04N19/186 , H04N19/159 , H04N19/60 , H04N19/12 , H04N19/126 , H04N19/122 , H04N19/42
CPC分类号： H04N19/00096 , H04N19/12 , H04N19/122 , H04N19/126 , H04N19/159 , H04N19/186 , H04N19/42 , H04N19/60
摘要： In a video processing system, a method and system for dynamically configurable DCT/IDCT module in a wireless handset are provided. A processor may be used to configure a quantization scheme and video format mode of operation and to configure a processing network in a DCT/IDCT module. The mode of operation may depend on whether the received video signal is in JPEG, MPEG, and/or H.263 format. The processing network may be configured into a DCT processing network configuration or an IDCT processing network configuration based on whether the received video signal is to be encoded or decoded respectively. The DCT/IDCT module may comprise a FIFO, an adder/subtractor, a multiplier/accumulator, a plurality of digital dividers, and a de-quantizer. The plurality of digital dividers may comprise a 12-bit divider and an 7-bit divider. The mode and configuration modifications may be dynamically performed during operation of the wireless handset.
摘要翻译：在视频处理系统中，提供了一种在无线手机中用于动态配置的DCT / IDCT模块的方法和系统。处理器可以用于配置量化方案和视频格式操作模式，并且在DCT / IDCT模块中配置处理网络。操作模式可以取决于所接收的视频信号是JPEG，MPEG和/或H.263格式。处理网络可以被配置为DCT处理网络配置或IDCT处理网络配置，基于所接收的视频信号是否被分别编码或解码。 DCT / IDCT模块可以包括FIFO，加法器/减法器，乘法器/累加器，多个数字分频器和去量化器。多个数字分频器可以包括12位分频器和7位分频器。可以在无线手机的操作期间动态地执行模式和配置修改。

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