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1. 发明申请

US20090143966A1 METHODS, APPARATUSES, AND COMPUTER PROGRAM PRODUCT FOR TRAFFIC DATA AGGREGATION USING VIRTUAL TRIP LINES AND GPS-ENABLED MOBILE HANDSETS 有权
标题翻译：方法，装置和计算机程序产品，用于使用虚拟行车线和GPS启动手机的交通数据聚合
公开(公告)号：US20090143966A1
公开(公告)日：2009-06-04
申请号：US11948779
申请日：2007-11-30
申请人： Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G08G1/01 , G08G1/052
CPC分类号： G08G1/0104 , G08G1/052
摘要： A device for determining when a virtual trip line has been crossed or traversed is provided. The device includes a memory for storing the virtual trip lines which are defined pairs of location descriptors corresponding to a geographic area. The device further includes a processor that is capable of determining the location of the device when it crosses a virtual trip line as well as its speed and direction. The processing element is further capable of sending this information to another electronic device such as a server that may determine a number of vehicles crossing a virtual trip line for a specified amount of time, the average speed of vehicles crossing the virtual trip line and the traffic density in a region near the virtual trip line. The device is capable of receiving the information that was determined by the server.
摘要翻译：提供了一种用于确定虚拟跳闸线何时已被越过或穿过的装置。该设备包括用于存储虚拟跳闸线的存储器，虚拟跳闸线是对应于地理区域的定义的位置描述符对。该设备还包括处理器，其能够在穿过虚拟跳闸线以及其速度和方向时确定设备的位置。处理元件还能够将该信息发送到诸如可以确定跨越虚拟跳闸线路的车辆数量达指定时间量的其他电子设备，穿过虚拟跳闸线路的车辆的平均速度和交通在虚拟跳闸线附近的区域的密度。该设备能够接收由服务器确定的信息。

2. 发明授权

US07912629B2 Methods, apparatuses, and computer program products for traffic data aggregation using virtual trip lines and a combination of location and time based measurement triggers in GPS-enabled mobile handsets 有权
标题翻译：用于使用虚拟跳闸线路进行交通数据聚合的方法，设备和计算机程序产品以及支持GPS的移动手机中基于位置和时间的测量触发的组合
公开(公告)号：US07912629B2
公开(公告)日：2011-03-22
申请号：US12119943
申请日：2008-05-13
申请人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/207
摘要： A device for determining the traffic conditions between measurement locations associated with a roadway is provided. The device includes a processor that is capable of determining when a specified measurement location is passed or traversed and measure data as well as start a time period. If a device is traveling towards another specified measurement location but does not reach the location before the time period expires, a new measurement update may be sent by the device to a server. The information in this update may be utilized by the server to determine that there is a slowdown or blockage in traffic and/or that there is a traffic jam between the measurement locations. The device is capable of receiving a traffic update(s) from the server which may specify traffic conditions between the measurement locations. The traffic conditions may indicate that there is a traffic slowdown/blockage between the measurement locations.
摘要翻译：提供了一种用于确定与道路相关联的测量位置之间的交通状况的装置。该设备包括能够确定何时通过或遍历指定的测量位置的处理器，并且测量数据以及开始一段时间。如果设备前往另一个指定的测量位置，但是在该时间段到期之前没有到达该位置，那么该设备可能会向服务器发送新的测量更新。该更新中的信息可被服务器利用以确定业务中存在减速或阻塞和/或测量位置之间存在交通堵塞。该设备能够从服务器接收可能指定测量位置之间的交通状况的交通更新。交通状况可能表明测量位置之间存在交通减速/阻塞。

3. 发明授权

US07818114B2 Methods, apparatuses, and computer program product for traffic data aggregation using virtual trip lines and GPS-enabled mobile handsets 有权
标题翻译：使用虚拟跳闸线路和启用GPS的手机进行交通数据聚合的方法，设备和计算机程序产品
公开(公告)号：US07818114B2
公开(公告)日：2010-10-19
申请号：US11948779
申请日：2007-11-30
申请人： Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/052
摘要： A device for determining when a virtual trip line has been crossed or traversed is provided. The device includes a memory for storing the virtual trip lines which are defined pairs of location descriptors corresponding to a geographic area. The device further includes a processor that is capable of determining the location of the device when it crosses a virtual trip line as well as its speed and direction. The processing element is further capable of sending this information to another electronic device such as a server that may determine a number of vehicles crossing a virtual trip line for a specified amount of time, the average speed of vehicles crossing the virtual trip line and the traffic density in a region near the virtual trip line. The device is capable of receiving the information that was determined by the server.
摘要翻译：提供了一种用于确定虚拟跳闸线何时已被越过或穿过的装置。该设备包括用于存储虚拟跳闸线的存储器，虚拟跳闸线是对应于地理区域的定义的位置描述符对。该设备还包括处理器，其能够在穿过虚拟跳闸线以及其速度和方向时确定设备的位置。处理元件还能够将该信息发送到诸如可以确定跨越虚拟跳闸线路的车辆数量达指定时间量的其他电子设备，穿过虚拟跳闸线路的车辆的平均速度和交通在虚拟跳闸线附近的区域的密度。该设备能够接收由服务器确定的信息。

4. 发明申请

US20090319163A1 Methods, Apparatuses, and Computer Program Products For Traffic Data Aggregation Using Virtual Trip Lines and a Combination of Location and Time Based Measurement Triggers In GPS-Enabled Mobile Handsets 有权
标题翻译：用于使用虚拟跳线的交通数据汇总的方法，设备和计算机程序产品以及基于GPS的移动手机中基于位置和时间的测量触发的组合
公开(公告)号：US20090319163A1
公开(公告)日：2009-12-24
申请号：US12119943
申请日：2008-05-13
申请人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G08G1/00 , G06F15/16
CPC分类号： G08G1/0104 , G08G1/207
摘要： A device for determining the traffic conditions between measurement locations associated with a roadway is provided. The device includes a processor that is capable of determining when a specified measurement location is passed or traversed and measure data as well as start a time period. If a device is traveling towards another specified measurement location but does not reach the location before the time period expires, a new measurement update may be sent by the device to a server. The information in this update may be utilized by the server to determine that there is a slowdown or blockage in traffic and/or that there is a traffic jam between the measurement locations. The device is capable of receiving a traffic update(s) from the server which may specify traffic conditions between the measurement locations. The traffic conditions may indicate that there is a traffic slowdown/blockage between the measurement locations.
摘要翻译：提供了一种用于确定与道路相关联的测量位置之间的交通状况的装置。该设备包括能够确定何时通过或遍历指定的测量位置的处理器，并且测量数据以及开始一段时间。如果设备前往另一个指定的测量位置，但在该时间段到期之前未到达该位置，那么该设备可能会向服务器发送新的测量更新。该更新中的信息可被服务器利用以确定业务中存在减速或阻塞和/或在测量位置之间存在交通堵塞。该设备能够从服务器接收可能指定测量位置之间的交通状况的交通更新。交通状况可能表明测量位置之间存在交通减速/阻塞。

5. 发明申请

US20090006767A1 USING EPHEMERAL STORES FOR FINE-GRAINED CONFLICT DETECTION IN A HARDWARE ACCELERATED STM 有权
标题翻译：在硬件加速STM中使用EPHEMERAL STORES进行细粒度冲突检测
公开(公告)号：US20090006767A1
公开(公告)日：2009-01-01
申请号：US11769094
申请日：2007-06-27
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Gad Sheaffer , Quinn Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Gad Sheaffer , Quinn Jacobson
IPC分类号： G06F12/08 , G06F12/00 , G06F9/46
CPC分类号： G06F12/14 , G06F8/458 , G06F9/52 , G06F9/522 , G06F12/0802 , G06F12/1483
摘要： A method and apparatus for fine-grained filtering in a hardware accelerated software transactional memory system is herein described. A data object, which may have any arbitrary size, is associated with a filter word. The filter word is in a first default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access, such as a first read, from the data object, access barrier operations including an ephemeral/private store operation to set the filter word to a second state are performed. Upon a subsequent/redundant access, such as a second read, the access barrier operations are elided to accelerate the subsequent access, based on the filter word being set to the second state to indicate a previous access occurred.
摘要翻译：这里描述了用于硬件加速软件事务存储器系统中的细粒度过滤的方法和装置。可以具有任意大小的数据对象与过滤字相关联。当在事务的挂起期间没有发生来自数据对象的访问（例如读取）时，过滤器字处于第一默认状态。在从数据对象遇到诸如第一次读取的第一次访问时，执行包括将过滤词设置为第二状态的临时/私人存储操作的访问障碍操作。在诸如第二次读取的后续/冗余访问之后，基于滤波器字被设置为第二状态来指示先前访问发生，访问屏障操作被消除以加速后续访问。

6. 发明申请

US20080022082A1 START TRANSACTIONAL EXECUTION (STE) INSTRUCTION TO SUPPORT TRANSACTIONAL PROGRAM EXECUTION 审中-公开
标题翻译：开展交易执行（STE）指导，以支持交易计划执行
公开(公告)号：US20080022082A1
公开(公告)日：2008-01-24
申请号：US11832298
申请日：2007-08-01
申请人： Marc Tremblay , Shailender Chaudhry , Quinn Jacobson
发明人： Marc Tremblay , Shailender Chaudhry , Quinn Jacobson
IPC分类号： G06F9/30
CPC分类号： G06F9/528 , G06F9/3004 , G06F9/30087 , G06F9/30116 , G06F9/3834 , G06F9/3836 , G06F9/3842 , G06F9/3857 , Y10S707/99953
摘要： One embodiment of the present invention supports execution of a start transactional execution (STE) instruction, which marks the beginning of a block of instructions to be executed transactionally. Upon encountering the STE instruction during execution of a program, the system commences transactional execution of the block of instructions following the STE instruction. Changes made during this transactional execution are not committed to the architectural state of the processor until the transactional execution successfully completes.
摘要翻译：本发明的一个实施例支持开始事务执行（STE）指令的执行，其指示要在事务上执行的指令块的开始。在执行程序期间遇到STE指令时，系统开始按照STE指令执行指令块的事务性执行。在事务执行之前进行的更改不会在事务执行成功完成之前提交到处理器的体系结构状态。

7. 发明申请

US20070283353A1 SELECTIVELY MONITORING LOADS TO SUPPORT TRANSACTIONAL PROGRAM EXECUTION 有权
标题翻译：选择监测负荷来支持交易性计划执行
公开(公告)号：US20070283353A1
公开(公告)日：2007-12-06
申请号：US11833314
申请日：2007-08-03
申请人： Marc Tremblay , Quinn Jacobson , Shailender Chaudhry
发明人： Marc Tremblay , Quinn Jacobson , Shailender Chaudhry
IPC分类号： G06F9/46
CPC分类号： G06F12/0862 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3836 , G06F9/3857 , G06F9/467 , G06F12/0815 , G06F12/0842
摘要： One embodiment of the present invention provides a system that selectively monitors load instructions to support transactional execution of a process, wherein changes made during the transactional execution are not committed to the architectural state of a processor until the transactional execution successfully completes. Upon encountering a load instruction during transactional execution of a block of instructions, the system determines whether the load instruction is a monitored load instruction or an unmonitored load instruction. If the load instruction is a monitored load instruction, the system performs the load operation, and load-marks a cache line associated with the load instruction to facilitate subsequent detection of an interfering data access to the cache line from another process. If the load instruction is an unmonitored load instruction, the system performs the load operation without load-marking the cache line.
摘要翻译：本发明的一个实施例提供了一种系统，其选择性地监视加载指令以支持进程的事务性执行，其中在事务执行期间进行的改变不被提交到处理器的体系结构状态，直到事务执行成功完成。在执行指令块的事务执行期间遇到加载指令时，系统确定加载指令是监视加载指令还是不受监控的加载指令。如果加载指令是被监视的加载指令，则系统执行加载操作，并加载标记与加载指令相关联的高速缓存行，以便随后检测到来自另一进程的高速缓存行的干扰数据访问。如果加载指令是不受监控的加载指令，则系统将执行加载操作，而不加载标记缓存行。

8. 发明申请

US20070226463A1 PATCHABLE AND/OR PROGRAMMABLE DECODE USING PREDECODE SELECTION 有权
标题翻译：使用预选选择的可编程和/或可编程代码
公开(公告)号：US20070226463A1
公开(公告)日：2007-09-27
申请号：US11277716
申请日：2006-03-28
申请人： Shailender Chaudhry , Paul Caprioli , Quinn Jacobson , Marc Tremblay
发明人： Shailender Chaudhry , Paul Caprioli , Quinn Jacobson , Marc Tremblay
IPC分类号： G06F9/40
CPC分类号： G06F9/3836 , G06F9/30196 , G06F9/328 , G06F9/382 , G06F9/3857 , G06F9/3897
摘要： Mechanisms have been developed for providing great flexibility in processor instruction handling, sequencing and execution. In particular, it has been discovered that a configurable predecode mechanism can be employed to select, for respective instruction patterns, between fixed decode and programmable decode paths provided by a processor. In this way, a patchable and/or programmable decode mechanism can be efficiently provided. In some realizations, either (or both) predecode or (and) decode may be configured or reconfigured post-manufacture. In some realizations, either (or both) predecode or (and) decode may be configured at (or about) initialization. In some realizations, either (or both) predecode or (and) decode may be configured at run-time.
摘要翻译：已经开发了用于在处理器指令处理，排序和执行中提供极大灵活性的机制。特别地，已经发现，可以采用可配置的预解码机制来针对相应的指令模式在由处理器提供的固定解码和可编程解码路径之间进行选择。以这种方式，可以有效地提供可修补和/或可编程的解码机制。在一些实现中，可以在制造后配置或重新配置（或两者）预解码或（和）解码。在某些实现中，可以在（或约）初始化时配置（或两者）预解码或（和）解码。在某些实现中，可以在运行时配置（或两者）预解码或（和）解码。

9. 发明申请

US20070106888A1 Return address stack recovery in a speculative execution computing apparatus 有权
标题翻译：在推测执行计算设备中返回地址堆栈恢复
公开(公告)号：US20070106888A1
公开(公告)日：2007-05-10
申请号：US11363625
申请日：2006-02-28
申请人： Shailender Chaudhry , Quinn Jacobson , Paul Caprioli , Marc Tremblay
发明人： Shailender Chaudhry , Quinn Jacobson , Paul Caprioli , Marc Tremblay
IPC分类号： G06F15/00
CPC分类号： G06F9/3806 , G06F9/3863 , G06F9/3867
摘要： A technique recovers return address stack (RAS) content and restores alignment of a RAS top-of-stack (TOS) pointer for occurrences of mispredictions due to speculative operation, out-of-order instruction processing, and exception handling. In at least one embodiment of the invention, an apparatus includes a speculative execution processor pipeline, a first structure for maintaining return addresses relative to instruction flow at a first stage of the pipeline, at least a second structure for maintaining return addresses relative to instruction flow at a second stage of the pipeline. The second stage of the pipeline is deeper in the pipeline than the first stage. The apparatus includes circuitry operable to reproduce at least return addresses from the second structure to the first structure.
摘要翻译：一种技术恢复返回地址堆栈（RAS）内容，并恢复RAS堆栈顶部（TOS）指针的对齐，用于由于推测操作，无序指令处理和异常处理引起的错误预测。在本发明的至少一个实施例中，一种装置包括推测执行处理器流水线，用于在流水线的第一阶段保持相对于指令流的返回地址的第一结构，用于维持相对于指令流的返回地址的至少第二结构在管道的第二阶段。管道的第二阶段比第一阶段管道更深。该装置包括可操作以至少将从第二结构返回地址再现到第一结构的电路。

10. 发明授权

US09594565B2 Hardware acceleration of a write-buffering software transactional memory 有权
标题翻译：写缓冲软件事务内存的硬件加速
公开(公告)号：US09594565B2
公开(公告)日：2017-03-14
申请号：US13471841
申请日：2012-08-01
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn Jacobson
IPC分类号： G06F12/08 , G06F9/38 , G06F9/46
CPC分类号： G06F9/3834 , G06F9/3851 , G06F9/3863 , G06F9/467 , G06F12/0842
摘要： A method and apparatus for accelerating a software transactional memory (STM) system is described herein. Annotation field are associated with lines of a transactional memory. An annotation field associated with a line of the transaction memory is initialized to a first value upon starting a transaction. In response to encountering a read operation in the transaction, then annotation field is checked. If the annotation field includes a first value, the read is serviced from the line of the transaction memory without having to search an additional write space. A second and third value in the annotation field potentially indicates whether a read operation missed the transactional memory or a tentative value is stored in a write space. Additionally, an additional bit in the annotation field, may be utilized to indicate whether previous read operations have been logged, allowing for subsequent redundant read logging to be reduced.
摘要翻译：本文描述了用于加速软件事务存储器（STM）系统的方法和装置。注释字段与事务存储器的行相关联。与事务存储器的行相关联的注释字段在启动事务时被初始化为第一个值。响应于在事务中遇到读取操作，则检查注释字段。如果注释字段包含第一个值，则读取将从事务存储器的行提供服务，而不必搜索额外的写入空间。注释字段中的第二和第三个值潜在地指示读操作是否错过事务存储器或暂存值是否存储在写空间中。此外，注释字段中的另外一个位可以用于指示是否已经记录先前的读取操作，从而允许减少随后的冗余读取记录。

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