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1. 发明授权

US07912629B2 Methods, apparatuses, and computer program products for traffic data aggregation using virtual trip lines and a combination of location and time based measurement triggers in GPS-enabled mobile handsets 有权
标题翻译：用于使用虚拟跳闸线路进行交通数据聚合的方法，设备和计算机程序产品以及支持GPS的移动手机中基于位置和时间的测量触发的组合
公开(公告)号：US07912629B2
公开(公告)日：2011-03-22
申请号：US12119943
申请日：2008-05-13
申请人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： David William Sutter , Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/207
摘要： A device for determining the traffic conditions between measurement locations associated with a roadway is provided. The device includes a processor that is capable of determining when a specified measurement location is passed or traversed and measure data as well as start a time period. If a device is traveling towards another specified measurement location but does not reach the location before the time period expires, a new measurement update may be sent by the device to a server. The information in this update may be utilized by the server to determine that there is a slowdown or blockage in traffic and/or that there is a traffic jam between the measurement locations. The device is capable of receiving a traffic update(s) from the server which may specify traffic conditions between the measurement locations. The traffic conditions may indicate that there is a traffic slowdown/blockage between the measurement locations.
摘要翻译：提供了一种用于确定与道路相关联的测量位置之间的交通状况的装置。该设备包括能够确定何时通过或遍历指定的测量位置的处理器，并且测量数据以及开始一段时间。如果设备前往另一个指定的测量位置，但是在该时间段到期之前没有到达该位置，那么该设备可能会向服务器发送新的测量更新。该更新中的信息可被服务器利用以确定业务中存在减速或阻塞和/或测量位置之间存在交通堵塞。该设备能够从服务器接收可能指定测量位置之间的交通状况的交通更新。交通状况可能表明测量位置之间存在交通减速/阻塞。

2. 发明授权

US07818114B2 Methods, apparatuses, and computer program product for traffic data aggregation using virtual trip lines and GPS-enabled mobile handsets 有权
标题翻译：使用虚拟跳闸线路和启用GPS的手机进行交通数据聚合的方法，设备和计算机程序产品
公开(公告)号：US07818114B2
公开(公告)日：2010-10-19
申请号：US11948779
申请日：2007-11-30
申请人： Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/052
摘要： A device for determining when a virtual trip line has been crossed or traversed is provided. The device includes a memory for storing the virtual trip lines which are defined pairs of location descriptors corresponding to a geographic area. The device further includes a processor that is capable of determining the location of the device when it crosses a virtual trip line as well as its speed and direction. The processing element is further capable of sending this information to another electronic device such as a server that may determine a number of vehicles crossing a virtual trip line for a specified amount of time, the average speed of vehicles crossing the virtual trip line and the traffic density in a region near the virtual trip line. The device is capable of receiving the information that was determined by the server.
摘要翻译：提供了一种用于确定虚拟跳闸线何时已被越过或穿过的装置。该设备包括用于存储虚拟跳闸线的存储器，虚拟跳闸线是对应于地理区域的定义的位置描述符对。该设备还包括处理器，其能够在穿过虚拟跳闸线以及其速度和方向时确定设备的位置。处理元件还能够将该信息发送到诸如可以确定跨越虚拟跳闸线路的车辆数量达指定时间量的其他电子设备，穿过虚拟跳闸线路的车辆的平均速度和交通在虚拟跳闸线附近的区域的密度。该设备能够接收由服务器确定的信息。

3. 发明申请

US20070220207A1 Transferring data from stacked memory 审中-公开
标题翻译：从堆叠内存传输数据
公开(公告)号：US20070220207A1
公开(公告)日：2007-09-20
申请号：US11374936
申请日：2006-03-14
申请人： Bryan Black , Murali Annavaram , Paul Reed
发明人： Bryan Black , Murali Annavaram , Paul Reed
IPC分类号： G06F12/00
CPC分类号： G06F12/084 , G06F12/0862 , G06F12/0897 , Y02D10/13
摘要： Methods and apparatus to transfer data from a stacked memory are described. In one embodiment, an interconnect may be utilized to transfer data into a buffer from one or more opened memory pages.
摘要翻译：描述了从堆叠存储器传送数据的方法和装置。在一个实施例中，互连可用于从一个或多个打开的存储器页面将数据传送到缓冲器。

4. 发明申请

US20060095807A1 Method and apparatus for varying energy per instruction according to the amount of available parallelism 有权
标题翻译：根据可用的并行度量来改变每个指令的能量的方法和装置
公开(公告)号：US20060095807A1
公开(公告)日：2006-05-04
申请号：US10952627
申请日：2004-09-28
申请人： Edward Grochowski , John Shen , Hong Wang , Doron Orenstein , Gad Sheaffer , Ronny Ronen , Murali Annavaram
发明人： Edward Grochowski , John Shen , Hong Wang , Doron Orenstein , Gad Sheaffer , Ronny Ronen , Murali Annavaram
IPC分类号： G06F1/30
CPC分类号： G06F9/3851 , G06F1/206 , G06F1/3203 , G06F1/329 , G06F9/3885 , G06F9/3891 , G06F9/3897 , Y02D10/16 , Y02D10/24 , Y02D50/20
摘要： A method and apparatus for changing the configuration of a multi-core processor is disclosed. In one embodiment, a throttle module (or throttle logic) may determine the amount of parallelism present in the currently-executing program, and change the execution of the threads of that program on the various cores. If the amount of parallelism is high, then the processor may be configured to run a larger amount of threads on cores configured to consume less power. If the amount of parallelism is low, then the processor may be configured to run a smaller amount of threads on cores configured for greater scalar performance.
摘要翻译：公开了一种用于改变多核处理器的配置的方法和装置。在一个实施例中，节气门模块（或节气门逻辑）可以确定当前执行的程序中存在的并行度量，并且改变该程序在各种核心上的线程的执行。如果并行量高，则处理器可以被配置为在被配置为消耗较少功率的核上运行更大量的线程。如果并行量较低，则处理器可能被配置为在配置为更高标量性能的核心上运行较少量的线程。

5. 发明授权

US08839258B2 Load balancing for multi-threaded applications via asymmetric power throttling 有权
标题翻译：通过不对称功率节流对多线程应用进行负载平衡
公开(公告)号：US08839258B2
公开(公告)日：2014-09-16
申请号：US13354623
申请日：2012-01-20
申请人： Ryan Rakvic , Richard A. Hankins , Ed Grochowski , Hong Wang , Murali Annavaram , David K. Poulsen , Sanjiv Shah , John Shen , Gautham Chinya
发明人： Ryan Rakvic , Richard A. Hankins , Ed Grochowski , Hong Wang , Murali Annavaram , David K. Poulsen , Sanjiv Shah , John Shen , Gautham Chinya
IPC分类号： G06F9/46 , G06F1/00 , G06F1/26 , G06F9/48
CPC分类号： G06F9/4893 , Y02D10/24
摘要： A first execution time of a first thread executing on a first processing unit of a multiprocessor is determined. A second execution time of a second thread executing on a second processing unit of the multiprocessor is determined, the first and second threads executing in parallel. Power is set to the first and second processing units to effectuate the first and second threads to finish executing at approximately the same time in future executions of the first and second threads. Other embodiments are also described and claimed.
摘要翻译：确定在多处理器的第一处理单元上执行的第一线程的第一执行时间。确定在多处理器的第二处理单元上执行的第二线程的第二执行时间，第一和第二线程并行执行。功率被设置为第一和第二处理单元，以在第一和第二线程的将来执行中在大致相同的时刻实现第一和第二线程完成执行。还描述和要求保护其他实施例。

6. 发明申请

US20130275794A1 RUNTIME SELECTION OF MOST ENERGY-EFFICIENT APPROACH FOR SERVICES REQUESTED BY MOBILE APPLICATIONS 有权
标题翻译：选择移动应用服务所需的最有效的方法
公开(公告)号：US20130275794A1
公开(公告)日：2013-10-17
申请号：US13861140
申请日：2013-04-11
申请人： Murali Annavaram , Sangwon Lee
发明人： Murali Annavaram , Sangwon Lee
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/3278 , Y02D10/157
摘要： An energy conservation module may be included in a mobile communication device that receives requests for services from application programs running in the device. For each request, the energy conservation module may determine which of different, selectable ways of performing the request is likely to be the most energy efficient. The energy conservation module may then cause the request to be performed in this most energy-efficient way. This determination may be dynamic and based on current operating conditions. Middleware between the application programs and an operating system may be included that presents various APIs to the application programs to allow them to easily invoke this functionality. The different, selectable ways of performing the services may be of any type, including different, selectable computer network interfaces (e.g., Wi-Fi and cellular) and whether a complex computation should be performed within or outside of the mobile communication device.
摘要翻译：节能模块可以包括在从在设备中运行的应用程序接收对服务的请求的移动通信设备中。对于每个请求，节能模块可以确定执行请求的哪些不同的可选择的方式可能是最节能的。节能模块然后可以以最节能的方式使得请求被执行。该确定可以是动态的并且基于当前的操作条件。可以包括应用程序和操作系统之间的中间件，其向应用程序提供各种API，以允许它们容易地调用该功能。执行服务的不同的可选择的方式可以是任何类型的，包括不同的可选择的计算机网络接口（例如，Wi-Fi和蜂窝），以及是否应该在移动通信设备内部或外部执行复杂的计算。

7. 发明申请

US20120131366A1 LOAD BALANCING FOR MULTI-THREADED APPLICATIONS VIA ASYMMETRIC POWER THROTTLING 有权
标题翻译：通过不对称功率曲线的多线程应用的负载平衡
公开(公告)号：US20120131366A1
公开(公告)日：2012-05-24
申请号：US13354623
申请日：2012-01-20
申请人： Ryan Rakvic , Richard A. Hankins , Ed Grochowski , Hong Wang , Murali Annavaram , David K. Poulsen , Sanjiv Shah , John Shen , Gautham Chinya
发明人： Ryan Rakvic , Richard A. Hankins , Ed Grochowski , Hong Wang , Murali Annavaram , David K. Poulsen , Sanjiv Shah , John Shen , Gautham Chinya
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F9/4893 , Y02D10/24
摘要： A first execution time of a first thread executing on a first processing unit of a multiprocessor is determined. A second execution time of a second thread executing on a second processing unit of the multiprocessor is determined, the first and second threads executing in parallel. Power is set to the first and second processing units to effectuate the first and second threads to finish executing at approximately the same time in future executions of the first and second threads. Other embodiments are also described and claimed.
摘要翻译：确定在多处理器的第一处理单元上执行的第一线程的第一执行时间。确定在多处理器的第二处理单元上执行的第二线程的第二执行时间，第一和第二线程并行执行。功率被设置为第一和第二处理单元，以在第一和第二线程的将来执行中在大致相同的时刻实现第一和第二线程完成执行。还描述和要求保护其他实施例。

8. 发明申请

US20070164787A1 Method and apparatus for late timing transition detection 有权
标题翻译：用于后期定时转换检测的方法和装置
公开(公告)号：US20070164787A1
公开(公告)日：2007-07-19
申请号：US11234548
申请日：2005-09-23
申请人： Edward Grochowski , Chris Wilkerson , Shih-Lien Lu , Murali Annavaram
发明人： Edward Grochowski , Chris Wilkerson , Shih-Lien Lu , Murali Annavaram
IPC分类号： H03K19/173 , G06F7/38
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译：两个锁存器在时钟信号的转变时存储数据信号的状态。比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。描述和要求保护使用锁存器和比较逻辑的系统。

9. 发明申请

US20120159276A1 AUTOMATED DETECTION OF AND COMPENSATION FOR GUARDBAND DEGRADATION DURING OPERATION OF CLOCKED DATA PROCESSING CIRCUIT 有权
标题翻译：自动检测和补偿时钟数据处理电路运行期间的数据丢失
公开(公告)号：US20120159276A1
公开(公告)日：2012-06-21
申请号：US13327561
申请日：2011-12-15
申请人： Bardia ZANDIAN , Murali ANNAVARAM
发明人： Bardia ZANDIAN , Murali ANNAVARAM
IPC分类号： G01R31/3181
CPC分类号： G01R31/3016
摘要： An automated guardband compensation system may automatically compensate for degradation in the guardband of a clocked data processing circuit while that circuit is connected within a data processing system. A control circuit may automatically and repeatedly request: a switching circuit to switch a critical path within the clocked data processing circuit out of a data processing pathway within the data processing system while the clocked data processing circuit is connected within the data processing system; a guardband test circuit to test the guardband of the critical path while the critical path is switched out of the data processing pathway; a guardband compensation circuit to increase the guardband when the results of the test indicate a material degradation in the guardband; and a switching circuit to switch the critical path back into the data processing pathway after the test.
摘要翻译：自动保护带补偿系统可以自动补偿在数据处理系统内连接时钟数据处理电路的保护带中的劣化。控制电路可以自动且重复地请求：切换电路，用于在时钟数据处理电路连接在数据处理系统内的情况下，从数据处理系统内的数据处理路径切换时钟数据处理电路内的关键路径; 一个防护带测试电路，用于测试关键路径的保护带，同时将关键路径切换出数据处理路径; 当测试结果指示保护带中的材料劣化时，用于增加保护带的保护带补偿电路; 以及在测试之后将关键路径切换回数据处理路径的切换电路。

10. 发明授权

US07622961B2 Method and apparatus for late timing transition detection 有权
标题翻译：用于后期定时转换检测的方法和装置
公开(公告)号：US07622961B2
公开(公告)日：2009-11-24
申请号：US11234548
申请日：2005-09-23
申请人： Edward Grochowski , Chris Wilkerson , Shih-Lien L. Lu , Murali Annavaram
发明人： Edward Grochowski , Chris Wilkerson , Shih-Lien L. Lu , Murali Annavaram
IPC分类号： H03K5/19
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译：两个锁存器在时钟信号的转变时存储数据信号的状态。比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。描述和要求保护使用锁存器和比较逻辑的系统。

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