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1. 发明申请

WO2015176303A1 AUTO-DETECTION OF FIBER WORKING MODES 审中-公开
标题翻译：自动检测光纤工作模式
公开(公告)号：WO2015176303A1
公开(公告)日：2015-11-26
申请号：PCT/CN2014/078252
申请日：2014-05-23
申请人： QUALCOMM INCORPORATED , YU, Hongchun , YIN, Guangming , LI, Shuguang , ZHU, Quanging , YANG, Li
发明人： YU, Hongchun , YIN, Guangming , LI, Shuguang , ZHU, Quanging , YANG, Li
IPC分类号： H04L29/10
CPC分类号： H04L69/24
摘要： A network device is disclosed that may automatically detect the working mode of an associated communications link by searching an incoming data stream for a pattern including at least a predetermined number of continuous ones or zeros. The device is initialized to operate in a first mode compliant with 1000Base-X protocols. A SERDES associated with encoding the data stream, when operating in the first mode, ensures that there are no more than five continuous ones or zeros in the data stream. Thus, if the data stream contains the pattern of six or more continuous ones or zeros, then occurrence of the pattern results from oversampling the data stream, and thus the data rate of the network device is higher than the data rate of the communications link.
摘要翻译：公开了一种网络设备，其可以通过搜索输入数据流来自动检测相关联的通信链路的工作模式，所述模式包括至少预定数量的连续1或零。该器件被初始化为符合1000Base-X协议的第一模式。当在第一模式下操作时，与编码数据流相关联的SERDES确保数据流中不超过五个连续的或零。因此，如果数据流包含六个或更多个连续的或零的模式，则由于对数据流进行过采样而产生模式，因此网络设备的数据速率高于通信链路的数据速率。

2. 发明申请

WO2013139033A1 CONFIGURABLE MULTI-MODE MEDIA INDEPENDENT INTERFACE 审中-公开
标题翻译：可配置的多模式媒体独立接口
公开(公告)号：WO2013139033A1
公开(公告)日：2013-09-26
申请号：PCT/CN2012/072898
申请日：2012-03-23
申请人： QUALCOMM INCORPORATED , YU, Hongchun
发明人： YU, Hongchun
IPC分类号： H03M9/00
CPC分类号： H03M9/00 , H04J3/047 , H04J3/0697 , H04L25/4908 , H04L41/0803 , H04L69/18
摘要： A configurable media independent interface in an integrated circuit device includes a first plurality of channels and a second plurality of channels, wherein each channel of the first and second pluralities includes a transmit path. The interface also includes a first serializer configurable to serialize transmit data for the first and second pluralities of channels in a first mode and to serialize transmit data for the first plurality of channels in a second mode, and a second serializer configurable to be disabled in the first mode and to serialize data for the second plurality of channels in the second mode.
摘要翻译：集成电路设备中的可配置媒体独立接口包括第一多个信道和第二多个信道，其中第一和第二多个信道的每个信道包括发送路径。该接口还包括可配置为以第一模式串行化用于第一和第二多个信道的发送数据的第一串行器，并且以第二模式串行化第一多个信道的发送数据，以及可配置为在第二模式中被禁用的第二串行器并且在第二模式中串行化第二多个信道的数据。

3. 发明公开

EP2828975A1 CONFIGURABLE MULTI-MODE MEDIA INDEPENDENT INTERFACE 审中-公开
标题翻译：可配置的多模式媒体独立界面
公开(公告)号：EP2828975A1
公开(公告)日：2015-01-28
申请号：EP12871888.9
申请日：2012-03-23
申请人： Qualcomm Incorporated
发明人： YU, Hongchun
IPC分类号： H03M9/00
CPC分类号： H03M9/00 , H04J3/047 , H04J3/0697 , H04L25/4908 , H04L41/0803 , H04L69/18
摘要： A configurable media independent interface in an integrated circuit device includes a first plurality of channels and a second plurality of channels, wherein each channel of the first and second pluralities includes a transmit path. The interface also includes a first serializer configurable to serialize transmit data for the first and second pluralities of channels in a first mode and to serialize transmit data for the first plurality of channels in a second mode, and a second serializer configurable to be disabled in the first mode and to serialize data for the second plurality of channels in the second mode.
摘要翻译：集成电路器件中的可配置介质独立接口包括第一多个信道和第二多个信道，其中第一和第二多个信道中的每个信道包括发射路径。该接口还包括第一串行器和第二串行器，第一串行器可配置成串行化第一模式中的第一和第二多个通道的发送数据并且串行化第二多个通道中的发送数据，第二串行器可配置为在第第一模式并且以第二模式串行化第二多个通道的数据。

4. 发明公开

EP2829044A1 MULTI-PORT SERIAL MEDIA INDEPENDENT INTERFACE 审中-公开
标题翻译：多端口串行介质独立接口
公开(公告)号：EP2829044A1
公开(公告)日：2015-01-28
申请号：EP12872015.8
申请日：2012-03-23
申请人： Qualcomm Incorporated
发明人： YU, Hongchun
IPC分类号： H04L29/10
CPC分类号： H04J3/047 , H04J3/0638 , H04J3/0697 , H04L25/4908
摘要： A media independent interface in an integrated circuit device includes a first plurality of channels, each including a data transmit path and a data receive path, and a second plurality of channels, each including a transmit path to transmit an idle symbol and a receive path to receive the idle symbol. The interface also includes a codec, coupled to the transmit paths of the first and second pluralities of channels, to encode data and symbols on the transmit paths, and a multiplexer, coupled to the codec, to multiplex the data on the transmit paths of the first and second pluralities of channels as encoded by the codec. The interface further includes a Ser Des to serialize the multiplexed data.
摘要翻译：集成电路设备中的介质独立接口包括：第一多个信道，每个信道包括数据发送路径和数据接收路径;以及第二多个信道，每个包括发送路径以将空闲符号和接收路径发送到接收空闲符号。该接口还包括编解码器，该编解码器耦合到第一和第二多个信道的发送路径，用于编码发送路径上的数据和符号;以及多路复用器，耦合到编解码器，用于多路复用第一和第二多个频道由编解码器编码。该接口进一步包括SerDes以串行化复用数据。

5. 发明公开

EP2823604A1 LOW POWER IDLE SIGNALING FOR GIGABIT MEDIA INDEPENDENT INTERFACES OPERATING IN LEGACY MODES 有权
标题翻译：低功耗空闲信令吉比特媒体独立接口用于操作模式已过时
公开(公告)号：EP2823604A1
公开(公告)日：2015-01-14
申请号：EP12870571.2
申请日：2012-03-05
申请人： Qualcomm Incorporated
发明人： YU, Hongchun
IPC分类号： H04L12/70
CPC分类号： G06F1/3209 , H04L12/12 , H04L49/351 , Y02D50/20 , Y02D50/40 , Y02D50/42
摘要： A method and apparatus for enabling low power idle (LPI) signaling for Ethernet transceivers operating in legacy modes are disclosed that allow a high speed transceiver to retain energy efficient Ethernet (EEE) functionality even when the transceiver is operating in a slower speed mode. In some embodiments, an Ethernet device may enter an LPI mode upon receiving a regular LPI signal when its media independent interface (MII) is operating at a first transmission rate, and may enter the LPI mode upon receiving a modified LPI signal when the MII is operating at a first speed operating at a second transmission rate that is slower than the first transmission rate.

6. 发明申请

WO2016058176A1 RECONFIGURABLE ETHERNET PHYS 审中-公开
标题翻译：可重构以太网
公开(公告)号：WO2016058176A1
公开(公告)日：2016-04-21
申请号：PCT/CN2014/088813
申请日：2014-10-17
申请人： QUALCOMM INCORPORATED , YU, Hongchun , YIN, Guangming , ZHANG, James Qian
发明人： YU, Hongchun , YIN, Guangming , ZHANG, James Qian
IPC分类号： H04L12/28
CPC分类号： H04L49/30
摘要： A reconfigurable Ethernet physical layer (PHY) is operable in at least a first mode and a second mode. The PHY includes signal processing circuitry to process communications of a first type or a second type during the first mode of operation, and to process multiple communications of the second type during the second mode of operation. A plurality of transceivers is coupled to the signal processing circuitry. Each transceiver of the plurality of transceivers includes a transmitting element and a receiving element. A switching element selectively couples the plurality of transceivers to a first set of communications channels or a second set of communications channels based on the mode of operation. Specifically, a number of communications channels in the second set of communications channels is greater than a number of transceivers of the plurality of transceivers.
摘要翻译：可重构以太网物理层（PHY）可在至少第一模式和第二模式中操作。 PHY包括在第一操作模式期间处理第一类型或第二类型的通信的信号处理电路，并且在第二操作模式期间处理第二类型的多个通信。多个收发器耦合到信号处理电路。多个收发器的每个收发器包括发送元件和接收元件。开关元件基于操作模式将多个收发器选择性地耦合到第一组通信信道或第二组通信信道。具体地，第二组通信信道中的多个通信信道大于多个收发器的多个收发器。

7. 发明申请

WO2016041153A1 RECEIVER TRAINING USING PREDICTED DATA 审中-公开
标题翻译：接收者使用预测数据进行培训
公开(公告)号：WO2016041153A1
公开(公告)日：2016-03-24
申请号：PCT/CN2014/086697
申请日：2014-09-17
申请人： QUALCOMM INCORPORATED , YU, Hongchun , ZHANG, James Qian
发明人： YU, Hongchun , ZHANG, James Qian
IPC分类号： H04B3/23
CPC分类号： H04B3/23 , H04B3/238
摘要： An echo canceller and one or more near-end crosstalk (NEXT) cancellers in a receiver in a slave device are trained during a respective phase of a training sequence. During the respective phase, data is received from a master device while the slave device transmits data to the master device. The data received from the master device is predicted. Echoes and NEXT associated with the data transmitted to the master device are also received. The echo canceller and one or more NEXT cancellers are trained based in part on the predicted data.
摘要翻译：在训练序列的相应阶段期间训练来自从设备的接收机中的回波消除器和一个或多个近端串扰（NEXT）消除器。在相应阶段，从主设备接收数据，而从设备向主设备发送数据。预测从主设备接收的数据。还接收与发送到主设备的数据相关联的回波和NEXT。回波消除器和一个或多个NEXT消除器部分地基于预测数据进行训练。

8. 发明申请

WO2014067050A1 ETHERNET OVER USB INTERFACES WITH FULL-DUPLEX DIFFERENTIAL PAIRS 审中-公开
标题翻译：以太网覆盖带有全双工差分对的USB接口
公开(公告)号：WO2014067050A1
公开(公告)日：2014-05-08
申请号：PCT/CN2012/083687
申请日：2012-10-29
申请人： QUALCOMM INCORPORATED , YU, Hongchun
发明人： YU, Hongchun
IPC分类号： H04M1/253
CPC分类号： G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F13/4282 , H04M1/2535
摘要： A system and method are disclosed that allow a host device to communicate with an external device using either Ethernet communications or USB communications provided via a USB port and a USB connection (e.g., a USB cable). The host device may include a processor, an Ethernet media access control (MAC) circuit coupled to the processor, a USB controller coupled to the processor, a USB port to couple to the external device via the USB connection, and a transceiver coupled between the USB port and either the Ethernet MAC circuit or the USB controller in response to a mode select signal. The host device may also include a detection circuit that generates the mode select signal in response to determining whether the external device is a USB device or an Ethernet device.
摘要翻译：公开了一种系统和方法，其允许主机设备使用通过USB端口和USB连接（例如，USB电缆）提供的以太网通信或USB通信与外部设备进行通信。主机设备可以包括处理器，耦合到处理器的以太网媒体访问控制（MAC）电路，耦合到处理器的USB控制器，经由USB连接耦合到外部设备的USB端口以及耦合在该处理器之间的收发器 USB端口和以太网MAC电路或USB控制器响应于模式选择信号。主机设备还可以包括响应于确定外部设备是USB设备还是以太网设备而产生模式选择信号的检测电路。

9. 发明申请

WO2017147886A1 METHOD FOR ROBUST PHASE-LOCKED LOOP DESIGN 审中-公开
标题翻译：鲁棒锁相环设计方法
公开(公告)号：WO2017147886A1
公开(公告)日：2017-09-08
申请号：PCT/CN2016/075533
申请日：2016-03-03
申请人： QUALCOMM INCORPORATED , YU, Hongchun , LIN, Weiran , LI, Shuguang , YIN, Guangming
发明人： YU, Hongchun , LIN, Weiran , LI, Shuguang , YIN, Guangming
IPC分类号： H03K7/00
CPC分类号： H03L7/0814 , H03K2005/00058 , H03L7/093 , H04L7/0331
摘要： Systems, methods, and apparatus (100) are disclosed that can improve robustness of digital phase locked loop (PLL) circuits. A method performed by a clock generation device includes generating a plurality of phase-shifted signals, each of the plurality of phase-shifted signals having a phase shift with respect to a base clock signal (202) that is unique within the plurality of phase-shifted signals, selecting a first phase-shifted signal as an output signal (222), generating a first phase control word ( 312) indicative of a second phase-shifted signal when the second signal has a closer phase relationship with a reference signal (204) than the first signal, refraining from selecting the second signal as the output signal (222) while either of the first signal and the second signal is in a first signaling state, and selecting as the output signal (222), the second signal when the first signal and the second signal are in a second signaling state.
摘要翻译：公开了可以提高数字锁相环（PLL）电路的鲁棒性的系统，方法和装置（100）。由时钟生成设备执行的方法包括：生成多个相移信号，多个相移信号中的每一个相对于在多个相移信号中唯一的基时钟信号（202）具有相移，选择第一相移信号作为输出信号（222）;当第二信号与参考信号（204）具有更接近的相位关系时，产生指示第二相移信号的第一相位控制字（312）），当所述第一信号和所述第二信号中的任一个处于第一信号状态时，避免选择所述第二信号作为所述输出信号（222），并且选择所述第二信号作为所述输出信号（222）第一信号和第二信号处于第二信令状态。

10. 发明申请

WO2014094278A1 APPARATUS AND METHOD FOR ENCODING MDIO INTO SGMII TRANSMISSIONS 审中-公开
标题翻译：将MDIO编码为SGMII传输的装置和方法
公开(公告)号：WO2014094278A1
公开(公告)日：2014-06-26
申请号：PCT/CN2012/087029
申请日：2012-12-20
申请人： QUALCOMM INCORPORATED , YU, Hongchun , CHEN, Honglu , HUANG, Chi , ZHANG, Wenjun
发明人： YU, Hongchun , CHEN, Honglu , HUANG, Chi , ZHANG, Wenjun
IPC分类号： H04L29/06
CPC分类号： H04L49/30 , H04L12/40013 , H04L12/413
摘要： A method of communication between an Ethernet Media Access Controller (MAC) and a physical interface (PHY) is disclosed. The method includes establishing communication between the MAC and the PHY via a first serial link in accordance with a Serializer Deserializer (SERDES) protocol. In a data transfer mode, data is transferred along the first serial link. Idle frames are transferred within an idle time gap along the link in an idle mode. The PHY is managed by encoding Management Data Input/Output (MDIO) information in one or more MDIO frames, and transferring the one or more MDIO frames within the idle time gap along the first serial link.
摘要翻译：公开了以太网介质访问控制器（MAC）和物理接口（PHY）之间的通信方法。该方法包括根据串行器解串器（SERDES）协议，经由第一串行链路建立MAC与PHY之间的通信。在数据传输模式下，沿着第一串行链路传送数据。空闲帧在空闲模式下沿着链路在空闲时间间隙内传送。 PHY通过在一个或多个MDIO帧中对管理数据输入/输出（MDIO）信息进行编码来管理，并且沿着第一串行链路传送空闲时间间隙内的一个或多个MDIO帧。

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