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    • 2. 发明申请
    • A DIFFERENTIAL CHARGE PUMP WITH EXTENDED OUTPUT CONTROL VOLTAGE RANGE
    • 具有扩展输出控制电压范围的差分电荷泵
    • WO2018080687A1
    • 2018-05-03
    • PCT/US2017/053269
    • 2017-09-25
    • QUALCOMM INCORPORATED
    • BANERJEE, AnirbanRASMUS, Todd Morgan
    • H03L7/089H03L7/093
    • H02M3/07G06F1/04H03L7/0891H03L7/0895H03L7/0896H03L7/093H03L7/099H03L2207/06
    • One aspect of the present disclosure relates to a method for operating a charge pump. The method includes comparing a drain voltage of a current sink transistor of the charge pump with a drain voltage of a current reference transistor, and adjusting a gate bias voltage of the current sink transistor and the current reference transistor in a direction that reduces a difference between the drain voltage of the current sink transistor and the drain voltage of the current reference transistor. The method also includes comparing a common-mode voltage of a loop filter with a reference voltage, and adjusting a gate bias voltage of a current source transistor of the charge pump in a direction that reduces a difference between the common-mode voltage of the loop filter and the reference voltage.
    • 本公开的一个方面涉及一种用于操作电荷泵的方法。 该方法包括将电荷泵的电流吸收晶体管的漏极电压与电流基准晶体管的漏极电压进行比较,并且在减小电流吸收晶体管与电流基准晶体管之间的差异的方向上调节电流吸收晶体管和电流基准晶体管的栅极偏置电压 电流吸收晶体管的漏极电压和电流参考晶体管的漏极电压。 该方法还包括将环路滤波器的共模电压与参考电压进行比较,并且在降低环路的共模电压之间的差的方向上调节电荷泵的电流源晶体管的栅极偏置电压 滤波器和参考电压。
    • 5. 发明申请
    • APPARATUS AND METHOD FOR CORRECTING BASELINE WANDER AND OFFSET INSERTION IN AC COUPLING CIRCUITS
    • 用于校正交流耦合电路中的基线WANDER和偏移插入的装置和方法
    • WO2018005084A1
    • 2018-01-04
    • PCT/US2017/037321
    • 2017-06-13
    • QUALCOMM INCORPORATED
    • RASMUS, Todd Morgan
    • H03F3/45
    • The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively.
    • 本发明涉及一种交流(AC)耦合电路,其包括具有第一和第二输入端子的第一和第二电容器,所述第一和第二输入端子被配置为接收输入差分信号并且在第一和第二输出端子处产生输出差分信号 的第一和第二电容器。 AC耦合电路还包括基线漂移校正电路,其被配置为使得输出差分信号由于包括一个或多个不平衡数据的时间间隔的输入差分信号而抵抗基线漂移。 基线漂移校正电路包括差分差分放大器(DDA),差分差分放大器(DDA)具有被配置为接收输入差分信号的第一差分输入,被配置为生成补偿差分信号的差分输出以及被配置为接收补偿差分信号的第二差分输入。 补偿差分信号分别通过一对电阻施加到第一和第二电容器的输出端。
    • 6. 发明申请
    • SYSTEM AND METHOD FOR CONTROLLING COMMON MODE VOLTAGE VIA REPLICA CIRCUIT AND FEEDBACK CONTROL
    • 用于通过重复电路和反馈控制来控制共模电压的系统和方法
    • WO2017172344A1
    • 2017-10-05
    • PCT/US2017/022196
    • 2017-03-13
    • QUALCOMM INCORPORATED
    • YUAN, XiaobinNATONIO, JosephPRASAD, MangalRASMUS, Todd Morgan
    • H03F3/45H03G1/00
    • The disclosure relates to a system and method for controlling a common mode voltage of an output differential signal of a differential signal processing circuit. The differential signal processing circuit includes two load devices (RL1, RL2), two input transistors (M11, M12), and two current-source transistors (M21, M22) coupled in series between voltage rails, respectively. A replica circuit includes replica load device (RL R ), replica input transistor (M1 R ), and replica current-source transistor (M2 R ) coupled in series between the voltage rails. The common mode voltage (VICM) of the input differential signal is applied to the replica input transistor (M1 R ) to generate a replica output common mode voltage. A feedback circuit generates a bias voltage for the replica current-source transistor (M2 R ) and the current-source transistors (M21, M22) of the differential circuit to control the output common mode voltage of the replica circuit and the differential signal processing circuit.
    • 控制差分信号处理电路的输出差分信号的共模电压的系统和方法技术领域本公开涉及用于控制差分信号处理电路的输出差分信号的共模电压的系统和方法。 差分信号处理电路包括分别串联耦合在电压轨之间的两个负载装置(RL1,RL2),两个输入晶体管(M11,M12)和两个电流源晶体管(M21,M22)。 复制电路包括复制负载装置(RL_R),复制输入晶体管(M1_R)和复制电流源晶体管(M2_R_R) )串联在电压轨之间。 输入差分信号的共模电压(VICM)被施加到复制输入晶体管(M1R)以产生复制输出共模电压。 反馈电路为差分电路的复制电流源晶体管(M2R)和电流源晶体管(M21,M22)生成偏置电压,以控制复制品的输出共模电压 电路和差分信号处理电路。