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1. 发明申请

WO2017204910A1 PER-INSTANCE PREAMBLE FOR GRAPHICS PROCESSING 审中-公开
标题翻译：用于图形处理的实例前导
公开(公告)号：WO2017204910A1
公开(公告)日：2017-11-30
申请号：PCT/US2017/026842
申请日：2017-04-10
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Lin , HAMMERSTONE, Richard , LIU, Jiaji , ZHANG, Chihong , GRUBER, Andrew Evan , DU, Yun
IPC分类号： G06F12/0862 , G06F12/06 , G06F9/38 , G06F9/45 , G06T15/00
摘要： A method for processing data in a graphics processing unit (GPU) including receiving an instance identifier for an instance and a shader program comprising a preamble code block and a main shader code block, assigning, the instance identifier to a general purpose register at wave creation, allocating address space within the constant memory for instance uniforms, and determining the preamble code block has not been executed and the wave is a first wave of the instance to be executed, based on determining the preamble code block has not been executed and the wave is the first wave to be executed, executing the preamble code block to store the plurality of instance uniforms in the constant memory and based, at least in part, on executing the preamble code block, executing the wave of the plurality of waves using at least one of the plurality of instance constants stored inconstant memory.
摘要翻译：一种用于在图形处理单元（GPU）中处理数据的方法，所述方法包括：接收用于实例的实例标识符和包括前导码代码块和主着色器代码块的着色器程序;分配所述实例标识符基于确定前导码而在波形创建时向通用寄存器分配恒定存储器内的地址空间以用于实例均匀化，并且确定前导码块还没有被执行并且波是要被执行的实例的第一波块尚未被执行并且波是要被执行的第一波，执行前导码代码块以将多个实例统一性存储在常量存储器中并且至少部分地基于执行前导码代码块，执行波使用所存储的不定内存的多个实例常量中的至少一个来执行所述多个波中的一个或多个

2. 发明申请

WO2017204909A1 PER-SHADER PREAMBLE FOR GRAPHICS PROCESSING 审中-公开
标题翻译：用于图形处理的每片预涂器
公开(公告)号：WO2017204909A1
公开(公告)日：2017-11-30
申请号：PCT/US2017/026835
申请日：2017-04-10
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Lin , DU, Yun , GRUBER, Andrew Evan , JIAO, Guofang , YU, Chun , GARCIA GARCIA, David Rigel
IPC分类号： G06T1/20
摘要： A method for processing data in a graphics processing unit including receiving a code block of instructions common to a plurality of groups of threads of a shader, executing the code block of instructions common to the plurality of groups of threads of the shader creating a result by a group of threads of the plurality of groups of threads, storing the result of the code block of instructions common to the plurality of groups of threads of the shader in on-chip random access memory (RAM) accessible by each of the plurality of groups of threads, and upon a determination that storing the result of the code block of instructions common to the plurality of groups of threads of the shader has completed, returning the result of the code block of instructions common to the plurality of groups of threads of the shader from on-chip RAM.
摘要翻译：一种用于处理图形处理单元中的数据的方法，所述方法包括：接收着色器的多个线程组所共有的指令的代码块;执行所述多个着色器的线程通过多个线程组中的线程组创建结果，将片上随机存取存储器（RAM）中的着色器的多个线程组所共有的指令的代码块的结果存储在存储器中，可由多个线程组中的每一个线程访问，并且在确定存储着色器的多个线程组共有的指令代码块的结果已完成时，将指令的代码块的结果返回到来自片上RAM的着色器的多组线程。

3. 发明申请

WO2015199997A1 LOAD SCHEME FOR SHARED REGISTER IN GPU 审中-公开
标题翻译： GPU中共享注册表的加载方案
公开(公告)号：WO2015199997A1
公开(公告)日：2015-12-30
申请号：PCT/US2015/035332
申请日：2015-06-11
申请人： QUALCOMM INCORPORATED
发明人： DU, Yun , GRUBER, Andrew Evan , CHEN, Lin , JIAO, Guofang , YU, Chun
IPC分类号： G09G5/36 , G06T1/60
CPC分类号： G06T1/60 , G06T15/80 , G09G5/363 , G09G2352/00 , G09G2360/06
摘要： Techniques are described for determining whether data of a variable for each of a plurality of graphics items is same. If determined that the data is the same, the techniques store the data in a storage location of a specialized shared general purpose register that is associated with the variable.
摘要翻译：描述了用于确定多个图形项目中的每一个的变量的数据是否相同的技术。如果确定数据相同，则该技术将数据存储在与变量相关联的专用共享通用寄存器的存储位置中。

4. 发明申请

WO2013184268A1 PADDING FOR MULTI-CHANNEL MEMORY 审中-公开
标题翻译：多通道存储器的安装
公开(公告)号：WO2013184268A1
公开(公告)日：2013-12-12
申请号：PCT/US2013/039725
申请日：2013-05-06
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Lin , AGARWAL, Piyush , CHEN, Long , CHEN, Lingjun
IPC分类号： G06T1/60
CPC分类号： G06T1/60
摘要： Techniques described in the disclosure are generally related to reserving padding bytes in system memory when storing data in the system memory. The reserving of padding bytes may allow a memory interface to efficiently utilize the channels to the system memory when storing or subsequently retrieving the data.
摘要翻译：本公开中描述的技术通常涉及在系统存储器中存储数据时在系统存储器中保留填充字节。填充字节的保留可以允许存储器接口在存储或随后检索数据时有效地利用到系统存储器的信道。

5. 发明申请

WO2009045929A1 SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS 审中-公开
标题翻译：将SHADER变量映射到物理寄存器的系统和方法
公开(公告)号：WO2009045929A1
公开(公告)日：2009-04-09
申请号：PCT/US2008/078005
申请日：2008-09-26
申请人： QUALCOMM INCORPORATED , CHEN, Lin , SUN, Junhong , JIAO, Guofang , ZHANG, Chihong , CHEN, Lingjun
发明人： CHEN, Lin , SUN, Junhong , JIAO, Guofang , ZHANG, Chihong , CHEN, Lingjun
IPC分类号： G06F9/45
CPC分类号： G06T15/005 , G06F8/441
摘要： The present disclosure includes system and method of mapping shader variables into physical registers. In an embodiment, a graphics processing unit (GPU) and a memory coupled to the GPU are disclosed. The memory includes a processor readable data file that has a register file portion. The register file portion has a rectangular structure including a plurality of data items. At least two of the plurality of data items corresponding to data elements of a shader program. The data elements have different data storage types.
摘要翻译：本公开包括将着色器变量映射到物理寄存器的系统和方法。在一个实施例中，公开了一种图形处理单元（GPU）和耦合到GPU的存储器。存储器包括具有寄存器文件部分的处理器可读数据文件。寄存器文件部分具有包括多个数据项的矩形结构。与着色器程序的数据元素对应的多个数据项中的至少两个。数据元素具有不同的数据存储类型。

6. 发明申请

WO2008033895A2 METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE 审中-公开
标题翻译：用于在对象空间中执行用户定义的剪辑的方法和设备
公开(公告)号：WO2008033895A2
公开(公告)日：2008-03-20
申请号：PCT/US2007/078237
申请日：2007-09-12
申请人： Qualcomm Incorporated , BI, Ning , CHEN, Lin , CHEN, Lingjun Frank
发明人： BI, Ning , CHEN, Lin , CHEN, Lingjun Frank
IPC分类号： G06T15/30
CPC分类号： G06T15/30
摘要： A method and device for performing and processing user-defined clipping in object space to reduce the number of computations needed for the clipping operation. The method and device also combine the modelview transformation of the vertex coordinates with projection transform. The user-defined clipping in object space provides a higher performance and less power consumption by avoiding generation of eye coordinates if there is no lighting. The device includes a driver for the user-defined clipping in the object space to perform dual mode user-defined clipping in object space when a lighting function is disabled and in eye space when the lighting function is enabled.
摘要翻译：一种用于在对象空间中执行和处理用户定义的限幅以减少剪切操作所需的计算次数的方法和装置。该方法和装置还将顶点坐标的模型视图变换与投影变换相结合。对象空间中的用户定义的剪辑通过避免在没有照明的情况下生成眼睛坐标来提供更高的性能和更低的功耗。该设备包括用于在对象空间中的用户定义的剪切的驱动器，以在禁用照明功能时在对象空间中执行双模式用户定义的剪辑，并且在启用照明功能时在眼睛空间中执行双模式用户定义的剪辑。

7. 发明申请

WO2016010681A1 VECTOR SCALING INSTRUCTIONS FOR USE IN AN ARITHMETIC LOGIC UNIT 审中-公开
标题翻译：在算术逻辑单元中使用的矢量放大指令
公开(公告)号：WO2016010681A1
公开(公告)日：2016-01-21
申请号：PCT/US2015/036960
申请日：2015-06-22
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Lin , GRUBER, Andrew Evan , JIAO, Guofang , HO, Chiente , ARGADE, Pramod Vasant
IPC分类号： G06F7/552 , G09C1/00
CPC分类号： G06F7/49936 , G06F7/552 , G06F2207/5525 , G09C1/00 , H04L2209/12
摘要： At least one processor may receive components of a vector, wherein each of the components of the vector comprises at least an exponent. The at least one processor may further determine a maximum exponent out of respective exponents of the components of the vector, and may determine a scaling value based at least in part on the maximum exponent. An arithmetic logic unit of the at least one processor may scale the vector, by subtracting the scaling value from each of the respective exponents of the components of the vector.
摘要翻译：至少一个处理器可以接收向量的分量，其中矢量的每个分量包括至少一个指数。所述至少一个处理器可以进一步确定向量的分量的相应指数中的最大指数，并且可以至少部分地基于最大指数来确定缩放值。所述至少一个处理器的算术逻辑单元可以通过从所述矢量的各个成分的各指数中减去所述缩放值来缩放所述向量。

8. 发明申请

WO2015167777A1 TECHNIQUES FOR SERIALIZED EXECUTION IN A SIMD PROCESSING SYSTEM 审中-公开
标题翻译：在SIMD处理系统中进行串行执行的技术
公开(公告)号：WO2015167777A1
公开(公告)日：2015-11-05
申请号：PCT/US2015/025362
申请日：2015-04-10
申请人： QUALCOMM INCORPORATED
发明人： GRUBER, Andrew Evan , CHEN, Lin , DU, Yun , BOURD, Alexei Vladimirovich
IPC分类号： G06F9/38
CPC分类号： G06F9/3851 , G06F9/3887
摘要： A SIMD processor may be configured to determine one or more active threads from a plurality of threads, select one active thread from the one or more active threads, and perform a divergent operation on the selected active thread. The divergent operation may be a serial operation.
摘要翻译： SIMD处理器可以被配置为从多个线程确定一个或多个活动线程，从一个或多个活动线程中选择一个活动线程，并对所选择的活动线程执行发散操作。发散操作可以是串行操作。

9. 发明申请

WO2014039206A1 EXECUTING SUBROUTINES IN A MULTI-THREADED PROCESSING SYSTEM 审中-公开
标题翻译：在多线程处理系统中执行子程序
公开(公告)号：WO2014039206A1
公开(公告)日：2014-03-13
申请号：PCT/US2013/054148
申请日：2013-08-08
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Lin
IPC分类号： G06F9/38
CPC分类号： G06F9/322 , G06F9/3851 , G06F9/3887
摘要： This disclosure is directed to techniques for executing subroutines in a single instruction, multiple data (SIMD) processing system that is subject to divergent thread conditions. In particular, a resume counter-based approach for managing divergent thread state is described that utilizes program module-specific minimum resume counters (MINRCs) for the efficient processing of control flow instructions. In some examples, the techniques of this disclosure may include using a main program MINRC to control the execution of a main program module and subroutine-specific MINRCs to control the execution of subroutine program modules. Techniques are also described for managing the main program MINRC and subroutine-specific MINRCs when subroutine call and return instructions are executed. Techniques are also described for updating a subroutine-specific MINRC to ensure that the updated MINRC value for the subroutine-specific MINRC is within the program space allocated for the subroutine.
摘要翻译：本公开涉及用于在单个指令中执行子程序的技术，其受到发散线程条件的多数据（SIMD）处理系统。特别地，描述了用于管理发散线程状态的基于恢复计数器的方法，其利用程序模块特定的最小恢复计数器（MINRC）来有效地处理控制流程指令。在一些示例中，本公开的技术可以包括使用主程序MINRC来控制主程序模块和子程序特定MINRC的执行以控制子程序模块的执行。还描述了在执行子程序调用和返回指令时管理主程序MINRC和子程序特定MINRC的技术。还描述了更新特定于子程序的MINRC的技术，以确保特定于子程序的MINRC的更新的MINRC值在为子程序分配的程序空间内。

10. 发明申请

WO2009045930A2 SHADER COMPILER SYSTEM AND METHOD 审中-公开
标题翻译：阴影编译器系统和方法
公开(公告)号：WO2009045930A2
公开(公告)日：2009-04-09
申请号：PCT/US2008/078006
申请日：2008-09-26
申请人： QUALCOMM INCORPORATED , CHEN, Lin , JIAO, Guofang , ZHANG, Chihong , SUN, Junhong
发明人： CHEN, Lin , JIAO, Guofang , ZHANG, Chihong , SUN, Junhong
IPC分类号： G06T15/50
CPC分类号： G06T15/50 , G06F8/41

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