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1. 发明申请

WO2008033895A2 METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE 审中-公开
标题翻译：用于在对象空间中执行用户定义的剪辑的方法和设备
公开(公告)号：WO2008033895A2
公开(公告)日：2008-03-20
申请号：PCT/US2007/078237
申请日：2007-09-12
申请人： Qualcomm Incorporated , BI, Ning , CHEN, Lin , CHEN, Lingjun Frank
发明人： BI, Ning , CHEN, Lin , CHEN, Lingjun Frank
IPC分类号： G06T15/30
CPC分类号： G06T15/30
摘要： A method and device for performing and processing user-defined clipping in object space to reduce the number of computations needed for the clipping operation. The method and device also combine the modelview transformation of the vertex coordinates with projection transform. The user-defined clipping in object space provides a higher performance and less power consumption by avoiding generation of eye coordinates if there is no lighting. The device includes a driver for the user-defined clipping in the object space to perform dual mode user-defined clipping in object space when a lighting function is disabled and in eye space when the lighting function is enabled.
摘要翻译：一种用于在对象空间中执行和处理用户定义的限幅以减少剪切操作所需的计算次数的方法和装置。该方法和装置还将顶点坐标的模型视图变换与投影变换相结合。对象空间中的用户定义的剪辑通过避免在没有照明的情况下生成眼睛坐标来提供更高的性能和更低的功耗。该设备包括用于在对象空间中的用户定义的剪切的驱动器，以在禁用照明功能时在对象空间中执行双模式用户定义的剪辑，并且在启用照明功能时在眼睛空间中执行双模式用户定义的剪辑。

2. 发明申请

WO2009045929A1 SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS 审中-公开
标题翻译：将SHADER变量映射到物理寄存器的系统和方法
公开(公告)号：WO2009045929A1
公开(公告)日：2009-04-09
申请号：PCT/US2008/078005
申请日：2008-09-26
申请人： QUALCOMM INCORPORATED , CHEN, Lin , SUN, Junhong , JIAO, Guofang , ZHANG, Chihong , CHEN, Lingjun
发明人： CHEN, Lin , SUN, Junhong , JIAO, Guofang , ZHANG, Chihong , CHEN, Lingjun
IPC分类号： G06F9/45
CPC分类号： G06T15/005 , G06F8/441
摘要： The present disclosure includes system and method of mapping shader variables into physical registers. In an embodiment, a graphics processing unit (GPU) and a memory coupled to the GPU are disclosed. The memory includes a processor readable data file that has a register file portion. The register file portion has a rectangular structure including a plurality of data items. At least two of the plurality of data items corresponding to data elements of a shader program. The data elements have different data storage types.
摘要翻译：本公开包括将着色器变量映射到物理寄存器的系统和方法。在一个实施例中，公开了一种图形处理单元（GPU）和耦合到GPU的存储器。存储器包括具有寄存器文件部分的处理器可读数据文件。寄存器文件部分具有包括多个数据项的矩形结构。与着色器程序的数据元素对应的多个数据项中的至少两个。数据元素具有不同的数据存储类型。

3. 发明申请

WO2009045930A2 SHADER COMPILER SYSTEM AND METHOD 审中-公开
标题翻译：阴影编译器系统和方法
公开(公告)号：WO2009045930A2
公开(公告)日：2009-04-09
申请号：PCT/US2008/078006
申请日：2008-09-26
申请人： QUALCOMM INCORPORATED , CHEN, Lin , JIAO, Guofang , ZHANG, Chihong , SUN, Junhong
发明人： CHEN, Lin , JIAO, Guofang , ZHANG, Chihong , SUN, Junhong
IPC分类号： G06T15/50
CPC分类号： G06T15/50 , G06F8/41

4. 发明申请

WO2009105725A2 SYSTEM AND METHOD FOR INSTRUCTION LATENCY REDUCTION IN GRAPHICS PROCESSING 审中-公开
标题翻译：图形处理中的指令减少的系统和方法
公开(公告)号：WO2009105725A2
公开(公告)日：2009-08-27
申请号：PCT/US2009/034792
申请日：2009-02-20
申请人： QUALCOMM INCORPORATED , CHEN, Lin
发明人： CHEN, Lin
IPC分类号： G06F15/16
CPC分类号： G06F8/443 , G06F8/445
摘要： A system, method and apparatus are disclosed, in which an instruction scheduler of a compiler, e.g., a shader compiler, reduces instruction latency based on a determined instruction distance between a dependent predecessor and successor instructions.
摘要翻译：公开了一种系统，方法和装置，其中编译器的指令调度器（例如，着色器编译器）基于从属前导和后继指令之间的确定的指令距离来减少指令等待时间。

5. 发明申请

WO2013036341A1 TECHNIQUES FOR HANDLING DIVERGENT THREADS IN A MULTI-THREADED PROCESSING SYSTEM 审中-公开
标题翻译：在多螺纹加工系统中处理多条螺纹的技术
公开(公告)号：WO2013036341A1
公开(公告)日：2013-03-14
申请号：PCT/US2012/050005
申请日：2012-08-08
申请人： QUALCOMM INCORPORATED , CHEN, Lin , GARCIA GARCIA, David Rigel , GRUBER, Andrew E. , JIAO, Guofang
发明人： CHEN, Lin , GARCIA GARCIA, David Rigel , GRUBER, Andrew E. , JIAO, Guofang
IPC分类号： G06F15/80 , G06F9/38 , G06F9/32
CPC分类号： G06F9/3887 , G06F9/322 , G06F9/3851
摘要： This disclosure describes techniques for handling divergent thread conditions in a multi-threaded processing system. In some examples, a control flow unit may obtain a control flow instruction identified by a program counter value stored in a program counter register. The control flow instruction may include a target value indicative of a target program counter value for the control flow instruction. The control flow unit may select one of the target program counter value and a minimum resume counter value as a value to load into the program counter register. The minimum resume counter value may be indicative of a smallest resume counter value from a set of one or more resume counter values associated with one or more inactive threads. Each of the one or more resume counter values may be indicative of a program counter value at which a respective inactive thread should be activated.
摘要翻译：本公开描述了用于处理多线程处理系统中的发散线程状况的技术。在一些示例中，控制流程单元可以获得由存储在程序计数器寄存器中的程序计数器值所标识的控制流程指令。控制流程指令可以包括指示控制流程指令的目标程序计数器值的目标值。控制流程单元可以选择目标程序计数器值和最小恢复计数器值之一作为加载到程序计数器寄存器中的值。最小恢复计数器值可以指示与一个或多个非活动线程相关联的一个或多个恢复计数器值的集合中的最小恢复计数器值。一个或多个恢复计数器值中的每一个可以指示应该激活相应的非活动线程的程序计数器值。

6. 发明申请

WO2009015225A1 DATA ACCESS TOOL FOR PROGRAMMABLE GRAPHICS HARDWARE 审中-公开
标题翻译：数据访问工具可编程图形硬件
公开(公告)号：WO2009015225A1
公开(公告)日：2009-01-29
申请号：PCT/US2008/070917
申请日：2008-07-23
申请人： QUALCOMM Incorporated , BOURD, Alexei V. , JIAO, Guofang , CHEN, Lin
发明人： BOURD, Alexei V. , JIAO, Guofang , CHEN, Lin
IPC分类号： G06T15/00
CPC分类号： G06T15/005
摘要： Methods and apparatuses for accessing data within programmable graphics hardware are provided. According to one aspect, a user inserts special log commands into a software program, which is compiled into instructions for the programmable graphics hardware to execute. The hardware writes data to an external memory during runtime according to a flow control protocol, and the software driver reads the data from the memory to display to the user.
摘要翻译：提供了在可编程图形硬件内访问数据的方法和装置。根据一个方面，用户将特殊的日志命令插入到可编程图形硬件执行的指令中的软件程序中。根据流控制协议，硬件在运行时将数据写入外部存储器，软件驱动程序从存储器读取数据以显示给用户。

7. 发明申请

WO2017020251A1 LOAD TESTING BASED ON NETWORK VIRTUALIZATION USING A CONTAINER 审中-公开
标题翻译：基于使用集装箱的网络虚拟化的负载测试
公开(公告)号：WO2017020251A1
公开(公告)日：2017-02-09
申请号：PCT/CN2015/086047
申请日：2015-08-04
申请人： HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP , LUO, Yang , SHADECK, Gal , CHEN, Lin , SHEN, Gencheng
发明人： LUO, Yang , SHADECK, Gal , CHEN, Lin , SHEN, Gencheng
IPC分类号： H04L12/26
CPC分类号： H04L43/50 , H04L43/045 , H04L43/0888
摘要： The present disclosure provides a method, apparatus and systems for load testing based on network virtualization. The method comprises receiving, by a manager, a load generator deployment request, wherein the request comprises a list of test groups inside a test scenario; creating, by the manager, containers for each test group through requests to a container engine; querying, by the manager, information about the created containers from the container engine; applying, by the manager, a rule to each container using a command; and generating and sending, by the manager, a load testing scenario file to a load testing tool for load testing, wherein the load testing scenario file contains group information and allocated container information.
摘要翻译：本公开提供了一种用于基于网络虚拟化的负载测试的方法，装置和系统。该方法包括由管理器接收负载生成器部署请求，其中所述请求包括测试场景内的测试组列表; 由管理人员通过向集装箱发动机的请求，为每个测试组创建容器; 由经理查询有关容器引擎创建的容器的信息; 由管理员使用命令将规则应用于每个容器; 以及由经理将负载测试场景文件生成并发送到用于负载测试的负载测试工具，其中负载测试场景文件包含组信息和分配的容器信息。

8. 发明申请

WO2007015915A1 BIT-DESKEWING IO METHOD AND SYSTEM 审中-公开
标题翻译： BIT-DESKEWING IO方法和系统
公开(公告)号：WO2007015915A1
公开(公告)日：2007-02-08
申请号：PCT/US2006/028092
申请日：2006-07-19
申请人： ATI TECHNOLOGIES, INC. , LEE, Edward , BOMDICA, Arvind , CHEN, Lin , GAUTHIER, Claude , HUYNH, Sam , NG, Hiok-Tiaq , LING, John , HO, Jennifer , M.K., Siji , YEE, Gin , MACRI, Joseph
发明人： LEE, Edward , BOMDICA, Arvind , CHEN, Lin , GAUTHIER, Claude , HUYNH, Sam , NG, Hiok-Tiaq , LING, John , HO, Jennifer , M.K., Siji , YEE, Gin , MACRI, Joseph
IPC分类号： H04L7/033
CPC分类号： H03L7/0814 , H03L7/07 , H03L7/0805 , H04L7/0004 , H04L7/0037 , H04L7/0337
摘要： An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.
摘要翻译：描述了用于位移校正的IO方法和系统。实施例包括具有在其间传送数据的多个组件的计算机系统。在一个实施例中，系统组件从发送组件接收正向选通信号和多个数据位信号。接收组件包括可选择对准正向选通采样时钟的正向选通时钟恢复电路，以便提高采样精度。接收组件还包括至少一个数据比特时钟恢复电路，可配置为对准数据比特采样时钟，以便提高采样精度，并接收来自正向选通时钟恢复电路的信号，使得数据比特采样时钟跟踪系统运行期间的正向选通采样时钟。

9. 发明申请

WO2005075645A1 THERAPEUTIC MOLECULES AND METHODS FOR GENERATING AND/OR SELECTING SAME 审中-公开
标题翻译：治疗分子和产生和/或选择它们的方法
公开(公告)号：WO2005075645A1
公开(公告)日：2005-08-18
申请号：PCT/AU2005/000140
申请日：2005-02-03
申请人： THE WALTER AND ELIZA HALL INSTITUTE OF MEDICAL RESEARCH , HUANG, David, C., S. , COLMAN, Peter, M. , DAY, Catherine, L. , ADAMS, Jerry, M. , CHEN, Lin , WILLIS, Simon, N. , WEI, Andrew , SMITH, Brian, J. , HINDS, Mark, G
发明人： HUANG, David, C., S. , COLMAN, Peter, M. , DAY, Catherine, L. , ADAMS, Jerry, M. , CHEN, Lin , WILLIS, Simon, N. , WEI, Andrew , SMITH, Brian, J. , HINDS, Mark, G
IPC分类号： C12N15/12
CPC分类号： C07K14/4747
摘要： The present invention relates generally to therapeutic molecules useful for inducing apoptosis of particular cells such as, but not limited to, cancer cells and methods for generating and/or selecting same. The present invention further provides methods for inducing apoptosis of cells such as cancer cells and pharmaceutical compositions useful for same. The present invention further provides methods for generating or selecting therapeutic agents capable of inducing apoptosis of particular cells by the selective inhibition of pro-survival proteins. The present invention further provides a computational approach to therapeutic molecule design based on structure-binding characteristics.
摘要翻译：本发明一般涉及用于诱导特定细胞凋亡的治疗分子，所述特定细胞例如但不限于癌细胞，以及用于产生和/或选择癌细胞的方法。本发明还提供诱导细胞凋亡的方法，例如癌细胞和对其有用的药物组合物。本发明还提供了通过选择性抑制前体存活蛋白来产生或选择能够诱导特定细胞凋亡的治疗剂的方法。本发明还提供了基于结构结合特征的治疗分子设计的计算方法。

10. 发明申请

WO2004094591A2 THREE-DIMENSIONAL STRUCTURES OF HDAC9 AND CABIN1 AND COMPOUND STRUCTURES AND METHODS RELATED THERETO 审中-公开
标题翻译： HDAC9和CABIN1的三维结构及其相关的化合物结构与方法
公开(公告)号：WO2004094591A2
公开(公告)日：2004-11-04
申请号：PCT/US2004/011744
申请日：2004-04-16
申请人： THE REGENTS OF THE UNIVERSITY OF COLORADO , HAN, Aidong , CHEN, Lin
发明人： HAN, Aidong , CHEN, Lin
IPC分类号： C12N
CPC分类号： C07K14/4716 , C07K14/4702 , C07K2299/00 , C12N9/16
摘要： Disclosed are the three-dimensional structures of two complexes: a Cabin 1/MEF2B/DNA complex and a MITR/MEF2B/DNA complex. Also disclosed are methods of using such structures and models derived therefrom in structure-based design methods to identify regulators of the interaction of MEF2 with its cognate ligands/corepressors, to compounds that can be designed or identified based on the knowledge of such structures and models, and to methods of using such compounds in therapeutic methods.
摘要翻译：公开了两种配合物的三维结构：一个宿舍1 / MEF2B / DNA复合物和MITR / MEF2B / DNA复合物。还公开了在基于结构的设计方法中使用这种结构和衍生的模型的方法，以基于这种结构和模型的知识来鉴定MEF2与其同源配体/共抑制因子的相互作用的调节剂可以被设计或鉴定的化合物，以及在治疗方法中使用这些化合物的方法。

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