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1. 发明授权

US4635186A Detection and correction of multi-chip synchronization errors 失效
标题翻译：检测和校正多芯片同步误差
公开(公告)号：US4635186A
公开(公告)日：1987-01-06
申请号：US506488
申请日：1983-06-20
申请人： Price W. Oman , Mark A. Rinaldi , Vito W. Russo , Gregory Salyer
发明人： Price W. Oman , Mark A. Rinaldi , Vito W. Russo , Gregory Salyer
IPC分类号： G06F9/38 , G06F9/22 , G06F9/28 , G06F13/42 , G06F11/00 , G06F13/00
CPC分类号： G06F13/4217 , G06F9/223 , G06F9/28
摘要： A uniprocessor if formed on plural independently controlled chips each including a primary instruction driven controller and a secondary error driven self-sequencing controller. Each instruction is supplied in parallel to each primary controller which generates an EXIT signal, as it completes execution, to a common external EXIT line. Hardware monitors the local EXIT signal and the common EXIT line state and activates the secondary controller, when a mismatch is detected, to set an on-chip reset predominant error latch driving a common external ERROR line, an ERROR-state on which also sets the latches and activates any inactive secondary controller to drive its chip to a first predetermined state and to reset its latch. When no ERROR signal remains, the secondary controllers cycle in synchronism through an ERROR routine, exiting to instruction control.
摘要翻译：单个处理器如果形成在多个独立控制的芯片上，每个独立控制芯片包括主指令驱动控制器和辅助错误驱动自排序控制器。每个指令并行提供给每个主控制器，它在完成执行时产生一个EXIT信号到一个共同的外部EXIT行。硬件监视本地EXIT信号和公共EXIT线路状态，并且当检测到不匹配时激活辅助控制器，以设置驱动公共外部ERROR线的片上复位主要错误锁存器，其中还设置锁存并激活任何无效的辅助控制器以将其芯片驱动到第一预定状态并重置其锁存器。当不存在ERROR信号时，二级控制器通过ERROR程序同步循环，退出指令控制。

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