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1. 发明授权

US06202141B1 Method and apparatus for performing vector operation using separate multiplication on odd and even data elements of source vectors 失效
标题翻译：用于使用源向量的奇数和偶数数据元素上的分离乘法执行向量操作的方法和装置
公开(公告)号：US06202141B1
公开(公告)日：2001-03-13
申请号：US09098063
申请日：1998-06-16
申请人： Keith Everett Diefendorff , Pradeep Kumar Dubey , Ronald Ray Hochsprung , Brett Olsson , Hunter Ledbetter Scales, III
发明人： Keith Everett Diefendorff , Pradeep Kumar Dubey , Ronald Ray Hochsprung , Brett Olsson , Hunter Ledbetter Scales, III
IPC分类号： G06F9302
CPC分类号： G06F9/30014 , G06F9/30025 , G06F9/30036
摘要： A vector multiplication mechanism is provided that partitions vector multiplication operation into even and odd paths. In an odd path, odd data elements of first and second source vectors are selected, and multiplication operation is performed between each of the selected odd data elements of the first source vector and corresponding one of the selected odd data elements of the second source vector. In an even path, even data elements of the source vectors are selected, and multiplication operation is performed between each of the selected even data elements of the first source vector and corresponding one of the selected even data elements of the second source vector. Elements of resultant data of the two paths are merged together in a merge operation. The vector multiplication mechanism of the present invention preferably uses a single general-purpose register to store the resultant data of the odd path and the even path. In addition, computational overhead of the merge operation is amortized over a series of vector operations.
摘要翻译：提供了向量乘法机制，其将矢量乘法运算分为偶数和奇数路径。在奇数路径中，选择第一和第二源向量的奇数数据元素，并且在第一源向量的所选择的奇数数据元素和第二源向量的所选奇数数据元素中的相应一个之间执行乘法运算。在偶数路径中，选择源向量的偶数数据元素，并且在第一源向量的所选择的偶数数据元素和第二源向量的所选择的偶数数据元素中的对应一个之间执行乘法运算。两个路径的结果数据的元素在合并操作中合并在一起。本发明的向量乘法机构优选地使用单个通用寄存器来存储奇数路径和偶数路径的结果数据。此外，合并操作的计算开销在一系列向量操作中进行分摊。

2. 发明授权

US06334176B1 Method and apparatus for generating an alignment control vector 失效
标题翻译：用于产生对准控制矢量的方法和装置
公开(公告)号：US06334176B1
公开(公告)日：2001-12-25
申请号：US09062152
申请日：1998-04-17
申请人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung
发明人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung
IPC分类号： G06F1500
CPC分类号： G06F9/30043 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3816 , G06F17/16
摘要： The data processing system loads three input operands, including two input vectors and a control vector, into vector registers and performs a permutation of the two input vectors as specified by the control vector, and further stores the result of the operation as the output operand in an output register. The control vector consists of sixteen indices, each uniquely identifying a single byte of input data in either of the input registers, and can be specified in the operational code or be the result of a computation previously performed within the vector registers. The control vector is specified by calculating the offset of a selected vector element of the input vector relative to a base address of the input vector and loading each element with an index equal to the relative offset. Alternatively, the generation of the alignment vector is made by performing a look-up within a look-up table. For additional loads from the same vector, the control vector does not change, since the alignment shift amount of the vector from an address boundary does not change. A permutation instruction can then be executed to load and shift the data to realign it in the output register at the vector boundary.
摘要翻译：数据处理系统将三个输入操作数，包括两个输入向量和一个控制向量加载到向量寄存器中，并执行由控制向量指定的两个输入向量的置换，并将该操作的结果作为输出操作数存储在输出寄存器。控制向量包括十六个索引，每个索引唯一地标识输入寄存器中的任一个输入数据的单个字节，并且可以在操作代码中指定，或者是先前在向量寄存器内执行的计算的结果。控制向量通过计算输入向量的选定向量元素相对于输入向量的基址的偏移量来指定，并以等于相对偏移的索引加载每个元素。或者，通过在查找表内执行查找来进行对齐向量的生成。对于来自相同向量的额外负载，控制向量不改变，因为来自地址边界的向量的对准移位量不改变。然后可以执行置换指令以加载和移位数据以在向量边界处的输出寄存器中重新对准它。

3. 发明授权

US06202130B1 Data processing system for processing vector data and method therefor 失效
标题翻译：用于处理矢量数据的数据处理系统及其方法
公开(公告)号：US06202130B1
公开(公告)日：2001-03-13
申请号：US09061975
申请日：1998-04-17
申请人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung , Bradford Byron Beavers , Bradley G. Burgess , Michael Dean Snyder , Cathy May , Edward John Silha
发明人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung , Bradford Byron Beavers , Bradley G. Burgess , Michael Dean Snyder , Cathy May , Edward John Silha
IPC分类号： G06F1200
CPC分类号： G06F9/30047 , G06F9/30101 , G06F12/0862 , G06F2212/6028
摘要： A data processing system includes a data processor (10) coupled to a memory system having a first memory, such as an L1 data cache (16), arranged with a second memory (such as an L2 cache) at a lower hierarchical level. The data processor (10) prefetches data elements of a vector into the first memory prior to processing such data elements. If a requested data element is not present in the first memory, a load request is issued to the second memory and to lower levels of the memory hierarchy until the requested data element is finally retrieved and stored in the first memory. The data processor (10) continues to prefetch subsequent data elements of the vector by considering the length of the data element and the stride of the vector. In one embodiment, the data processor (10) prefetches the vector into the first memory in response to a single data stream touch load (DST) instruction (100).
摘要翻译：数据处理系统包括耦合到具有诸如L1数据高速缓存（16）的第一存储器的存储器系统的数据处理器（10），其布置在较低分层级的第二存储器（例如L2高速缓存）。在处理这些数据元素之前，数据处理器（10）将向量的数据元素预取到第一存储器中。如果请求的数据元素不存在于第一存储器中，则向第二存储器发出加载请求，并将存储器层级降低到最低限度，直到所请求的数据元素被最终检索并存储在第一存储器中。数据处理器（10）通过考虑数据元素的长度和向量的步幅继续预取向量的后续数据元素。在一个实施例中，数据处理器（10）响应于单个数据流接触负载（DST）指令（100）将矢量预取到第一存储器中。

4. 发明授权

US06298365B1 Method and system for bounds comparator 有权
标题翻译：边界比较方法和系统
公开(公告)号：US06298365B1
公开(公告)日：2001-10-02
申请号：US09256375
申请日：1999-02-24
申请人： Pradeep Kumar Dubey , Brett Olsson , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III , Keith Everett Diefendorff
发明人： Pradeep Kumar Dubey , Brett Olsson , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III , Keith Everett Diefendorff
IPC分类号： G06F738
CPC分类号： G06F7/026 , G06F7/483
摘要： The invention relates to a method of using a “bounds” comparator scheme and to a “bounds” comparator circuit. The method of using this scheme or comparator circuit allows a quick and easy test to characterize, utilizing a single floating-point bounds comparison function, the location of a point with respect to pre-defined end- points. The single floating-point bounds comparison function represents an additional instruction to be incorporated within computer instruction set architectures when performing trivial acceptance testing during the generation of three-dimensional images or graphics.
摘要翻译：本发明涉及使用“边界”比较器方案和“边界”比较器电路的方法。使用该方案或比较器电路的方法允许使用单个浮点边界比较函数来表征相对于预定义端点的点的位置的快速和容易的测试。单个浮点边界比较函数表示在三维图像或图形的生成期间执行微不足道的验收测试时要结合在计算机指令集架构中的附加指令。

5. 发明授权

US06282628B1 Method and system for a result code for a single-instruction multiple-data predicate compare operation 有权
标题翻译：用于单指令多数据谓词比较操作的结果代码的方法和系统
公开(公告)号：US06282628B1
公开(公告)日：2001-08-28
申请号：US09256374
申请日：1999-02-24
申请人： Pradeep Kumar Dubey , Brett Olsson , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III , Keith Everett Diefendorff
发明人： Pradeep Kumar Dubey , Brett Olsson , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III , Keith Everett Diefendorff
IPC分类号： G06F1580
CPC分类号： G06F9/30021 , G06F9/30036 , G06F9/30072
摘要： A method and system is disclosed which summarizes the results of a classical single-instruction multiple-data SIMD predicate comparison operation, signaling whether all comparisons resulted in a false result or true result, and placing that status into a separate status register, such as the Power PC Condition Register. The method and system utilizes first and second status bits to support the signaling whether all element comparisons resulted in true or false. The first status bit is set when all element comparisons resulted in false (i.e. a NOR of all predicate comparison results), and the second status bit is set when all element comparisons resulted in true (i.e. an AND of all predicate comparison results). This capability allows control flow using conditional branching on the event when all comparison results are false or when all comparison results are true. The method and system of the present invention is useful in 3-D graphics such as lighting and trivial acceptance testing where executing down both paths of a branch and then selecting the correct result is not tolerable.
摘要翻译：公开了一种方法和系统，其总结了经典单指令多数据SIMD谓词比较操作的结果，指示所有比较是否导致错误结果或真实结果，并将该状态置于单独的状态寄存器中，例如电源条件寄存器。该方法和系统利用第一和第二状态位来支持信号是否所有元素比较导致真或假。当所有元素比较导致假（即所有谓词比较结果的NOR）时，第一个状态位被置位，当所有元素比较结果为真时（即所有谓词比较结果的AND），第二个状态位被置位。当所有比较结果为false或所有比较结果为真时，此功能允许使用事件上的条件分支进行控制流程。本发明的方法和系统在诸如照明和平凡验收测试的三维图形中是有用的，其中执行分支的两个路径，然后选择正确的结果是不允许的。

6. 发明授权

US5996057A Data processing system and method of permutation with replication within a vector register file 失效
标题翻译：数据处理系统和在向量寄存器文件中复制的排列方法
公开(公告)号：US5996057A
公开(公告)日：1999-11-30
申请号：US62100
申请日：1998-04-17
申请人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung
发明人： Hunter Ledbetter Scales, III , Keith Everett Diefendorff , Brett Olsson , Pradeep Kumar Dubey , Ronald Ray Hochsprung
IPC分类号： G06F9/30 , G06F9/312 , G06F9/315 , G06F15/78 , G06F9/305 , G06F9/34
CPC分类号： G06F9/30043 , G06F15/8084 , G06F9/30032 , G06F9/30036 , G06F9/30101 , G06F9/3816
摘要： The data processing system of the present invention loads three input operands, including two input vectors and a control vector, into vector registers and performs a permutation of the two input vectors as specified by the control vector, and further stores the result of the operation as the output operand in an output register. The control vector consists of sixteen indices, each uniquely identifying a single byte of input data in either of the input registers, and can be specified in the operational code or be the result of a computation previously performed within the vector registers. The specification of the control vector allows a vector-matrix operation to be performed on the input vectors by rearranging or replicating the input operand bytes in the bytes of the output register as a function of the control vector. This system provides a highly efficient register loading mechanism for data vectors misaligned in memory, and allows the computation of a serially dependent chain of binary functions within the vector registers.
摘要翻译：本发明的数据处理系统将包括两个输入向量和控制向量的三个输入操作数加载到向量寄存器中，并且执行由控制向量指定的两个输入向量的置换，并且将该操作的结果存储为输出寄存器中的输出操作数。控制向量包括十六个索引，每个索引唯一地标识输入寄存器中的任一个输入数据的单个字节，并且可以在操作代码中指定，或者是先前在向量寄存器内执行的计算的结果。控制向量的规范允许通过根据控制向量重新排列或复制输出寄存器的字节中的输入操作数字节来对输入向量执行向量矩阵运算。该系统为存储器中不对齐的数据矢量提供了高效的寄存器加载机制，并允许在向量寄存器内计算二进制函数的连续依赖链。

7. 发明授权

US06327651B1 Wide shifting in the vector permute unit 有权
标题翻译：矢量变换单位宽移
公开(公告)号：US06327651B1
公开(公告)日：2001-12-04
申请号：US09149466
申请日：1998-09-08
申请人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
发明人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
IPC分类号： G06F1500
CPC分类号： G06F7/766 , G06F5/015
摘要： A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.
摘要翻译：在处理器的多媒体设施内实现交叉开关以执行矢量置换操作，其中源操作数的字节在目标输出中重新排序。然后，交叉开关重新用于需要复用或移位操作的其他指令，特别是其中附加多路复用器的大小或桶形移位器的大小和延迟是显着的那些指令。例如，可以通过交叉开关和一个附加的多路复用器层或小桶形移位器以一个周期的等待时间来执行宽移位操作。因此，交叉开关设备被重新使用，现在共享交叉开关的指令的性能得到改善，并且减少处理器内的多媒体设备所需的总面积。

8. 发明授权

US06343337B1 Wide shifting in the vector permute unit 有权
标题翻译：矢量变换单位宽移
公开(公告)号：US06343337B1
公开(公告)日：2002-01-29
申请号：US09572058
申请日：2000-05-17
申请人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
发明人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
IPC分类号： G06F1300
CPC分类号： G06F7/766 , G06F5/015
摘要： A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.
摘要翻译：在处理器的多媒体设施内实现交叉开关以执行矢量置换操作，其中源操作数的字节在目标输出中重新排序。然后，交叉开关重新用于需要复用或移位操作的其他指令，特别是其中附加多路复用器的大小或桶形移位器的大小和延迟是显着的那些指令。例如，可以通过交叉开关和一个附加的多路复用器层或小桶形移位器以一个周期的等待时间来执行宽移位操作。因此，交叉开关设备被重新使用，现在共享交叉开关的指令的性能得到改善，并且减少处理器内的多媒体设备所需的总面积。

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