会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Thin film transistor and method for manufacturing thereof
    • 薄膜晶体管及其制造方法
    • US08760593B2
    • 2014-06-24
    • US12221615
    • 2008-08-05
    • Po-Lin ChenKuo-Yuan TuWen-Ching TsaiChun-Nan LinShu-Feng Wu
    • Po-Lin ChenKuo-Yuan TuWen-Ching TsaiChun-Nan LinShu-Feng Wu
    • G02F1/136H01L29/04H01L21/00
    • H01L29/458H01L27/124
    • A thin-film transistor (TFT) includes a gate electrode, a gate dielectric layer, a semiconductor layer, source/drain electrodes, a passivation layer and a protection layer. The gate electrode is disposed on a substrate. The gate dielectric layer covers the gate electrode and the substrate. The semiconductor layer is disposed on the gate dielectric layer and above the gate electrode. The semiconductor layer has a channel region disposed above the gate electrode and source/drain regions disposed at both sides of the channel region. The source/drain electrodes are disposed on the source/drain regions of the semiconductor layer and each has a barrier layer disposed on the source/drain regions of the semiconductor layer and a conductive layer disposed on the barrier layer. The passivation layer is disposed over the surface of the source/drain electrodes. The protection layer is disposed over the substrate, the passivation layer, and the channel region of the semiconductor layer.
    • 薄膜晶体管(TFT)包括栅电极,栅极电介质层,半导体层,源极/漏极,钝化层和保护层。 栅电极设置在基板上。 栅介质层覆盖栅电极和衬底。 半导体层设置在栅极电介质层上并在栅电极上方。 半导体层具有设置在沟道区两侧的栅电极和源极/漏极区上方的沟道区。 源极/漏极设置在半导体层的源极/漏极区域上,并且每个具有设置在半导体层的源极/漏极区域上的势垒层和设置在阻挡层上的导电层。 钝化层设置在源/漏电极的表面上。 保护层设置在衬底,钝化层和半导体层的沟道区之上。
    • 2. 发明申请
    • Thin film transistor and method for manufaturing thereof
    • 薄膜晶体管及其制造方法
    • US20090101903A1
    • 2009-04-23
    • US12221615
    • 2008-08-05
    • Po-Lin ChenKuo-Yuan TuWen-Ching TsaiChun-Nan LinShu-Feng Wu
    • Po-Lin ChenKuo-Yuan TuWen-Ching TsaiChun-Nan LinShu-Feng Wu
    • H01L33/00H01L21/00
    • H01L29/458H01L27/124
    • A thin-film transistor (TFT) includes a gate electrode, a gate dielectric layer, a semiconductor layer, source/drain electrodes, a passivation layer and a protection layer. The gate electrode is disposed on a substrate. The gate dielectric layer covers the gate electrode and the substrate. The semiconductor layer is disposed on the gate dielectric layer and above the gate electrode. The semiconductor layer has a channel region disposed above the gate electrode and source/drain regions disposed at both sides of the channel region. The source/drain electrodes are disposed on the source/drain regions of the semiconductor layer and each has a barrier layer disposed on the source/drain regions of the semiconductor layer and a conductive layer disposed on the barrier layer. The passivation layer is disposed over the surface of the source/drain electrodes. The protection layer is disposed over the substrate, the passivation layer, and the channel region of the semiconductor layer.
    • 薄膜晶体管(TFT)包括栅电极,栅极电介质层,半导体层,源极/漏极,钝化层和保护层。 栅电极设置在基板上。 栅介质层覆盖栅电极和衬底。 半导体层设置在栅极电介质层上并在栅电极上方。 半导体层具有设置在沟道区两侧的栅电极和源极/漏极区上方的沟道区。 源极/漏极设置在半导体层的源极/漏极区域上,并且每个具有设置在半导体层的源极/漏极区域上的势垒层和设置在阻挡层上的导电层。 钝化层设置在源/漏电极的表面上。 保护层设置在衬底,钝化层和半导体层的沟道区之上。
    • 4. 发明授权
    • Display panel structure and manufacture method thereof
    • 显示面板结构及其制造方法
    • US07902670B2
    • 2011-03-08
    • US11738718
    • 2007-04-23
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • H01L23/48
    • H01L29/4908H01L29/458H01L29/66757H01L29/66765
    • A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have copper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.
    • 提供一种其上设置有电路元件的显示面板结构及其制造方法。 显示面板包括基板和设置在基板上的电路元件。 电路元件具有第一界面层和第一导电层。 第一界面层和第一导电层都具有铜材料。 制造第一界面层的材料包括制成第一导电层的反应物或材料的化合物。 制造方法包括以下步骤:在基板上形成第一界面层; 在所述第一界面层上形成第一导电层; 并蚀刻第一导电层和界面层以形成图案。 第一界面的存在减少了第一导电层在衬底上的穿透,并改善了第一导电层和衬底之间的粘合力。
    • 5. 发明授权
    • Display panel structure and manufacture method thereof
    • 显示面板结构及其制造方法
    • US08062917B2
    • 2011-11-22
    • US12855837
    • 2010-08-13
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • H01L21/00
    • H01L29/4908H01L29/458H01L29/66757H01L29/66765
    • A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.
    • 提供一种其上设置有电路元件的显示面板结构及其制造方法。 显示面板包括基板和设置在基板上的电路元件。 电路元件具有第一界面层和第一导电层。 第一界面层和第一导电层都具有铜材料。 制造第一界面层的材料包括制成第一导电层的反应物或材料的化合物。 制造方法包括以下步骤:在基板上形成第一界面层; 在所述第一界面层上形成第一导电层; 并蚀刻第一导电层和界面层以形成图案。 第一界面的存在减少了第一导电层在衬底上的穿透,并改善了第一导电层和衬底之间的粘合力。
    • 6. 发明申请
    • Display Panel Structure and Manufacture Method Thereof
    • 显示器面板结构及其制造方法
    • US20080009108A1
    • 2008-01-10
    • US11738718
    • 2007-04-23
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • Chun-Nan LinKuo-Yuan TuShu-Feng WuWen-Ching Tsai
    • H01L21/84H01L21/00
    • H01L29/4908H01L29/458H01L29/66757H01L29/66765
    • A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have copper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.
    • 提供一种其上设置有电路元件的显示面板结构及其制造方法。 显示面板包括基板和设置在基板上的电路元件。 电路元件具有第一界面层和第一导电层。 第一界面层和第一导电层都具有铜材料。 制造第一界面层的材料包括制成第一导电层的反应物或材料的化合物。 制造方法包括以下步骤:在基板上形成第一界面层; 在所述第一界面层上形成第一导电层; 并蚀刻第一导电层和界面层以形成图案。 第一界面的存在减少了第一导电层在衬底上的穿透,并改善了第一导电层和衬底之间的粘合力。
    • 7. 发明授权
    • Pixel structure, display panel, eletro-optical apparatus, and method thererof
    • 像素结构,显示面板,电光设备及其方法
    • US08212256B2
    • 2012-07-03
    • US12060873
    • 2008-04-02
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • H01L29/04
    • H01L29/458H01L27/124H01L27/1255
    • A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.
    • 提供了一种设置在包括薄膜晶体管(TFT),底部电容器电极,电介质层,上部电容器电极,钝化层和像素电极的基板上的像素结构。 具有源极/漏极和底部电容器电极的TFT设置在衬底上。 电介质层设置在底部电容器电极上。 上部电容器电极具有半导体层,阻挡层和金属层。 半导体层设置在底部电容器电极上方的电介质层上。 阻挡层设置在半导体层上。 其材料包括铜,铜合金或其组合的金属层设置在阻挡层上。 钝化层覆盖TFT和上电容器电极,并且具有暴露源极/漏极的第一开口。 像素电极通过第一开口与TFT电连接。
    • 8. 发明申请
    • PIXEL STRUCTURE, DISPLAY PANEL, ELECTRO-OPTICAL APPARATUS, AND METHOD THEREOF
    • 像素结构,显示面板,电光设备及其方法
    • US20120261755A1
    • 2012-10-18
    • US13477077
    • 2012-05-22
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • H01L29/786H01L21/336
    • H01L29/458H01L27/124H01L27/1255
    • A pixel structure disposed on a substrate including a thin film transistor (TFT), a passivation layer, and a pixel electrode is provided. The TFT includes a gate, a dielectric layer, a channel layer, and a source/drain sequentially disposed on the substrate. The source/drain is disposed on a portion of the channel layer and has a semiconductor layer, a barrier layer and a metal layer. The barrier layer is disposed on a portion of the semiconductor layer. The metal layer is disposed on the barrier layer. The barrier layer is in contact with the semiconductor layer and the metal layer. Both of the metal layer and the barrier layer are positioned within a projection area of the semiconductor layer. The passivation layer covers the TFT and the dielectric layer and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.
    • 设置在包括薄膜晶体管(TFT),钝化层和像素电极的基板上的像素结构。 TFT包括顺序地设置在基板上的栅极,电介质层,沟道层和源极/漏极。 源极/漏极设置在沟道层的一部分上并具有半导体层,势垒层和金属层。 阻挡层设置在半导体层的一部分上。 金属层设置在阻挡层上。 阻挡层与半导体层和金属层接触。 金属层和阻挡层都位于半导体层的投影区域内。 钝化层覆盖TFT和电介质层,并且具有暴露源极/漏极的第一开口。 像素电极通过第一开口与TFT电连接。
    • 9. 发明申请
    • PIXEL STRUCTURE, DISPLAY PANEL, ELETRO-OPTICAL APPARATUS, AND METHOD THEREROF
    • 像素结构,显示面板,ELETRO-OPTICAL设备及其方法
    • US20090153056A1
    • 2009-06-18
    • US12060873
    • 2008-04-02
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • Po-Lin ChenChun-Nan LinShu-Feng WuWen-Ching Tsai
    • H01J7/44H01L21/04H01J9/00
    • H01L29/458H01L27/124H01L27/1255
    • A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.
    • 提供了一种设置在包括薄膜晶体管(TFT),底部电容器电极,电介质层,上部电容器电极,钝化层和像素电极的基板上的像素结构。 具有源极/漏极和底部电容器电极的TFT设置在衬底上。 电介质层设置在底部电容器电极上。 上部电容器电极具有半导体层,阻挡层和金属层。 半导体层设置在底部电容器电极上方的电介质层上。 阻挡层设置在半导体层上。 其材料包括铜,铜合金或其组合的金属层设置在阻挡层上。 钝化层覆盖TFT和上电容器电极,并且具有暴露源极/漏极的第一开口。 像素电极通过第一开口与TFT电连接。