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1. 发明授权

US08174807B2 Integrated circuit with device for protection against electrostatic discharges 有权
标题翻译：具有防静电放电设备的集成电路
公开(公告)号：US08174807B2
公开(公告)日：2012-05-08
申请号：US13195716
申请日：2011-08-01
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

2. 发明申请

US20110279936A1 INTEGRATED CIRCUIT WITH DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DISCHARGES 有权
标题翻译：集成电路与防静电放电防护装置
公开(公告)号：US20110279936A1
公开(公告)日：2011-11-17
申请号：US13195716
申请日：2011-08-01
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/04
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

3. 发明授权

US08014112B2 Integrated circuit with device for protection against electrostatic discharges 有权
标题翻译：具有防静电放电设备的集成电路
公开(公告)号：US08014112B2
公开(公告)日：2011-09-06
申请号：US12132352
申请日：2008-06-03
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

4. 发明申请

US20090040669A1 INTEGRATED CIRCUIT WITH DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DISCHARGES 有权
标题翻译：集成电路与防静电放电防护装置
公开(公告)号：US20090040669A1
公开(公告)日：2009-02-12
申请号：US12132352
申请日：2008-06-03
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

5. 发明授权

US4883993A Antibounce circuit for digital circuits 失效
标题翻译：数字电路防反弹电路
公开(公告)号：US4883993A
公开(公告)日：1989-11-28
申请号：US279036
申请日：1988-12-02
申请人： Pierangelo Confalonieri , Sergio Pernici , Germano Nicollini
发明人： Pierangelo Confalonieri , Sergio Pernici , Germano Nicollini
IPC分类号： H03K5/1252
CPC分类号： H03K5/1252
摘要： The antibounce circuit comprises:(a) a first flip-flop constituted by a first and a second NAND gate (10, 12) having their respective outputs connected to one of the inputs of the other gate, the free input of the first gate being the input for said digital signal;(b) a second flip-flop constituted by a third and fourth NAND gate (14, 16) having their respective outputs connected to one of the inputs of the other gate, the free input of the third gate being connected to the output of the first gate;(c) a non-inverting delay circuit (20, 22, 24) connecting the output of the third gate to the free input of the second gate;(d) a first inverter connecting the output of the delay circuit to the free input of the fourth gate.

6. 发明授权

US06535724B1 Receiver portion of a telephone 有权
标题翻译：电话的接收器部分
公开(公告)号：US06535724B1
公开(公告)日：2003-03-18
申请号：US09619193
申请日：2000-07-19
申请人： Sergio Pernici , Germano Nicollini
发明人： Sergio Pernici , Germano Nicollini
IPC分类号： H04B110
CPC分类号： H03G3/348
摘要： A receiver portion of a telephone includes a differential amplifier stage with a single output, an electroacoustic transducer connected between the output, via a capacitor and ground and a unit for controlling switching on/off, connected to the differential stage for the activation or deactivation thereof. To prevent annoying noises in the transducer upon switching on and off, the differential stage includes an operational amplifier having a first capacitor and a second capacitor in series with the inverting and the non-inverting input terminals. A third capacitor is connected between the inverting input and the output of the operational amplifier. A fourth capacitor is connected between the non-inverting input and a first reference-voltage terminal. A first switching capacitor is alternatively connectable between a second and a third reference-voltage terminal, or between the first input and the output of the operational amplifier. A second switching capacitor is alternatively connectable between a fourth and a fifth reference-voltage terminal, or between the second input of the operational amplifier and the fifth reference-voltage terminal.
摘要翻译：电话的接收机部分包括具有单个输出的差分放大器级，连接在输出之间的电声换能器，经由电容器和接地以及用于控制开关导通/断开的单元，连接到差动级以用于其激活或停用。为了防止在接通和断开时换能器中的烦扰，差动级包括运算放大器，其具有与反相和非反相输入端串联的第一电容器和第二电容器。第三电容器连接在反相输入端和运算放大器的输出端之间。第四电容器连接在非反相输入端和第一参考电压端子之间。第一开关电容器可交替地连接在第二和第三参考电压端子之间，或在运算放大器的第一输入端和输出端之间。第二开关电容器可交替地连接在第四和第五参考电压端子之间，或在运算放大器的第二输入端与第五参考电压端子之间。

7. 发明授权

US5668494A Circuit and method for driving alternatively electric loads with low impedance 失效
标题翻译：用于驱动具有低阻抗的交替电负载的电路和方法
公开(公告)号：US5668494A
公开(公告)日：1997-09-16
申请号：US451030
申请日：1995-05-31
申请人： Germano Nicollini , Sergio Pernici
发明人： Germano Nicollini , Sergio Pernici
IPC分类号： H03F3/68 , H03F3/72 , H03K17/693 , H03F3/18
CPC分类号： H03F3/68 , H03F3/72 , Y10T307/461
摘要： An electronic driver circuit for low-impedance loads, being of a type which comprises an input terminal (IN) to which a voltage signal (Vin) is applied for alternate transfer to an output, and a plurality of output terminals (OUTi), each connected to a corresponding electric load (2), further comprises, between the input terminal and the output terminals, a single operational amplifier (3) having multiple output stages (7), one for each output terminal (OUTi). The operational amplifier (3) is of the single-ended or fully differential multistage type and allows each load to be driven alternately by activation of the corresponding output stage (7i).
摘要翻译：一种用于低阻抗负载的电子驱动电路，它是一种类型，它包括一个输入端（IN），一个电压信号（Vin）被施加到输出的交替传输，以及多个输出端（OUTi）连接到相应的电负载（2），在输入端和输出端之间还包括具有多个输出级（7）的单个运算放大器（3），每个输出端（OUTi）一个。运算放大器（3）是单端或全差分多级型，通过激活相应的输出级（7i）可以交替地驱动每个负载。

8. 发明授权

US5212455A Differential output, power, CMOS, operational amplifier 失效
标题翻译：差分输出，功率，CMOS，运算放大器
公开(公告)号：US5212455A
公开(公告)日：1993-05-18
申请号：US811153
申请日：1991-12-19
申请人： Sergio Pernici , Germano Nicollini
发明人： Sergio Pernici , Germano Nicollini
IPC分类号： H03F1/08 , H03F3/30 , H03F3/45
CPC分类号： H03F3/3023 , H03F1/086 , H03F3/45192 , H03F3/45654 , H03F2203/45296 , H03F2203/45421 , H03F2203/45651 , H03F2203/45711 , H03F2203/45722
摘要： A power CMOS operational amplifier with a differential output, having an intrinsically stable current absorption under rest conditions, comprises two symmetric branches, each comprising a first folded cascode input inverting stage, a level shifting circuit, a second currant mirror type noninverting amplifying stage and a third output inverting stage, constituted by a complementary pair of transistors, connected in a common source configuration between the supply rails and driven by the output of the second noninverting stage and by the output of the level shifting circuit. Frequency compensation is accomplished by means of two capacitors connected between each of the two output terminals of the amplifier and the output of the first inverting stage and a node of the output branch of the noninverting current mirror stage. A single common mode feedback network stabilizes both symmetric branches of the amplifier.

9. 发明授权

US4829266A CMOS power operational amplifier 失效
标题翻译： CMOS功率运算放大器
公开(公告)号：US4829266A
公开(公告)日：1989-05-09
申请号：US206016
申请日：1988-06-10
申请人： Sergio Pernici , Germano Nicollini , Daniel Senderowicz
发明人： Sergio Pernici , Germano Nicollini , Daniel Senderowicz
IPC分类号： H03F3/345 , H03F1/08 , H03F3/30 , H03F3/34 , H03F3/347 , H03F3/45
CPC分类号： H03F1/083 , H03F3/3001
摘要： A CMOS power operational amplifier with large output voltage swing and high noise rejection is obtained by coupling a folded cascode type differential input stage and an output stage comprising an intermediate signal shifting amplifier and two common source output stages. Constant current generators inject into the drain of grounded gate MOS transistors pairs of said folded cascode type stage and of said intermediate signal shifting amplifier, respectively, a current which is pulled out of the source of the same grounded gate transistors by other constant current generators for increasing the effective transconductance of said grounded gate transistors pairs.

10. 发明授权

US5541555A High performance transconductance operational amplifier of the CMOS integrated type 失效
标题翻译： CMOS集成型高性能跨导运算放大器
公开(公告)号：US5541555A
公开(公告)日：1996-07-30
申请号：US347574
申请日：1994-11-30
申请人： Sergio Pernici
发明人： Sergio Pernici
IPC分类号： H03F1/08 , H03F1/34 , H03F1/52 , H03F3/45
CPC分类号： H03F1/086 , H03F3/45183 , H03F2203/45632 , H03F2203/45651 , H03F2203/45711
摘要： High-performance operational transconductance amplifier monolithically integrable with CMOS technology comprising a differential input stage connected to a pair of cascode stages and a differential output stage. The output stage comprises two output transistors whose gate terminals are connected to nodes for connection of the input stage and the cascode stages. The output terminals of the amplifier are connected to intermediate nodes of the cascode stages through capacitors.
摘要翻译：可与CMOS技术单片集成的高性能运算跨导放大器，包括连接到一对共源共栅级和差分输出级的差分输入级。输出级包括两个输出晶体管，其栅极端子连接到节点以连接输入级和共源共栅级。放大器的输出端子通过电容器连接到共源共栅级的中间节点。

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