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1. 发明授权

US08174807B2 Integrated circuit with device for protection against electrostatic discharges 有权
标题翻译：具有防静电放电设备的集成电路
公开(公告)号：US08174807B2
公开(公告)日：2012-05-08
申请号：US13195716
申请日：2011-08-01
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

2. 发明申请

US20110279936A1 INTEGRATED CIRCUIT WITH DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DISCHARGES 有权
标题翻译：集成电路与防静电放电防护装置
公开(公告)号：US20110279936A1
公开(公告)日：2011-11-17
申请号：US13195716
申请日：2011-08-01
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/04
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

3. 发明授权

US08014112B2 Integrated circuit with device for protection against electrostatic discharges 有权
标题翻译：具有防静电放电设备的集成电路
公开(公告)号：US08014112B2
公开(公告)日：2011-09-06
申请号：US12132352
申请日：2008-06-03
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

4. 发明申请

US20090040669A1 INTEGRATED CIRCUIT WITH DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DISCHARGES 有权
标题翻译：集成电路与防静电放电防护装置
公开(公告)号：US20090040669A1
公开(公告)日：2009-02-12
申请号：US12132352
申请日：2008-06-03
申请人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
发明人： Pierangelo Confalonieri , Riccardo Martignone , Sergio Pernici
IPC分类号： H02H9/00
CPC分类号： H01L27/0288
摘要： An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
摘要翻译：集成电路包括半导体材料的衬底，由衬底制成的第一电路环境，其包括输出端子和用于接收可用于端子之间的第一电源电压的第一对电源端子。集成电路还包括由半导体衬底制成的第二电路环境，该第二电路环境包括电耦合到输出端子的输入端子，并且还包括第二对电源端子，用于接收适用于第二对端子之间的第二电源电压说第二对电路还包括提供防止静电放电的装置，其包括耦合在输入和输出端子之间的集成电阻装置。

5. 发明授权

US07675449B2 Current steering digital-analog converter particularly insensitive to packaging stresses 有权
标题翻译：电流转向数模转换器特别对包装应力不敏感
公开(公告)号：US07675449B2
公开(公告)日：2010-03-09
申请号：US12172692
申请日：2008-07-14
申请人： Pierangelo Confalonieri , Marco Zamprogno , Riccardo Martignone
发明人： Pierangelo Confalonieri , Marco Zamprogno , Riccardo Martignone
IPC分类号： H03M1/66
CPC分类号： H03M1/0648 , H03M1/687 , H03M1/747
摘要： A current steering digital-analog converter for converting a digital code into an analog signal, the converter including a substrate of semiconductor material, an array of current generators integrated in the substrate, a common summation node and switches controllable on the basis of the digital code for connecting and disconnecting the current generators to and from the common summation node. The current generators are adapted to provide the common summation node with currents having a multiple value according to a power of two compared to a unit current value provided to the summation node by a current generator of the array of generators. The current generator is divided into a base number of modular current generation elements in parallel to one another at least equal to two.
摘要翻译：一种用于将数字代码转换为模拟信号的电流转向数模转换器，所述转换器包括半导体材料的衬底，集成在衬底中的电流发生器的阵列，公共求和节点和基于数字代码可控的开关用于将当前发生器连接到和从公共求和节点断开连接。电流发生器适于根据与发电机阵列的电流发生器提供给求和节点的单位电流值相比的功率，为公共求和节点提供具有多个值的电流。电流发生器被分成基本数量的模块化电流产生元件，彼此平行至少等于2。

6. 发明授权

US07400285B2 Circuit for reconstructing an analog signal from a digital signal and transmission system, particularly for WCDMA cellular telephony, including such circuit 有权
标题翻译：用于重建来自数字信号和传输系统的模拟信号的电路，特别是用于包括这种电路的WCDMA蜂窝电话
公开(公告)号：US07400285B2
公开(公告)日：2008-07-15
申请号：US11569630
申请日：2005-05-19
申请人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
发明人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
IPC分类号： H03M1/66
CPC分类号： H04B1/707
摘要： A circuit for reconstructing an analog signal starting from a digital input signal includes a digital to analog converter and a low pass-filter connected at the output of the converter for receiving the analog format signal and outputting a reconstructed analog signal. The low pass filter is an active filter continuous in time and current-coupled to the output of the digital-analog converter. The digital-analog converter is of the current-steering type functioning at a sampling frequency greater than the Nyquist frequency of the analog signal.
摘要翻译：用于重建从数字输入信号开始的模拟信号的电路包括数模转换器和连接在转换器输出端的低通滤波器，用于接收模拟格式信号并输出重构的模拟信号。低通滤波器是时间上连续的有源滤波器，并且与数模转换器的输出电流耦合。数模转换器是以大于模拟信号的奈奎斯特频率的采样频率工作的电流导向型。

7. 发明申请

US20070262894A1 Circuit For Reconstructing an Analog Signal From a Digital Signal and Transmission System, Particularly For Wcdma Cellular Telephony, Including Such Circuit 有权
标题翻译：用于从数字信号和传输系统重建模拟信号的电路，特别是用于Wcdma蜂窝电话，包括此类电路
公开(公告)号：US20070262894A1
公开(公告)日：2007-11-15
申请号：US11569630
申请日：2005-05-19
申请人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
发明人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
IPC分类号： H03M1/66 , H04M1/78
CPC分类号： H04B1/707
摘要： There is described a circuit for reconstructing an analog signal from a digital signal and wide-band transmission system, particularly for employment in cellular telephony systems, or more in general in mobile communication systems, that adopt the WCDMA standard. The circuit comprises: a digital to analog converter (DAC) suitable for receiving said digital signal and converting it into signal in analog.format;—a low pass-filter (LOW-PASS) connected at the output of said converter for receiving said signal in analog format and providing as output said reconstructed analog signal. Advantageously, the low pass filter (LOW-PASS) is an active filter continuous in time and current coupled to the output of the digital-analog converter (DAC) and the digital-analog converter (DAC) is a converter of the current-steering type functioning at sampling frequency greater than the Nyquist frequency of said analog signal to be reconstructed.
摘要翻译：描述了一种用于从数字信号和宽带传输系统重建模拟信号的电路，特别是用于蜂窝电话系统中的用途，或更一般地在采用WCDMA标准的移动通信系统中。该电路包括：适于接收所述数字信号并将其转换成模拟信号的数模转换器（DAC）; - 在所述转换器的输出处连接的低通滤波器（低通滤波器），用于接收所述信号以模拟格式提供并提供所述重构的模拟信号作为输出。有利地，低通滤波器（LOW-PASS）是连续的数字模拟转换器（DAC）的输出端的时间和电流连续的有源滤波器，并且数模转换器（DAC）是电流转向器在大于待重构的所述模拟信号的奈奎斯特频率的采样频率下工作。

8. 发明授权

US06940348B2 Differential amplifier circuit with common mode output voltage regulation 有权
标题翻译：差分放大电路采用共模输出电压调节
公开(公告)号：US06940348B2
公开(公告)日：2005-09-06
申请号：US10471807
申请日：2002-07-05
申请人： Pierangelo Confalonieri , Germano Nicollini , Riccardo Martignone
发明人： Pierangelo Confalonieri , Germano Nicollini , Riccardo Martignone
IPC分类号： H03F1/30 , H03F3/45
CPC分类号： H03F3/45937 , H03F1/303
摘要： The circuit comprises a differential amplifier with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal of the amplifier and the outputs there are connected first and second capacitors and first and second capacitive elements that by controlled switches are connected in parallel with, respectively, the first and second capacitors or alternately between first and second reference voltage terminals. The common mode output voltage is not exactly fixed at the beginning of the design, but is determined by attributing appropriate values to the first and second capacitive elements; more particularly, their capacitances C3 and C4 are chosen in such a way as to satisfy the following equality: Vcmn=Vrefl+[(Vrefp−Vrefm)/2]*(C4−C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vrefl is the voltage of the second reference terminal.
摘要翻译：该电路包括具有两个输入和两个输出的差分放大器和一个共模调节电路。在放大器的调节端子和输出端之间，连接有第一和第二电容器以及通过受控开关分别与第一和第二电容器或第一和第二参考电压端子并联连接的第一和第二电容元件。共模输出电压在设计开始时不是完全固定的，而是通过将适当的值归因于第一和第二电容元件来确定的; 更具体地说，它们的电容C3和C4以满足以下等式的方式选择：<？in-line-formula description =“In-line formula”end =“lead”？> Vcmn = Vrefl + [（Vrefp- Vrefm）/ 2] *（C 4 -C 3）/（C 3 + C 4），<？in-line-formula description =“In-line formula”end =“tail”？>其中Vcmn是所需的公共模式输出电压，Vrefp和Vrefm是差分输出电压，Vrefl是第二参考端子的电压。

9. 发明授权

US07742893B2 Calibration circuit for calibrating an adjustable capacitance of an integrated circuit having a time constant depending on said capacitance 有权
标题翻译：用于校准具有取决于所述电容的时间常数的集成电路的可调电容的校准电路
公开(公告)号：US07742893B2
公开(公告)日：2010-06-22
申请号：US12035308
申请日：2008-02-21
申请人： Pierangelo Confalonieri , Riccardo Martignone , Marco Zamprogno
发明人： Pierangelo Confalonieri , Riccardo Martignone , Marco Zamprogno
IPC分类号： G01R35/00
CPC分类号： H03H1/02 , H03H7/0153 , H03H2210/021 , H03H2210/025 , H03H2210/036 , H03H2210/043
摘要： A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop. The calibration circuit includes: a controllable capacitance unit suitable to receive a control signal and including at least one array of switched capacitors that can be activated by the control signal, the unit being such as to output a first signal characterized by a parameter depending on the amount of capacitance of the array activated by the control signal; a comparison unit suitable to receive the first signal to assess whether the parameter meets a preset condition and to output a comparison signal representative of the assessment result; a control and timing logic unit suitable to receive the comparison signal to change this control signal based on the comparison signal, characterized in that the first signal is a logic signal and the parameter is a time parameter of the first signal.
摘要翻译：校准电路根据可调电容校准具有时间常数的电路的可调电容。校准电路输出一个载有用于校准电容器的信息的校准信号，并包括校准环路。所述校准电路包括：可控电容单元，其适于接收控制信号并且包括可被所述控制信号激活的至少一个开关电容阵列，所述单元使得输出第一信号，所述第一信号的特征在于根据由控制信号激活的阵列的电容量; 适于接收第一信号以评估参数是否满足预置条件并输出表示评估结果的比较信号的比较单元; 适于接收比较信号以根据比较信号改变该控制信号的控制和定时逻辑单元，其特征在于，第一信号是逻辑信号，该参数是第一信号的时间参数。

10. 发明申请

US20090051401A1 CALIBRATION CIRCUIT FOR AN ADJUSTABLE CAPACITANCE 有权
标题翻译：用于可调节电容的校准电路
公开(公告)号：US20090051401A1
公开(公告)日：2009-02-26
申请号：US12035235
申请日：2008-02-21
申请人： Pierangelo Confalonieri , Riccardo Martignone , Germano Nicollini
发明人： Pierangelo Confalonieri , Riccardo Martignone , Germano Nicollini
IPC分类号： H03L5/00
CPC分类号： H03H7/0153 , H03H1/02 , H03H2210/021 , H03H2210/043
摘要： A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps. The calibration circuit includes a controllable capacitance for receiving a control signal and including an array of switched capacitors selectively activated by the control signal to connect to a first common node that conducts a voltage value depending on the total capacitance value of the activated capacitors; an assessment unit for comparing this voltage value with a reference voltage to output a logic signal that can transition between first and second logic levels; a control and timing unit to receive the logic signal and change the control signal to carry out a subsequent calibration step that is provided at the end of the integration interval during a comparison interval of a preset duration, which allows a transition of the logic signal to occur prior to the beginning of the consecutive calibration step.
摘要翻译：一种用于校准具有取决于可调电容的时间常数的电路的可调电容的校准电路，所述校准电路产生用于校准电容的校准信号，并且包括适于在几个连续步骤中执行校准循环的校准环路。校准电路包括用于接收控制信号并包括由控制信号选择性激活的开关电容阵列的可控电容，以连接到第一公共节点，该第一公共节点根据所激活的电容器的总电容值传导电压值; 评估单元，用于将该电压值与参考电压进行比较，以输出可在第一和第二逻辑电平之间转换的逻辑信号; 控制和定时单元，用于接收逻辑信号并改变控制信号，以执行在预设持续时间的比较间隔期间在积分间隔结束时提供的随后的校准步骤，这允许将逻辑信号转换为在连续校准步骤开始之前发生。

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