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    • 1. 发明授权
    • Read-only memory and corresponding method of manufacturing by MOS
technology
    • 只读存储器和相应的MOS技术制造方法
    • US5970348A
    • 1999-10-19
    • US962398
    • 1997-10-31
    • Philippe BoivinRichard Fournel
    • Philippe BoivinRichard Fournel
    • H01L21/8246H01L27/112H01L24/8246
    • H01L27/11266H01L27/112
    • In a method for the manufacture of cells of a read-only memory, each cell comprises a MOS transistor formed by a first diffusion and a second diffusion of impurities of a first type in a semiconductor substrate with impurities of a second type. These two diffusions are separated by a channel surmounted by a gate. A thick oxide zone is made in the zone designed for the first diffusion, so that the making of the diffusions leads to a first diffusion in two parts separated by this thick oxide zone, a first part adjoining the channel and a second part on the periphery of the transistor. A particular encoding step makes it possible, by means of a mask, to eliminate the thick oxide in certain cells so that these encoded cells have a first continuous diffusion.
    • 在制造只读存储器的单元的方法中,每个单元包括通过第一扩散形成的MOS晶体管和在半导体衬底中的第一类型的杂质与第二类杂质的第二扩散。 这两个扩散通过由栅极上的通道分开。 在设计用于第一扩散的区域中制造厚的氧化物区域,使得扩散的制造导致在由该厚氧化物区域分离的两个部分中的第一扩散,邻接通道的第一部分和周边上的第二部分 的晶体管。 特定的编码步骤可以通过掩模去除某些细胞中的厚氧化物,使得这些编码的细胞具有第一连续扩散。
    • 3. 发明授权
    • Magnetic RAM
    • 磁性RAM
    • US07315071B2
    • 2008-01-01
    • US11323060
    • 2005-12-30
    • Philippe Boivin
    • Philippe Boivin
    • H01L29/82
    • H01L43/12B82Y10/00G11C11/16H01L27/228
    • A memory element for a magnetic RAM, contained in a recess of an insulating layer, the recess including a portion with slanted sides extending down to the bottom of the recess, the memory element including a first magnetic layer portion substantially conformally covering the bottom of the recess and the recess portion with slanted sides and in contact, at the level of the bottom of the recess, with a conductive portion, a non-magnetic layer portion substantially conformally covering the first magnetic layer portion and a second magnetic layer portion covering the non-magnetic layer portion.
    • 一种用于磁性RAM的存储元件,包含在绝缘层的凹部中,该凹部包括具有向下延伸到凹部底部的倾斜侧的部分,该存储元件包括基本上保形地覆盖该凹部的底部的第一磁性层部分 凹部和具有倾斜侧面并且在凹部的底部的接触处的凹部具有导电部分,基本上保形地覆盖第一磁性层部分的非磁性层部分和覆盖非凹槽部分的第二磁性层部分, - 磁性层部分。
    • 4. 发明申请
    • Magnetic RAM
    • 磁性RAM
    • US20060145198A1
    • 2006-07-06
    • US11323060
    • 2005-12-30
    • Philippe Boivin
    • Philippe Boivin
    • H01L29/768
    • H01L43/12B82Y10/00G11C11/16H01L27/228
    • A memory element for a magnetic RAM, contained in a recess of an insulating layer, the recess including a portion with slanted sides extending down to the bottom of the recess, the memory element including a first magnetic layer portion substantially conformally covering the bottom of the recess and the recess portion with slanted sides and in contact, at the level of the bottom of the recess, with a conductive portion, a non-magnetic layer portion substantially conformally covering the first magnetic layer portion and a second magnetic layer portion covering the non-magnetic layer portion.
    • 一种用于磁性RAM的存储元件,包含在绝缘层的凹部中,该凹部包括具有向下延伸到凹部底部的倾斜侧的部分,该存储元件包括基本上保形地覆盖该凹部的底部的第一磁性层部分 凹部和具有倾斜侧面并且在凹部的底部的接触处的凹部具有导电部分,基本上保形地覆盖第一磁性层部分的非磁性层部分和覆盖非凹部的第二磁性层部分, - 磁性层部分。
    • 7. 发明授权
    • Manufacturing process for an integrated circuit comprising double gate
components
    • 包括双门组件的集成电路的制造工艺
    • US4997777A
    • 1991-03-05
    • US284425
    • 1988-12-14
    • Philippe Boivin
    • Philippe Boivin
    • H01L21/28H01L21/336H01L21/8234H01L27/088H01L29/08H01L29/78
    • H01L29/66575H01L21/28273H01L21/82345H01L29/0847H01L29/66636H01L29/7834
    • A process for manufacturing integrated circuits comprising insulated gate MOS transistors and double gate memory components, comprises the following steps: forming on the areas where the memory components will be formed a first insulating layer (2) and a first gate level (4); forming on the transistor areas and the memory areas a second insulating layer (5), a second gate level (6) and a first photoresist layer (7); etching the first photoresist layer and the second gate level according to chosen configurations; coating the transistor areas with a second photoresist layer (20). This process further comprises the following steps: selectively etching the second photoresist layer at the center of the places where the transistor drains and sources are to be formed; etching the apparent oxide areas and then the apparent gate and substrate areas; removing the second photoresist layer; and carrying out an ionic implantation of the drains and sources.
    • 一种用于制造包括绝缘栅MOS晶体管和双栅存储器组件的集成电路的方法,包括以下步骤:在要形成存储器组件的区域上形成第一绝缘层(2)和第一栅极级(4); 在晶体管区域和存储区域上形成第二绝缘层(5),第二栅极层(6)和第一光致抗蚀剂层(7); 根据选择的配置蚀刻第一光致抗蚀剂层和第二栅极电平; 用第二光致抗蚀剂层(20)涂覆晶体管区域。 该方法还包括以下步骤:在晶体管漏极和源将要形成的位置的中心处选择性地蚀刻第二光致抗蚀剂层; 蚀刻表观氧化物区域,然后蚀刻表观栅极和衬底区域; 去除所述第二光致抗蚀剂层; 并进行排水和离子源的离子注入。