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1. 发明申请

US20100177560A1 NON-VOLATILE MEMORY CIRCUIT INCLUDING VOLTAGE DIVIDER WITH PHASE CHANGE MEMORY DEVICES 有权
标题翻译：非易失性存储器电路，包括具有相变存储器件的电压分压器
公开(公告)号：US20100177560A1
公开(公告)日：2010-07-15
申请号：US12354121
申请日：2009-01-15
申请人： Peter J. McElheny , Richard G. Smolen , John C. Costello
发明人： Peter J. McElheny , Richard G. Smolen , John C. Costello
IPC分类号： G11C11/00
CPC分类号： G11C14/009 , G11C13/0004
摘要： A memory circuit including a voltage divider with a first phase change memory (PCM) device and a second PCM device coupled to the first PCM device is described. In one embodiment, the first PCM device is in a set resistance state and the second PCM device is in a reset resistance state. Also, in one embodiment, the voltage divider further includes a first switch coupled to the first PCM device and a second switch coupled to the first switch and the second PCM device. In one embodiment, the memory circuit further includes a half latch coupled to the voltage divider and a cascade transistor coupled to the half latch and the voltage divider.
摘要翻译：描述了包括具有第一相变存储器（PCM）装置的分压器和耦合到第一PCM装置的第二PCM装置的存储器电路。在一个实施例中，第一PCM器件处于设定电阻状态，第二PCM器件处于复位电阻状态。而且，在一个实施例中，分压器还包括耦合到第一PCM器件的第一开关和耦合到第一开关和第二PCM器件的第二开关。在一个实施例中，存储器电路还包括耦合到分压器的半锁存器和耦合到半锁存器和分压器的级联晶体管。

2. 发明授权

US08130538B2 Non-volatile memory circuit including voltage divider with phase change memory devices 有权
标题翻译：包括具有相变存储器件的分压器的非易失性存储器电路
公开(公告)号：US08130538B2
公开(公告)日：2012-03-06
申请号：US12354121
申请日：2009-01-15
申请人： Peter J. McElheny , Richard G. Smolen , John C. Costello
发明人： Peter J. McElheny , Richard G. Smolen , John C. Costello
IPC分类号： G11C11/00
CPC分类号： G11C14/009 , G11C13/0004
摘要： A memory circuit including a voltage divider with a first phase change memory (PCM) device and a second PCM device coupled to the first PCM device is described. In one embodiment, the first PCM device is in a set resistance state and the second PCM device is in a reset resistance state. Also, in one embodiment, the voltage divider further includes a first switch coupled to the first PCM device and a second switch coupled to the first switch and the second PCM device. In one embodiment, the memory circuit further includes a half latch coupled to the voltage divider and a cascade transistor coupled to the half latch and the voltage divider.
摘要翻译：描述了包括具有第一相变存储器（PCM）装置的分压器和耦合到第一PCM装置的第二PCM装置的存储器电路。在一个实施例中，第一PCM器件处于设定电阻状态，第二PCM器件处于复位电阻状态。而且，在一个实施例中，分压器还包括耦合到第一PCM器件的第一开关和耦合到第一开关和第二PCM器件的第二开关。在一个实施例中，存储器电路还包括耦合到分压器的半锁存器和耦合到半锁存器和分压器的级联晶体管。

3. 发明授权

US5905675A Biasing scheme for reducing stress and improving reliability in EEPROM cells 失效
标题翻译：用于减小应力并提高EEPROM单元可靠性的偏置方案
公开(公告)号：US5905675A
公开(公告)日：1999-05-18
申请号：US995870
申请日：1997-12-22
申请人： Raminda U. Madurawe , Richard G. Smolen , Minchang Liang , James D. Sansbury , John E. Turner , John C. Costello , Myron W. Wong
发明人： Raminda U. Madurawe , Richard G. Smolen , Minchang Liang , James D. Sansbury , John E. Turner , John C. Costello , Myron W. Wong
IPC分类号： G11C16/04 , G11C16/26 , G11C29/50 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , G11C16/0441 , G11C16/3427 , G11C29/50 , G11C29/50004 , H01L27/115 , H01L27/11558 , G11C16/04 , G11C16/26 , G11C2216/10
摘要： Disclosed is a method for biasing dual row line EEPROM cells. The new biasing scheme improves the data retention lifetime of an EEPROM cell by reducing the potential difference between the control gate and the write column of the cell, which reduces the tunnel oxide electric field. In a preferred embodiment, the method involves applying bias voltages to the control gate and write column of an EEPROM cell such that the potential difference between the control gate and the right column is no more than about 0.5 volts. By biasing the cell's write column to a positive voltage, the tunnel oxide field may be significantly reduced. Moreover, the invention provides a method of selecting a write column voltage based on a control gate voltage such that the tunnel oxide field is substantially balanced in all its modes. This biasing scheme minimizes SILC and improves cell reliability.
摘要翻译：公开了一种用于偏置双行线EEPROM单元的方法。新的偏置方案通过减小控制栅极和单元的写入列之间的电位差来改善EEPROM单元的数据保持寿命，这降低了隧道氧化物电场。在优选实施例中，该方法包括将偏置电压施加到EEPROM单元的控制栅极和写入列，使得控制栅极与右列之间的电位差不超过约0.5伏特。通过将单元的写入列偏置为正电压，隧道氧化物场可能会显着减少。此外，本发明提供了一种基于控制栅极电压来选择写入列电压的方法，使得隧道氧化物场在其所有模式中基本平衡。该偏置方案使SILC最小化，并提高了单元的可靠性。

4. 发明授权

US07863497B2 Disposable absorbent article designed to facilitate an easy change 有权
标题翻译：设计的一次性吸收制品便于改变
公开(公告)号：US07863497B2
公开(公告)日：2011-01-04
申请号：US11545187
申请日：2006-10-10
申请人： Luke R. Magee , George B. Glackin, III , Christopher J. Hosmer , Naomi S. Korn , James D. Wilson , Mark C. Bates , Mattias Schmidt , Eva Susanne Dominique Thurnay , Joerg Mueller , John C. Costello , Ann M. Sullivan , Gregg A. Flender , Donald C. Roe , Mark J. Kline , Kenneth Edwin Jewell
发明人： Luke R. Magee , George B. Glackin, III , Christopher J. Hosmer , Naomi S. Korn , James D. Wilson , Mark C. Bates , Mattias Schmidt , Eva Susanne Dominique Thurnay , Joerg Mueller , John C. Costello , Ann M. Sullivan , Gregg A. Flender , Donald C. Roe , Mark J. Kline , Kenneth Edwin Jewell
IPC分类号： A61F13/15
CPC分类号： A61F13/84 , A61F13/495 , A61F13/51394 , A61F13/51496 , A61F13/5622 , A61F13/5633 , A61F2013/51377 , A61F2013/8497 , G06Q30/02 , G06Q30/06 , G06Q40/02
摘要： A disposable absorbent article to be worn about the lower torso of a wearer that facilitates an easy, intuitive change is provided. The disposable absorbent article includes at least one serviceable indicium that facilitates an easy change by providing alignment of the article relative to an anatomical feature of the wearer or by externally highlighting one or more components of the article thereby indicating alignment and fit about the wearer's lower torso.
摘要翻译：提供了一种易于佩戴的一次性吸收制品，其能够容易地直观地改变穿戴者的下部躯干。一次性吸收制品包括至少一个可使用的标记，其通过提供制品相对于穿着者的解剖特征的对准或通过外部突出显示制品的一个或多个部件，从而指示对准并适合佩戴者的下身，从而容易地改变。

5. 外观设计

USD545195S1 Bottle 失效
公开(公告)号：USD545195S1
公开(公告)日：2007-06-26
申请号：US29211206
申请日：2004-08-12
申请人： John C. Costello , Alexandre Hennen
设计人： John C. Costello , Alexandre Hennen

6. 外观设计

USD506673S1 Tooth-shaped bottle cap 失效
公开(公告)号：USD506673S1
公开(公告)日：2005-06-28
申请号：US29211205
申请日：2004-08-12
申请人： Bradford Grant , John C. Costello , Alexandre Hennen
设计人： Bradford Grant , John C. Costello , Alexandre Hennen

7. 外观设计

USD442673S1 Water control product handle 失效
标题翻译：防水产品手柄
公开(公告)号：USD442673S1
公开(公告)日：2001-05-22
申请号：US29119600
申请日：2000-03-06
申请人： Edward R. Donath, Jr. , Lizabeth Dretzka , Eduardo Milrud , John C. Costello , Stephanie C. Schwarz , David Malina , Thorben Neu
设计人： Edward R. Donath, Jr. , Lizabeth Dretzka , Eduardo Milrud , John C. Costello , Stephanie C. Schwarz , David Malina , Thorben Neu

8. 外观设计

USD431072S Shower arm 失效
公开(公告)号：USD431072S
公开(公告)日：2000-09-19
申请号：US111741
申请日：1999-10-04
申请人： Eduardo Milrud , Daniel C. Buchner , Eric D. Green , Shannon E. Mason , John C. Costello , David Malina , Stephanie C. Schwarz , Thorben Neu
设计人： Eduardo Milrud , Daniel C. Buchner , Eric D. Green , Shannon E. Mason , John C. Costello , David Malina , Stephanie C. Schwarz , Thorben Neu

9. 发明授权

US5850365A Sense amplifier with individually optimized high and low power modes 失效
标题翻译：感应放大器，具有单独优化的高功率和低功耗模式
公开(公告)号：US5850365A
公开(公告)日：1998-12-15
申请号：US772567
申请日：1996-12-24
申请人： Dirk A. Reese , Myron W. Wong , John C. Costello
发明人： Dirk A. Reese , Myron W. Wong , John C. Costello
IPC分类号： G11C7/06 , G11C7/02
CPC分类号： G11C7/067
摘要： The present invention is a sense amplifier circuit for use with programmable logic devices that provides improved switching time by actively limiting the voltage swing on the bit line which it is sensing, rather than passively sensing the voltage, employs feedback circuits to further improve switching time and may be selectively operated in low power mode without significant reduction in switching speed. Voltage reference control circuitry, comprising variable current limiters controlled by the potential of a supply of reference potential, can be added to improve noise immunity. The circuitry of the supply of reference potential is designed so that its sensitivity to fabrication variations is substantially similar to that of the sense amplifier and so that it adjusts the reference potential accordingly.
摘要翻译：本发明是一种与可编程逻辑器件一起使用的读出放大器电路，通过主动地限制其正在感测的位线上的电压摆幅而不是被动地感测电压来提供改进的开关时间，采用反馈电路来进一步提高开关时间，可以选择性地在低功率模式下操作而不显着降低开关速度。可以添加包括由参考电位供应的电位控制的可变电流限制器的电压参考控制电路，以提高抗噪声性能。设计参考电位的电路被设计成使得其对制造变化的敏感度基本上类似于读出放大器的灵敏度，并因此相应地调整参考电位。

10. 外观设计

USD324376S Modular computer 失效
公开(公告)号：USD324376S
公开(公告)日：1992-03-03
申请号：US331542
申请日：1989-03-31
申请人： Richard E. Leitermann , Neal H. Marshall , John C. Costello , Gianfranco D. Zaccai
设计人： Richard E. Leitermann , Neal H. Marshall , John C. Costello , Gianfranco D. Zaccai

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