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    • 3. 发明授权
    • Integrated circuit built-in type supply power delay circuit
    • 集成电路内置式电源延时电路
    • US5886550A
    • 1999-03-23
    • US877408
    • 1997-06-16
    • Jong-Kee KwonGyu-Dong KimOok KimChang-Jun OhJong-Ryul LeeWon-Chul SongKyung-Soo Kim
    • Jong-Kee KwonGyu-Dong KimOok KimChang-Jun OhJong-Ryul LeeWon-Chul SongKyung-Soo Kim
    • G11C5/14H03K17/22
    • H03K17/223
    • An integrated circuit built-in type power delay circuit which is capable of supplying a stable supply power to each circuit of the integrated circuit by generating a supply power control signal voltage after a predetermined time. The circuit includes a receiving unit for receiving a supply voltage VDD and charging the same, a supplying unit for supplying a current, an inverting unit for inverting an output value from the charging unit, a switching unit controlled in accordance with an output value from the inverting unit for switching an output from the current supply unit, a current regenerating unit for receiving a control of the switching unit and discharging an output value from the charging unit, an electric potential value conversion unit controlled by an output value from the inverting unit for converting an output value from the charging unit into a low level, and a buffering unit for receiving an output value from the inverting unit for buffering the output value and outputting a non-inverted signal.
    • 一种集成电路内置型功率延迟电路,其能够通过在预定时间之后产生电源功率控制信号电压来向集成电路的每个电路提供稳定的供电。 该电路包括:接收单元,用于接收电源电压VDD并对其进行充电;提供单元,用于提供电流;反相单元,用于反转来自充电单元的输出值;开关单元,根据来自 用于切换来自电流供应单元的输出的反相单元,用于接收开关单元的控制并从充电单元放电输出值的电流再生单元,由来自反相单元的输出值控制的电位值转换单元, 将来自充电单元的输出值转换为低电平;以及缓冲单元,用于从反相单元接收输出值,用于缓冲输出值并输出非反相信号。
    • 6. 发明授权
    • Low power consumption comparator circuit
    • 低功耗比较电路
    • US5600269A
    • 1997-02-04
    • US352830
    • 1994-12-02
    • Won-Chul SongChang-Jun OhJong-Ryul LeeHae-Wook ChoiBang-Sup Song
    • Won-Chul SongChang-Jun OhJong-Ryul LeeHae-Wook ChoiBang-Sup Song
    • G11C11/409G11C7/06H03F3/45H03K3/356H03K5/08H03K5/24H03M1/34G11C7/00
    • H03K3/356156G11C7/062H03F3/45076H03K3/356139H03K3/356191H03K5/2481H03K5/249
    • Disclosed is a low power-consumption type comparator circuit having two input terminals for receiving two input signals, one of which is an input reference signal and the other of which is an input comparison signal, and two output terminals, the circuit comprising signal converting portion for converting the input signals into current signals, respectively; switching portion for controlling transmission of the current signals to output terminals of the circuit in response to a latch signal indicating a latch operation or a normal operation of the circuit; high level holding portion for maintaining each voltage level of the output terminals to a logical high-state only when the latch operation of the circuit is not performed; amplifying/determining portion for amplifying the current signals and determining logical level of the input comparison signal; and output feedback portion for receiving output signals of the output terminals and enabling to make a current flowing in the circuit to a zero-state, only while the circuit is at the latch operation. Since a current-consumption is at a zero-state during the normal operation of the comparator circuit, the comparator circuit has a low power-consumption characteristic.
    • 公开了一种低功耗型比较器电路,具有用于接收两个输入信号的两个输入端,其中一个输入信号是输入参考信号,另一个是输入比较信号,两个输出端包括信号转换部分 用于将输入信号分别转换为电流信号; 切换部分,用于响应于指示电路的锁存操作或正常操作的锁存信号,控制电流信号传输到电路的输出端; 高电平保持部分,用于仅当不执行电路的锁存操作时,将输出端子的每个电压电平维持为逻辑高电平状态; 放大/确定部分,用于放大当前信号并确定输入比较信号的逻辑电平; 以及输出反馈部分,用于接收输出端子的输出信号,并且仅在电路处于锁存操作时才能使电流在电路中流动到零状态。 由于在比较器电路的正常工作期间电流消耗处于零状态,因此比较器电路具有低功耗特性。