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1. 发明授权

US06809567B1 System and method for multiple-phase clock generation 有权
标题翻译：用于多相时钟生成的系统和方法
公开(公告)号：US06809567B1
公开(公告)日：2004-10-26
申请号：US09989645
申请日：2001-11-20
申请人： Ook Kim , Hung Sung Li , Inyeol Lee , Gyudong Kim , Yongman Lee
发明人： Ook Kim , Hung Sung Li , Inyeol Lee , Gyudong Kim , Yongman Lee
IPC分类号： H03L700
CPC分类号： H03K23/542 , G06F1/06 , H03K5/15013 , H03L7/0891 , H03L7/0995
摘要： A system and method for multiple-phase clock generation is disclosed. In one embodiment, a multiple-stage voltage controlled oscillator (“VCO”) transmits a plurality of clock phases to a clock divider circuit which produces the desired number of clock phase outputs. The clock divider circuit in this embodiment includes a state machine, e.g., a modified Johnson counter, that provides a plurality of divided down clock phases, each of which is connected to a separate modified shift register. Each modified shift register contains D-type flip-flops and each D-type flip-flop provides a separate clock phase output. In one embodiment the number of clock phase outputs of the multiple-phase clock is a function of the number of VCO clock phases times the number of desired states in the modified Johnson counter.
摘要翻译：公开了一种用于多相时钟产生的系统和方法。在一个实施例中，多级压控振荡器（“VCO”）将多个时钟相位发送到产生期望数量的时钟相位输出的时钟分频器电路。该实施例中的时钟分频器电路包括一个状态机，例如修改的约翰逊计数器，其提供多个划分的下降时钟相位，每个分频下降沿连接到单独的修改的移位寄存器。每个修改的移位寄存器包含D型触发器，每个D型触发器提供单独的时钟相位输出。在一个实施例中，多相时钟的时钟相位输出的数量是VCO时钟相位数乘以修改的约翰逊计数器中期望状态数量的函数。

2. 发明授权

US06717478B1 Multi-phase voltage controlled oscillator (VCO) with common mode control 有权
标题翻译：具有共模控制的多相压控振荡器（VCO）
公开(公告)号：US06717478B1
公开(公告)日：2004-04-06
申请号：US09989587
申请日：2001-11-20
申请人： Ook Kim , Hung Sung Li , Inyeol Lee , Gyudong Kim , Yongman Lee
发明人： Ook Kim , Hung Sung Li , Inyeol Lee , Gyudong Kim , Yongman Lee
IPC分类号： H03B2700
CPC分类号： H03L7/0995 , H03B5/24 , H03B27/00 , H03L7/0891
摘要： A voltage controlled oscillator (“VCO”) circuit capable of generating signals with reduced jitter and/or low-phase noise is provided. One embodiment provides a plurality of cascaded VCO cells, where each VCO cell can include a source coupled differential pair, a bias transistor connected to the differential pair for biasing the differential pair, a resistive load pair connected to the differential pair, and a voltage controlled capacitor pair or varactor pair connected to the differential pair. The varactors provide control over the frequency of the oscillations produced by the VCO circuit in combination with a control voltage. A phase frequency detector combined with a charge pump and loop filter provide the control voltage.
摘要翻译：提供了能够产生具有降低的抖动和/或低相位噪声的信号的压控振荡器（“VCO”）电路。一个实施例提供多个级联VCO单元，其中每个VCO单元可以包括源极耦合差分对，连接到差分对的偏置晶体管，用于偏置差分对，连接到差分对的电阻负载对，以及电压控制电容器对或变容二极管对连接到差分对。变容二极管提供对由VCO电路产生的振荡频率与控制电压的组合的控制。与电荷泵和环路滤波器组合的相位检波器提供控制电压。

3. 发明授权

US08384634B2 Display with reduced parasitic effects 有权
标题翻译：显示减少的寄生效应
公开(公告)号：US08384634B2
公开(公告)日：2013-02-26
申请号：US12504220
申请日：2009-07-16
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3655 , G02F2001/133328 , G02F2001/133331 , G02F2201/46 , G09G2300/0426 , H05K1/0237 , H05K1/162 , H05K1/189 , H05K2201/0792 , H05K2201/10136
摘要： Visual artifacts in a display are reduced by moving, to the extent possible, display driver components to the display surface itself, thereby shortening conductor distances and reducing the parasitic effects caused by parasitic resistance of the conductors between the display power supply and the display, and between the stabilizing capacitors and the display. To avoid interference with the device housing, low-profile driver components, including either or both of stabilizing capacitors and power supply terminals, can be provided and bonded to the surface of the display side of the outer layer of the display. Alternatively, the stabilizing capacitors can be formed on the display side in the same way that, e.g., in an LCD display, the transparent electrodes for controlling the liquid crystals are formed.
摘要翻译：通过在可能的范围内移动显示器表面本身的显示驱动器组件来减少显示器中的视觉赝像，从而缩短导体距离并减少由于显示电源和显示器之间的导体的寄生电阻引起的寄生效应，以及在稳定电容器和显示器之间。为了避免与设备壳体的干涉，可以提供包括稳定电容器和电源端子中的一个或两者的低调驱动器部件并将其结合到显示器的外层的显示侧的表面。或者，稳定化电容器可以以与例如LCD显示器相同的方式在显示器侧上形成，形成用于控制液晶的透明电极。

4. 发明申请

US20130009899A1 DISPLAY HAVING A PLURALITY OF DRIVER INTEGRATED CIRCUITS 有权
标题翻译：显示有多个驱动器集成电路
公开(公告)号：US20130009899A1
公开(公告)日：2013-01-10
申请号：US13620014
申请日：2012-09-14
申请人： Shawn R. Gettemy , Carlin J. Vieri , Yongman Lee , Wei H. Yao
发明人： Shawn R. Gettemy , Carlin J. Vieri , Yongman Lee , Wei H. Yao
IPC分类号： G09G3/36 , G06F3/041 , G06F3/038
CPC分类号： G02F1/13452 , G02F1/136277 , G02F2202/103 , G09G3/3666 , G09G2300/0417 , G09G2300/0426 , G09G2320/0223
摘要： An electronic device is disclosed. In some embodiments, the electronic device includes a liquid-crystal display (LCD) and a plurality of driver integrated circuits (ICs) coupled to the LCD. The driver ICs may be disposed near non-central locations along a side of the LCD, and in some embodiments, one of the driver ICs may be a master driver IC and the other driver IC or driver ICs may be slave driver ICs.
摘要翻译：公开了一种电子设备。在一些实施例中，电子设备包括液晶显示器（LCD）和耦合到LCD的多个驱动器集成电路（IC）。驱动器IC可以布置在沿着LCD的一侧的非中心位置附近，并且在一些实施例中，驱动器IC中的一个可以是主驱动器IC，并且其它驱动器IC或驱动器IC可以是从驱动器IC。

5. 发明申请

US20110193854A1 SYNCHRONOUS BUS DRIVING METHOD 审中-公开
标题翻译：同步总线驱动方法
公开(公告)号：US20110193854A1
公开(公告)日：2011-08-11
申请号：US12839121
申请日：2010-07-19
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G06F3/038 , H03K17/16
CPC分类号： G06F1/10 , G06F2213/0038 , G09G3/3648 , G09G2310/08 , G09G2320/0223 , G09G2330/06 , G09G2370/08 , H03K19/00346
摘要： Techniques are provided for synchronizing the data signals transmitted through a synchronous bus in a display device. One embodiment includes manipulating the clock signals and/or data signals transmitted by a display controller in the display based on the location on the bus where a data signal is to be transmitted. For example, a pre-emphasized clock signal having a higher initial voltage level may be used for a data signal transmitted farther on the bus from the display controller. The pre-emphasized clock signal may compensate for propagation delays associated with transmitting the data signal through the bus. Further, a de-emphasized clock signal may be used for data signals transmitted to a section on the bus closer on to the display controller, and neutral clock signals may be used for data signals transmitted to a section that is of intermediate distance from the display controller.
摘要翻译：提供了用于使通过显示设备中的同步总线传输的数据信号同步的技术。一个实施例包括基于总线上要发送数据信号的位置来操纵由显示控制器在显示器中发送的时钟信号和/或数据信号。例如，具有较高初始电压电平的预先强调的时钟信号可以用于从显示控制器在总线上传输得更远的数据信号。预先强调的时钟信号可以补偿与通过总线发送数据信号相关联的传播延迟。此外，去加重的时钟信号可以用于发送到总线上更靠近显示控制器的部分的数据信号，并且中性时钟信号可以用于发送到距离显示器的中间距离的部分的数据信号控制器。

6. 发明申请

US20110037747A1 CROSSTALK REDUCTION IN LCD PANELS 有权
标题翻译：液晶面板中的减速机
公开(公告)号：US20110037747A1
公开(公告)日：2011-02-17
申请号：US12846597
申请日：2010-07-29
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G09G5/00
CPC分类号： G09G3/3655 , G09G3/3677 , G09G2300/0876 , G09G2310/0297 , G09G2320/0209 , G09G2330/023
摘要： A display configured to reduce intra-pixel crosstalk is provided. In one embodiment, a system includes a processor, a memory, and a display. The display may include a pixel array and associated driving circuitry. The display may be configured to balance charges induced on a gate line and on an adjacent common line of the pixel array in response to application of a first data voltage on a first data line, and to perform such balancing before applying a second data voltage to a second data line adjacent the first data line to reduce or eliminate intra-pixel crosstalk. Additional systems, devices, and methods relating to reducing intra-pixel crosstalk in a display are also disclosed.
摘要翻译：提供了构造成减少像素内串扰的显示器。在一个实施例中，系统包括处理器，存储器和显示器。显示器可以包括像素阵列和相关联的驱动电路。显示器可以被配置为响应于在第一数据线上施加第一数据电压来平衡在栅极线上和在像素阵列的相邻公共线上感应的电荷，并且在将第二数据电压施加到与第一数据线相邻的第二数据线，以减少或消除像素间串扰。还公开了与减少显示器中的像素内串扰有关的附加系统，装置和方法。

7. 发明授权

US09666137B2 OLED driving technique 有权
公开(公告)号：US09666137B2
公开(公告)日：2017-05-30
申请号：US12911513
申请日：2010-10-25
申请人： Ulrich T. Barnhoefer , Yongman Lee
发明人： Ulrich T. Barnhoefer , Yongman Lee
IPC分类号： G09G3/32 , G09G3/3275 , G09G3/20
CPC分类号： G09G3/3275 , G09G3/2044 , G09G2310/027 , G09G2320/0276 , G09G2320/0626 , G09G2360/144
摘要： Systems, methods, and devices for efficient brightness control for an organic light emitting diode (OLED) display are provided. In one embodiment, such a method may include receiving image data into a data driver of an organic light emitting diode display and transforming the image data into a logarithmic domain. A dimming control value may be subtracted from this log-encoded image data. The resulting log-encoded dimmed image data may represent a darker version of the originally received image data. Thereafter, a pixel of the organic light emitting diode display may be driven based at least in part on the dimmed image data.

8. 发明授权

US08988408B2 Variable-bias power supply 有权
标题翻译：可变偏置电源
公开(公告)号：US08988408B2
公开(公告)日：2015-03-24
申请号：US12839104
申请日：2010-07-19
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G06F3/038 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3218
摘要： A responsive, low-power display panel power supply is provided. In one embodiment, such a display panel power supply may include a regulator whose responsiveness varies depending on the bias current it consumes, and a current source that provides a variable bias current. The regulator may provide the display panel a supply voltage and a supply current based on a reference voltage and a bias current. Various events taking place in the display panel, such as toggling at COM lines, source lines, and/or gate lines may cause parasitic capacitances within the display panel to draw more or less supply current. To ensure the regulator remains suitably responsive to such changes in supply current, while reducing the total power consumed by the power supply, the current source may provide a higher bias current to the regulator at least while the supply current is changing than at certain other times.
摘要翻译：提供响应性低功率显示面板电源。在一个实施例中，这样的显示面板电源可以包括其响应性根据其消耗的偏置电流而变化的调节器以及提供可变偏置电流的电流源。调节器可以基于参考电压和偏置电流向显示面板提供电源电压和电源电流。在显示面板上发生的各种事件，例如在COM线路，源极线路和/或栅极线路上的切换可能导致显示面板内的寄生电容吸入或多或少的电源电流。为了确保调节器适当地响应于电源电流的这种变化，同时减少电源消耗的总功率，电流源可以至少在电源电流变化时至少在某些其他时间向调节器提供更高的偏置电流。

9. 发明授权

US08963904B2 Clock feedthrough and crosstalk reduction method 有权
标题翻译：时钟馈通和串扰降低方法
公开(公告)号：US08963904B2
公开(公告)日：2015-02-24
申请号：US12839076
申请日：2010-07-19
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G09G5/00 , H03K5/12 , H03K3/00 , H03K3/012 , H03K17/04 , H03K17/16 , H03K17/687 , H03K4/02
CPC分类号： H03K4/02 , H03K17/163
摘要： Systems and methods of the present disclosure relates generally to techniques for controlling a gate signal applied to a transistor in an electronic component. One embodiment includes decreasing a skew rate at the rising and/or falling edges of the gate signal to reduce the effects of data signal errors. Decreasing the gate signal falling edge skew rate may decrease clock feedthrough effects of the transistor, and decreasing the gate signal rising edge skew rate may decrease crosstalk effects between more than one data paths in the electronic component. The falling edge skew rate may be manipulated by initially increasing the activating voltage of the gate signal to a higher voltage, such that the gate signal may take longer to fall. The rising edge skew rate may be manipulated by increasing a voltage later during the activating period, such that the gate signal may take longer to rise.
摘要翻译：本公开的系统和方法一般涉及用于控制施加到电子部件中的晶体管的栅极信号的技术。一个实施例包括降低门信号的上升沿和/或下降沿的偏移速率，以减少数据信号误差的影响。降低栅极信号下降沿偏移速率可能会降低晶体管的时钟馈通效应，并且降低栅极信号上升沿偏移速率可能会降低电子元件中多个数据通路之间的串扰效应。可以通过最初将栅极信号的激活电压增加到更高的电压来操纵下降沿偏移速率，使得栅极信号可能需要更长的时间来下降。可以通过在激活期间稍后增加电压来操纵上升沿偏移速率，使得栅极信号可能需要更长的时间来上升。

10. 发明授权

US08912990B2 Display having a transistor-degradation circuit 有权
标题翻译：具有晶体管劣化电路的显示器
公开(公告)号：US08912990B2
公开(公告)日：2014-12-16
申请号：US12331308
申请日：2008-12-09
申请人： Carlin Vieri , Ahmad Al-Dahle , Yongman Lee , Wei Yao
发明人： Carlin Vieri , Ahmad Al-Dahle , Yongman Lee , Wei Yao
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G2320/029 , G09G2320/043
摘要： Systems, methods, and devices are disclosed, including a device having a liquid-crystal display (LCD) panel that includes a transistor-degradation circuit. In some embodiments, the transistor-degradation circuit is configured to output a signal indicative of a change in a property of a transistor on the LCD panel over time.
摘要翻译：公开了系统，方法和装置，包括具有包括晶体管劣化电路的液晶显示（LCD）面板的装置。在一些实施例中，晶体管劣化电路被配置为输出指示LCD面板上的晶体管的性质随时间变化的信号。

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