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1. 发明申请

US20130134411A1 SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCTION OF SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE 有权
标题翻译：半导体器件，半导体器件的制造方法和显示器件
公开(公告)号：US20130134411A1
公开(公告)日：2013-05-30
申请号：US13640868
申请日：2011-04-05
申请人： Okifumi Nakagawa , Yoshifumi Ohta , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Yoshinobu Miyamoto , Hinae Mizuno
发明人： Okifumi Nakagawa , Yoshifumi Ohta , Yuuji Mizuno , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Yoshinobu Miyamoto
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/66742
摘要： A semiconductor device (100A) according to the present invention includes an oxide semiconductor layer (31a), first and second source electrodes (52a1 and 52a2), and first and second drain electrodes (53a1 and 53a2). The second source electrode (52a2) is formed to be in contact with a top surface of the first source electrode and inner to the first source electrode (52a1). The second drain electrode (53a2) is formed to be in contact with a top surface of the first drain electrode (53a1) and inner to the first drain electrode (53a1). The oxide semiconductor layer (31a) is formed to be in contact with the top surface of the first source electrode (52a1) and the top surface of the first drain electrode (53a1).
摘要翻译：根据本发明的半导体器件（100A）包括氧化物半导体层（31a），第一和第二源电极（52a1和52a2）以及第一和第二漏电极（53a1和53a2）。第二源电极（52a2）形成为与第一源电极的顶表面接触并且在第一源电极（52a1）内部。第二漏电极（53a2）形成为与第一漏电极（53a1）的顶表面接触并且在第一漏极电极（53a1）的内部。氧化物半导体层（31a）形成为与第一源电极（52a1）的顶表面和第一漏电极（53a1）的顶表面接触。

2. 发明授权

US09035295B2 Thin film transistor having an oxide semiconductor thin film formed on a multi-source drain electrode 有权
标题翻译：在多源极电极上形成氧化物半导体薄膜的薄膜晶体管
公开(公告)号：US09035295B2
公开(公告)日：2015-05-19
申请号：US13640868
申请日：2011-04-05
申请人： Okifumi Nakagawa , Yoshifumi Ohta , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Yoshinobu Miyamoto , Hinae Mizuno
发明人： Okifumi Nakagawa , Yoshifumi Ohta , Yuuji Mizuno , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Yoshinobu Miyamoto
IPC分类号： H01L29/12 , H01L29/10 , H01L29/76 , H01L21/00 , H01L29/786 , H01L27/12 , H01L29/66
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/66742
摘要： A semiconductor device (100A) according to the present invention includes an oxide semiconductor layer (31a), first and second source electrodes (52a1 and 52a2), and first and second drain electrodes (53a1 and 53a2). The second source electrode (52a2) is formed to be in contact with a top surface of the first source electrode and inner to the first source electrode (52a1). The second drain electrode (53a2) is formed to be in contact with a top surface of the first drain electrode (53a1) and inner to the first drain electrode (53a1). The oxide semiconductor layer (31a) is formed to be in contact with the top surface of the first source electrode (52a1) and the top surface of the first drain electrode (53a1).
摘要翻译：根据本发明的半导体器件（100A）包括氧化物半导体层（31a），第一和第二源电极（52a1和52a2）以及第一和第二漏电极（53a1和53a2）。第二源电极（52a2）形成为与第一源电极的顶表面接触并且在第一源电极（52a1）内部。第二漏电极（53a2）形成为与第一漏电极（53a1）的顶表面接触并且在第一漏极电极（53a1）的内部。氧化物半导体层（31a）形成为与第一源电极（52a1）的顶表面和第一漏电极（53a1）的顶表面接触。

3. 发明申请

US20130026462A1 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR MANUFACTURED BY THE SAME, AND ACTIVE MATRIX SUBSTRATE 审中-公开
标题翻译：制造薄膜晶体管的方法和由其制造的薄膜晶体管和有源矩阵基板
公开(公告)号：US20130026462A1
公开(公告)日：2013-01-31
申请号：US13581094
申请日：2011-02-14
申请人： Michiko Takei , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Okifumi Nakagawa , Yoshifumi Ohta , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Michiko Takei , Yuuji Mizuno , Yoshimasa Chikama , Tsuyoshi Inoue , Masahiko Suzuki , Okifumi Nakagawa , Yoshifumi Ohta , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225
摘要： A method for manufacturing a thin film transistor includes the step of forming a gate electrode (11aa) on an insulating substrate, the step of forming a gate insulating layer (12) to cover the gate electrode (11aa), and thereafter, forming an oxide semiconductor layer (13a) on the gate insulating layer (12), the step of forming a source electrode (16aa) and a drain electrode (16b) on the oxide semiconductor layer (13a) by dry etching, with a channel region (C) of the oxide semiconductor layer being exposed, and the step of supplying oxygen radicals to a channel region of the oxide semiconductor layer.
摘要翻译：制造薄膜晶体管的方法包括在绝缘基板上形成栅电极（11aa）的步骤，形成栅极绝缘层（12）以覆盖栅极（11aa）的步骤，然后形成氧化物在栅绝缘层（12）上的半导体层（13a），通过干蚀刻在氧化物半导体层（13a）上形成源电极（16aa）和漏电极（16b）的步骤，具有沟道区（C）的氧化物半导体层露出的步骤，以及向氧化物半导体层的沟道区域供给氧自由基的步骤。

4. 发明申请

US20120228621A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE 有权
标题翻译：用于制造半导体器件，半导体器件和显示器件的方法
公开(公告)号：US20120228621A1
公开(公告)日：2012-09-13
申请号：US13510315
申请日：2010-08-23
申请人： Michiko Takei , Tohru Okabe , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto , Takeshi Yaneda
发明人： Michiko Takei , Tohru Okabe , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto , Takeshi Yaneda
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L21/268 , H01L27/1229 , H01L27/1285 , H01L29/04 , H01L29/66765 , H01L29/78678
摘要： An object of this invention is to provide a semiconductor device in which TFTs with high mobility are arranged in both of display and peripheral circuit areas. A semiconductor device fabricating method according to the present invention includes the steps of: irradiating an amorphous silicon layer (34) with energy, thereby obtaining a microcrystalline silicon layer; and forming a doped semiconductor layer (35) on the amorphous silicon layer (34). In the step of irradiating, the amorphous silicon layer (34) is irradiated with energy that has a first quantity, thereby forming a first microcrystalline silicon layer (34A) including a channel layer for a first TFT (30A), and is also irradiated with energy that has a second quantity, which is larger than the first quantity, thereby forming a second microcrystalline silicon layer (34B) including a channel layer for a second TFT (30B).
摘要翻译：本发明的目的是提供一种半导体器件，其中具有高迁移率的TFT被布置在显示器和外围电路区域中。根据本发明的半导体器件制造方法包括以下步骤：用能量照射非晶硅层（34），从而获得微晶硅层; 以及在所述非晶硅层（34）上形成掺杂半导体层（35）。在照射步骤中，用具有第一量的能量照射非晶硅层（34），由此形成包括用于第一TFT（30A）的沟道层的第一微晶硅层（34A），并且还用具有大于第一量的第二量的能量，由此形成包括用于第二TFT（30B）的沟道层的第二微晶硅层（34B）。

5. 发明申请

US20120104406A1 THIN-FILM TRANSISTOR, DISPLAY DEVICE, AND MANUFACTURING METHOD FOR THIN-FILM TRANSISTORS 有权
标题翻译：薄膜晶体管，显示器件和薄膜晶体管的制造方法
公开(公告)号：US20120104406A1
公开(公告)日：2012-05-03
申请号：US13383077
申请日：2010-07-08
申请人： Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
发明人： Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
IPC分类号： H01L33/08
CPC分类号： H01L29/78627 , G02F1/1368 , G02F2202/104 , H01L29/41733 , H01L29/66765 , H01L29/78624
摘要： Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).
摘要翻译：公开了一种其中泄漏电流最小化的高品质，高效制造的薄膜晶体管。薄膜晶体管设置有包含具有微晶半导体的沟道区（34C）的半导体层（34）源极和漏极接触层（35S和35D），其含有杂质; 第一源极金属层（36S）和第一漏极金属层（36D）以及第二源极金属层（37S）和第二漏极金属层（37D）。第二金属源层（37S）的端部位于从第一金属源层（36S）的端部退出的位置，第二漏极金属层（37D）的端部位于退出的位置从第一漏极金属层（36D）的端部开始。半导体层（34）包含在上述源极接触层（35S）和漏极接触层（35D）的端部附近形成的低浓度杂质扩散区域。

6. 发明授权

US08823002B2 Method for manufacturing semiconductor device, semiconductor device, and display device 有权
标题翻译：半导体器件，半导体器件和显示器件的制造方法
公开(公告)号：US08823002B2
公开(公告)日：2014-09-02
申请号：US13510315
申请日：2010-08-23
申请人： Michiko Takei , Tohru Okabe , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto , Takeshi Yaneda
发明人： Michiko Takei , Tohru Okabe , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto , Takeshi Yaneda
IPC分类号： H01L31/036 , H01L21/268 , H01L27/12 , H01L29/66 , H01L29/786 , H01L29/04
CPC分类号： H01L21/268 , H01L27/1229 , H01L27/1285 , H01L29/04 , H01L29/66765 , H01L29/78678
摘要： An object of this invention is to provide a semiconductor device in which TFTs with high mobility are arranged in both of display and peripheral circuit areas. A semiconductor device fabricating method according to the present invention includes the steps of: irradiating an amorphous silicon layer (34) with energy, thereby obtaining a microcrystalline silicon layer; and forming a doped semiconductor layer (35) on the amorphous silicon layer (34). In the step of irradiating, the amorphous silicon layer (34) is irradiated with energy that has a first quantity, thereby forming a first microcrystalline silicon layer (34A) including a channel layer for a first TFT (30A), and is also irradiated with energy that has a second quantity, which is larger than the first quantity, thereby forming a second microcrystalline silicon layer (34B) including a channel layer for a second TFT (30B).
摘要翻译：本发明的目的是提供一种半导体器件，其中具有高迁移率的TFT被布置在显示器和外围电路区域中。根据本发明的半导体器件制造方法包括以下步骤：用能量照射非晶硅层（34），从而获得微晶硅层; 以及在所述非晶硅层（34）上形成掺杂半导体层（35）。在照射步骤中，用具有第一量的能量照射非晶硅层（34），由此形成包括用于第一TFT（30A）的沟道层的第一微晶硅层（34A），并且还用具有大于第一量的第二量的能量，由此形成包括用于第二TFT（30B）的沟道层的第二微晶硅层（34B）。

7. 发明授权

US08441016B2 Thin-film transistor, display device, and manufacturing method for thin-film transistors 有权
标题翻译：薄膜晶体管，显示装置和薄膜晶体管的制造方法
公开(公告)号：US08441016B2
公开(公告)日：2013-05-14
申请号：US13383077
申请日：2010-07-08
申请人： Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
发明人： Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
IPC分类号： H01L33/08
CPC分类号： H01L29/78627 , G02F1/1368 , G02F2202/104 , H01L29/41733 , H01L29/66765 , H01L29/78624
摘要： Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).
摘要翻译：公开了一种其中泄漏电流最小化的高品质，高效制造的薄膜晶体管。薄膜晶体管设置有包含具有微晶半导体的沟道区（34C）的半导体层（34）源极和漏极接触层（35S和35D），其含有杂质; 第一源极金属层（36S）和第一漏极金属层（36D）以及第二源极金属层（37S）和第二漏极金属层（37D）。第二金属源层（37S）的端部位于从第一金属源层（36S）的端部退出的位置，第二漏极金属层（37D）的端部位于退出的位置从第一漏极金属层（36D）的端部开始。半导体层（34）包含在上述源极接触层（35S）和漏极接触层（35D）的端部附近形成的低浓度杂质扩散区域。

8. 发明申请

US20130105802A1 THIN FILM TRANSISTOR, DISPLAY DEVICE, AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管，显示装置和薄膜晶体管和显示装置的制造方法
公开(公告)号：US20130105802A1
公开(公告)日：2013-05-02
申请号：US13518566
申请日：2010-12-21
申请人： Yoshiyuki Harumoto , Takeshi Hara , Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Michiko Takei
发明人： Yoshiyuki Harumoto , Takeshi Hara , Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Michiko Takei
IPC分类号： H01L29/786 , H01L33/08 , H01L29/66
CPC分类号： H01L29/786 , H01L29/04 , H01L29/6675 , H01L29/66765 , H01L29/78609 , H01L29/78618 , H01L29/78678 , H01L29/78696 , H01L33/08
摘要： The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.
摘要翻译：本发明的目的是提供一种通过有效的制造方法来减少OFF电流的产生的TFT。根据本发明的薄膜晶体管100具有形成在基板10上的栅电极12，形成在栅电极12上的绝缘层14，形成在绝缘层上的微晶非晶硅层18和非晶硅层16。层14，包含形成在非晶硅层16上的杂质的半导体层20以及形成在包含杂质的半导体层20上的源电极22A和漏极22B。含有杂质的微晶非晶硅层18和半导体层20通过非晶硅层16彼此连接而不直接接触。

9. 发明授权

US08530899B2 Thin film transistor, display device, and manufacturing method for thin film transistor and display device 有权
标题翻译：薄膜晶体管，显示装置及薄膜晶体管及显示装置的制造方法
公开(公告)号：US08530899B2
公开(公告)日：2013-09-10
申请号：US13518566
申请日：2010-12-21
申请人： Yoshiyuki Harumoto , Takeshi Hara , Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Michiko Takei
发明人： Yoshiyuki Harumoto , Takeshi Hara , Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Michiko Takei
IPC分类号： H01L29/04
CPC分类号： H01L29/786 , H01L29/04 , H01L29/6675 , H01L29/66765 , H01L29/78609 , H01L29/78618 , H01L29/78678 , H01L29/78696 , H01L33/08
摘要： The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.
摘要翻译：本发明的目的是提供一种通过有效的制造方法来减少OFF电流的产生的TFT。根据本发明的薄膜晶体管100具有形成在基板10上的栅电极12，形成在栅电极12上的绝缘层14，形成在绝缘层上的微晶非晶硅层18和非晶硅层16。层14，包含形成在非晶硅层16上的杂质的半导体层20以及形成在包含杂质的半导体层20上的源电极22A和漏极22B。含有杂质的微晶非晶硅层18和半导体层20通过非晶硅层16彼此连接而不直接接触。

10. 发明申请

US20120001190A1 THIN FILM TRANSISTOR AND METHOD OF FABRICATING SAME 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20120001190A1
公开(公告)日：2012-01-05
申请号：US13259154
申请日：2010-02-09
申请人： Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto
发明人： Tohru Okabe , Takeshi Yaneda , Tetsuya Aita , Tsuyoshi Inoue , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L21/02532 , H01L21/02678 , H01L27/1285 , H01L29/4908 , H01L29/66765 , H01L29/78696
摘要： The invention provides a thin film transistor that can improve its operating speed by improving crystallinity near a bottom surface of a channel layer. Of laser light irradiated onto an amorphous silicon layer, light transmitted through the amorphous silicon layer is absorbed by a gate electrode 130 and thereby produces heat. Since the gate electrode 130 is made of a titanium layer 102 with a low thermal conductivity, the produced heat is less likely to be transmitted through a gate wiring line 110 and dissipated and thus increases the temperature of the gate electrode 130. Radiant heat from the gate electrode 130 is provided to a bottom surface of the amorphous silicon layer and thus the amorphous silicon layer is also heated from its bottom surface. As a result, an amorphous silicon layer 106a melts not only from its top surface but also from its bottom surface and is solidified, whereby crystallization proceeds, and thus, the amorphous silicon layer 106a turns into a polycrystalline silicon layer 106b. Hence, the mobility near a bottom surface of the polycrystalline silicon layer 106b also increases, improving the operating speed of a thin film transistor 100.
摘要翻译：本发明提供一种薄膜晶体管，其可以通过改善沟道层底表面附近的结晶度来提高其工作速度。照射到非晶硅层上的激光，透过非晶硅层的光被栅电极130吸收，从而产生热量。由于栅电极130由具有低热导率的钛层102制成，所产生的热不太可能通过栅极布线110透射并消散，因此增加了栅电极130的温度。来自栅电极130被提供到非晶硅层的底表面，因此非晶硅层也从其底表面加热。结果，非晶硅层106a不仅从其顶表面而且从其底表面熔化并且固化，从而进行结晶，因此非晶硅层106a变成多晶硅层106b。因此，多晶硅层106b的底表面附近的迁移率也增加，提高了薄膜晶体管100的工作速度。

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