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1. 发明授权

EP0403174B1 Differential amplifying circuit operable at high speed 失效
标题翻译：差分放大器电路具有高操作速度
公开(公告)号：EP0403174B1
公开(公告)日：1996-04-24
申请号：EP90306261.0
申请日：1990-06-08
申请人： Oki Electric Industry Co., Ltd.
发明人： Tsukuda, Akinori , Nemoto, Masahisa , Mori, Haruo
IPC分类号： H03F3/45 , H03K5/24
CPC分类号： H03F3/45385 , H03F2203/45024 , H03F2203/45186 , H03F2203/45244 , H03F2203/45641

2. 发明公开

EP0403174A3 Differential amplifying circuit operable at high speed 失效
标题翻译：差速放大电路可在高速运行
公开(公告)号：EP0403174A3
公开(公告)日：1991-07-03
申请号：EP90306261.0
申请日：1990-06-08
申请人： Oki Electric Industry Co., Ltd.
发明人： Tsukuda, Akinori , Nemoto, Masahisa , Mori, Haruo
IPC分类号： H03F3/45 , H03K5/24
CPC分类号： H03F3/45385 , H03F2203/45024 , H03F2203/45186 , H03F2203/45244 , H03F2203/45641
摘要： A differential amplifying circuit comprises a differential input portion (112), a load portion (122), a switching portion (124), and a constant current source (126). The differential input portion (112) is connected to the constant current source (126), and includes a pair of field effect transistors (FETs) (114, 116), with one (114) having a gate receiving an input voltage (VI), a source connected to the current source (126) and a drain connected to a first node (N2), and the other (116) having a gate receiving a reference voltage (VR1), a source connected to the current source (126) and a drain connected to a second node (N3). The load portion (122) includes a pair of FETs (128, 130), with one (128) having a drain connected to a first power source (VDD) and a source connected to a first output terminal (OUT1), and the other (130) having a drain connected to the first power source (VDD) and a source connected to a second output terminal (OUT2). The switching portion (124) includes a pair of FETs (132, 134), with one (132) having a source connected to the first output terminal (0UT1), and the other (134) having a source connected to the second output terminal (OUT2). The pair of FETs (128, 130) of the load portion (122) respond to the potentials of the first and second nodes (N2, N3), respectively, so that the switching portion (124) can perform high speed switching operation.

3. 发明公开

EP0403174A2 Differential amplifying circuit operable at high speed 失效
标题翻译： Betriebsgeschwindigkeit的Differentialzverstärkerschaltungmit hoher
公开(公告)号：EP0403174A2
公开(公告)日：1990-12-19
申请号：EP90306261.0
申请日：1990-06-08
申请人： Oki Electric Industry Co., Ltd.
发明人： Tsukuda, Akinori , Nemoto, Masahisa , Mori, Haruo
IPC分类号： H03F3/45 , H03K5/24
CPC分类号： H03F3/45385 , H03F2203/45024 , H03F2203/45186 , H03F2203/45244 , H03F2203/45641
摘要： A differential amplifying circuit comprises a differential input portion (112), a load portion (122), a switching portion (124), and a constant current source (126). The differential input portion (112) is connected to the constant current source (126), and includes a pair of field effect transistors (FETs) (114, 116), with one (114) having a gate receiving an input voltage (VI), a source connected to the current source (126) and a drain connected to a first node (N2), and the other (116) having a gate receiving a reference voltage (VR1), a source connected to the current source (126) and a drain connected to a second node (N3). The load portion (122) includes a pair of FETs (128, 130), with one (128) having a drain connected to a first power source (VDD) and a source connected to a first output terminal (OUT1), and the other (130) having a drain connected to the first power source (VDD) and a source connected to a second output terminal (OUT2). The switching portion (124) includes a pair of FETs (132, 134), with one (132) having a source connected to the first output terminal (0UT1), and the other (134) having a source connected to the second output terminal (OUT2). The pair of FETs (128, 130) of the load portion (122) respond to the potentials of the first and second nodes (N2, N3), respectively, so that the switching portion (124) can perform high speed switching operation.
摘要翻译：差分放大电路包括差分输入部分（112），负载部分（122），开关部分（124）和恒流源（126）。差分输入部分（112）连接到恒流源（126），并且包括一对场效应晶体管（FET）（114,116），其中一个（114）具有接收输入电压（VI）的栅极，，连接到电流源（126）的源极和连接到第一节点（N2）的漏极，而另一个（116）具有接收参考电压（VR1）的栅极，连接到电流源（126）的源极，和连接到第二节点（N3）的漏极。负载部分（122）包括一对FET（128,130），其中一个（128）具有连接到第一电源（VDD）的漏极和连接到第一输出端子（OUT1）的源极，另一个（130），其漏极连接到第一电源（VDD），源极连接到第二输出端子（OUT2）。开关部分（124）包括一对FET（132,134），其中一个（132）的源极连接到第一输出端子（0UT1），另一个（134）的源极连接到第二输出端子（OUT2）。负载部分（122）的一对FET（128,130）分别响应于第一和第二节点（N2，N3）的电位，使得开关部分（124）可以执行高速切换操作。

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