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1. 发明授权

US07504707B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US07504707B2
公开(公告)日：2009-03-17
申请号：US10515346
申请日：2003-06-05
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L23/58
CPC分类号： H01L29/0696 , H01L29/0649 , H01L29/0834 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device in which a main current flows in a direction of the thickness of a semiconductor substrate, to attain desirable electric characteristics. P type semiconductor regions and N type semiconductor regions are alternately provided with an interval therebetween, both regions in a surface of a second main surface of a semiconductor substrate. Between the P type semiconductor regions and the N type semiconductor regions, trenches formed in the surface of the semiconductor substrate are filled with insulators, thereby forming trench isolation structures. Moreover, a second main electrode is formed in contact with both the P type semiconductor regions and the N type semiconductor regions.

2. 发明申请

US20090068815A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090068815A1
公开(公告)日：2009-03-12
申请号：US12271544
申请日：2008-11-14
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L21/762
CPC分类号： H01L29/0696 , H01L29/0649 , H01L29/0834 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device in which a main current flows in a direction of the thickness of a semiconductor substrate, to attain desirable electric characteristics. P type semiconductor regions and N type semiconductor regions are alternately provided with an interval therebetween, both regions in a surface of a second main surface of a semiconductor substrate. Between the P type semiconductor regions and the N type semiconductor regions, trenches formed in the surface of the semiconductor substrate are filled with insulators, thereby forming trench isolation structures. Moreover, a second main electrode is formed in contact with both the P type semiconductor regions and the N type semiconductor regions.
摘要翻译：主电流沿半导体衬底的厚度方向流动的半导体器件，以获得所需的电特性。 P型半导体区域和N型半导体区域在半导体衬底的第二主表面的表面中的两个区域之间交替设置有间隔。在P型半导体区域和N型半导体区域之间，形成在半导体衬底的表面中的沟槽用绝缘体填充，从而形成沟槽隔离结构。此外，第二主电极形成为与P型半导体区域和N型半导体区域接触。

3. 发明申请

US20050212057A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050212057A1
公开(公告)日：2005-09-29
申请号：US10515346
申请日：2003-06-05
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L29/08 , H01L29/739 , H01L29/73 , H01L21/8249
CPC分类号： H01L29/0696 , H01L29/0649 , H01L29/0834 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device in which a main current flows in a direction of the thickness of a semiconductor substrate, to attain desirable electric characteristics. P type semiconductor regions and N type semiconductor regions are alternately provided with an interval therebetween, both regions in a surface of a second main surface of a semiconductor substrate. Between the P type semiconductor regions and the N type semiconductor regions, trenches formed in the surface of the semiconductor substrate are filled with insulators, thereby forming trench isolation structures. Moreover, a second main electrode is formed in contact with both the P type semiconductor regions and the N type semiconductor regions.
摘要翻译：主电流沿半导体衬底的厚度方向流动的半导体器件，以获得所需的电特性。 P型半导体区域和N型半导体区域在半导体衬底的第二主表面的表面中的两个区域之间交替设置有间隔。在P型半导体区域和N型半导体区域之间，形成在半导体衬底的表面中的沟槽用绝缘体填充，从而形成沟槽隔离结构。此外，第二主电极形成为与P型半导体区域和N型半导体区域接触。

4. 发明申请

US20050156283A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20050156283A1
公开(公告)日：2005-07-21
申请号：US10505179
申请日：2003-07-11
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L21/08 , H01L21/331 , H01L29/06 , H01L29/08 , H01L29/32 , H01L29/739
CPC分类号： H01L29/0657 , H01L29/0834 , H01L29/32 , H01L29/47 , H01L29/66348 , H01L29/7397 , H01L29/872 , H01L2924/10155 , H01L2924/10158
摘要： A semiconductor device in which a main current flows in a direction of thickness of a semiconductor substrate and which offers satisfactory performance and breakdown voltage and also satisfactory mechanical strength of the semiconductor substrate, and which needs no inconvenient control of the exposure system etc. during a photolithography process. The semiconductor device has a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a recess defined in the second main surface by side surfaces and a bottom surface. A semiconductor region is provided in the bottom surface of the recess of the semiconductor substrate, semiconductor regions are provided in the surface of a peripheral region on the second main surface side, and insulating films are provided on the side surfaces of the recess to electrically insulate the semiconductor regions.
摘要翻译：主电流在半导体基板的厚度方向上流动并且提供令人满意的性能和击穿电压以及半导体基板的令人满意的机械强度的半导体器件，并且不需要对曝光系统等的不方便控制光刻工艺。半导体器件具有半导体衬底，其具有第一主表面，与第一主表面相对的第二主表面，以及在第二主表面中由侧表面和底表面限定的凹部。半导体区域设置在半导体衬底的凹部的底表面中，半导体区域设置在第二主表面侧的周边区域的表面中，并且绝缘膜设置在凹部的侧表面上以电绝缘半导体区域。

5. 发明授权

US07635892B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07635892B2
公开(公告)日：2009-12-22
申请号：US11561823
申请日：2006-11-20
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/0657 , H01L29/0834 , H01L29/32 , H01L29/47 , H01L29/66348 , H01L29/7397 , H01L29/872 , H01L2924/10155 , H01L2924/10158
摘要： A semiconductor device has a semiconductor substrate having a first main surface, a second main surface opposite to the first main surface, and a recess defined in the second main surface by side surfaces and a bottom surface, a semiconductor region provided in the bottom surface of the recess of the semiconductor substrate, semiconductor regions provided in the surface of a peripheral region on the second main surface side, and insulating films provided on the side surfaces of the recess to electrically insulate the semiconductor regions.
摘要翻译：半导体器件具有半导体衬底，其具有第一主表面，与第一主表面相对的第二主表面和在第二主表面中由侧表面和底表面限定的凹部，设置在第二主表面的底表面中的半导体区域半导体衬底的凹部，设置在第二主表面侧的周边区域的表面的半导体区域和设置在凹部的侧表面上的绝缘膜，以使半导体区域电绝缘。

6. 发明授权

US07629226B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07629226B2
公开(公告)日：2009-12-08
申请号：US12271544
申请日：2008-11-14
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L21/76
CPC分类号： H01L29/0696 , H01L29/0649 , H01L29/0834 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device in which a main current flows in a direction of the thickness of a semiconductor substrate, to attain desirable electric characteristics. P type semiconductor regions and N type semiconductor regions are alternately provided with an interval therebetween, both regions in a surface of a second main surface of a semiconductor substrate. Between the P type semiconductor regions and the N type semiconductor regions, trenches formed in the surface of the semiconductor substrate are filled with insulators, thereby forming trench isolation structures. Moreover, a second main electrode is formed in contact with both the P type semiconductor regions and the N type semiconductor regions.
摘要翻译：主电流沿半导体衬底的厚度方向流动的半导体器件，以获得所需的电特性。 P型半导体区域和N型半导体区域在半导体衬底的第二主表面的表面中的两个区域之间交替设置有间隔。在P型半导体区域和N型半导体区域之间，形成在半导体衬底的表面中的沟槽用绝缘体填充，从而形成沟槽隔离结构。此外，第二主电极形成为与P型半导体区域和N型半导体区域接触。

7. 发明申请

US20070075332A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20070075332A1
公开(公告)日：2007-04-05
申请号：US11561823
申请日：2006-11-20
申请人： Norifumi Tokuda , Shigeru Kusunoki
发明人： Norifumi Tokuda , Shigeru Kusunoki
IPC分类号： H01L29/74
CPC分类号： H01L29/0657 , H01L29/0834 , H01L29/32 , H01L29/47 , H01L29/66348 , H01L29/7397 , H01L29/872 , H01L2924/10155 , H01L2924/10158
摘要： The present invention relates to a semiconductor device; in particular, an object of the invention is to provide a semiconductor device in which a main current flows in a direction of thickness of the semiconductor substrate and which offers satisfactory performance and breakdown voltage and also satisfactory mechanical strength of the semiconductor substrate, and which needs no inconvenient control of the exposure system etc. during photolithography process. In order to achieve the object, a semiconductor device has a semiconductor substrate (1) having a first main surface (MS1), a second main surface (MS2) opposite to the first main surface, and a recess (9) defined in the second main surface (MS2) by side surfaces (91) and a bottom surface (92), a semiconductor region (IP5) provided in the bottom surface (92) of the recess (9) of the semiconductor substrate (1), semiconductor regions (IP4) provided in the surface of a peripheral region 1A on the second main surface (MS2) side, and insulating films (IL) provided on the side surfaces (91) of the recess (9) to electrically insulate the semiconductor regions (IP4) and (IP5).
摘要翻译：本发明涉及半导体器件; 具体地说，本发明的目的是提供一种半导体器件，其中主电流在半导体衬底的厚度方向上流动并且提供令人满意的性能和击穿电压以及半导体衬底的令人满意的机械强度，并且需要在光刻工艺中曝光系统等的控制不太方便。为了实现该目的，半导体器件具有具有第一主表面（MS 1），与第一主表面相对的第二主表面（MS 2）和与第一主表面相对的第二主表面（MS 2）的半导体衬底（1）所述第二主表面（MS 2）由侧表面（91）和底表面（92），设置在半导体衬底（1）的凹部（9）的底表面（92）中的半导体区域（IP 5）设置在第二主表面（MS 2）侧的周边区域1A的表面中的半导体区域（IP4）以及设置在凹部（9）的侧面（91）上的电绝缘膜（IL）绝缘半导体区域（IP 4）和（IP 5）。

8. 发明授权

US09041097B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09041097B2
公开(公告)日：2015-05-26
申请号：US13849344
申请日：2013-03-22
申请人： Shigeru Kusunoki
发明人： Shigeru Kusunoki
IPC分类号： H01L29/66 , H01L29/16 , H01L29/423 , H01L29/739 , H01L29/49
CPC分类号： H01L29/66666 , H01L29/1602 , H01L29/1608 , H01L29/4232 , H01L29/4916 , H01L29/7397
摘要： A semiconductor device includes a channel layer formed on a substrate, an insulating layer formed in contact with the channel layer, an impurity-doped first semiconductor layer formed on an opposite side of the insulating layer from the channel layer, an impurity-doped second semiconductor layer formed on an opposite side of the first semiconductor layer from the insulating layer, and a gate electrode formed on an opposite side of the second semiconductor layer from the first semiconductor layer. A quotient of an impurity density of the first semiconductor layer divided by a relative permittivity of the first semiconductor layer is greater than a quotient of an impurity density of the second semiconductor layer divided by a relative permittivity of the second semiconductor layer.
摘要翻译：半导体器件包括形成在衬底上的沟道层，与沟道层接触形成的绝缘层，形成在绝缘层与沟道层相反的一侧的杂质掺杂的第一半导体层，杂质掺杂的第二半导体在第一半导体层的与绝缘层相反的一侧形成的层，以及形成在第二半导体层与第一半导体层相反的一侧上的栅电极。第一半导体层的杂质浓度除以第一半导体层的相对介电常数的商大于第二半导体层的杂质浓度除以第二半导体层的相对介电常数的商。

9. 发明授权

US08853737B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08853737B2
公开(公告)日：2014-10-07
申请号：US13493745
申请日：2012-06-11
申请人： Shigeru Kusunoki
发明人： Shigeru Kusunoki
IPC分类号： H01L29/739 , H01L27/088 , H01L29/78 , H01L29/40 , H01L49/02 , H01L29/06 , H01L27/092 , H01L21/8238 , H03K17/08
CPC分类号： H01L29/7396 , H01L21/823814 , H01L21/823878 , H01L27/0921 , H01L28/20 , H01L29/0619 , H01L29/0638 , H01L29/0696 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/7397 , H01L29/7817 , H01L29/7824 , H01L2924/0002 , H03K17/08 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate including a semiconductor layer, a power device formed in the semiconductor substrate, a plurality of concentric guard rings formed in the semiconductor substrate and surrounding the power device, and voltage applying means for applying successively higher voltages respectively to the plurality of concentric guard rings, with the outermost concentric guard ring having the highest voltage applied thereto.
摘要翻译：半导体器件包括半导体衬底，其包括半导体层，形成在半导体衬底中的功率器件，形成在半导体衬底中并围绕功率器件的多个同心保护环;以及电压施加装置，用于分别向多个同心保护环，最外面的同心保护环具有施加到其上的最高电压。

10. 发明授权

US08847290B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08847290B2
公开(公告)日：2014-09-30
申请号：US13729584
申请日：2012-12-28
申请人： Shigeru Kusunoki , Shinichi Ishizawa
发明人： Shigeru Kusunoki , Shinichi Ishizawa
IPC分类号： H01L29/66 , H01L27/06
CPC分类号： H01L27/0629
摘要： A semiconductor device includes: a rectifying element; an electrode pad electrically connected to the rectifying element; and a resistance and a depletion transistor arranged between the rectifying element and the electrode pad, and electrically connected to each other. The semiconductor device has a configuration in which the rectifying element, the resistance, the depletion transistor, and the electrode pad are serially connected. The semiconductor device is configured to generate a gate potential of the depletion transistor based on a difference in potential across the resistance and to produce a depletion layer in a channel of the depletion transistor based on the gate potential. As a result, a semiconductor device having reasonably large current at low voltage and small current at high voltage can be obtained.
摘要翻译：半导体器件包括：整流元件; 电连接到整流元件的电极垫; 以及布置在整流元件和电极焊盘之间的电阻和耗尽晶体管，并且彼此电连接。半导体器件具有其中整流元件，电阻，耗尽晶体管和电极焊盘串联连接的结构。半导体器件被配置为基于跨越电阻的电位差产生耗尽型晶体管的栅极电位，并且基于栅极电位在耗尽型晶体管的沟道中产生耗尽层。结果，可以获得在低电压下具有相当大的电流并且在高电压下具有小的电流的半导体器件。

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