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1. 发明授权

US4250569A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US4250569A
公开(公告)日：1981-02-10
申请号：US960917
申请日：1978-11-15
申请人： Nobuo Sasaki , Moto'o Nakano , Yasuo Kobayashi , Takashi Iwai
发明人： Nobuo Sasaki , Moto'o Nakano , Yasuo Kobayashi , Takashi Iwai
IPC分类号： H01L27/108 , G11C11/40
CPC分类号： H01L27/108
摘要： Disclosed is a semiconductor memory device using semiconductor memory elements as memory cells. Each semiconductor memory element is provided with a semiconductor region having a particular conductivity type, a source region and a drain region both having opposite conductivity type and both being located adjacent to the semiconductor region, one on each side of the semiconductor region, so that the semiconductor region functions as a separator between the source region and the drain region, and a gate electrode which is provided over the surface of the semiconductor region on a dielectric insulation film. In the semiconductor memory device, information is written in the semiconductor memory element by injecting electric charges into the semiconductor region, and the written information is read by detecting a variation of the electrical conductance on the surface of the semiconductor region due to the injection of electric charges.
摘要翻译：公开了使用半导体存储元件作为存储单元的半导体存储器件。每个半导体存储元件设置有具有特定导电类型的半导体区域，源极区域和漏极区域，其具有相反的导电类型并且都位于与半导体区域相邻的位置，在半导体区域的每一侧上一个，半导体区域用作源极区域和漏极区域之间的隔膜，以及设置在电介质绝缘膜上的半导体区域的表面上的栅极电极。在半导体存储器件中，通过向半导体区域注入电荷将信息写入到半导体存储元件中，并且通过检测由于电注入而导致的半导体区域表面上的导电性的变化来读取写入信息收费。

2. 发明授权

US4275093A Method of manufacturing insulated gate semiconductor devices by high pressure thermal oxidation with water vapor 失效
标题翻译：用水蒸气高压热氧化制造绝缘栅半导体器件的方法
公开(公告)号：US4275093A
公开(公告)日：1981-06-23
申请号：US048069
申请日：1979-06-13
申请人： Nobuo Sasaki , Yasuo Kobayashi , Ryoiku Tohgei , Takashi Iwai , Motoo Nakano
发明人： Nobuo Sasaki , Yasuo Kobayashi , Ryoiku Tohgei , Takashi Iwai , Motoo Nakano
IPC分类号： H01L27/12 , H01L21/316 , H01L21/762 , H01L21/86 , H01L29/78
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76264 , H01L21/76281 , Y10S438/909
摘要： A method of manufacturing SOS type semiconductor devices having small leakage current comprising the steps of forming a single crystal semiconductor film on an insulator single crystal substrate, selectively forming a film for masking against oxidation on the surface of the single crystal semiconductor film, and thermally oxidizing the single crystal semiconductor film, in a region which is not covered with the masking film, down to the surface of the insulating single crystal substrate in a water vapor atmosphere having a high pressure which is at least more than atmospheric pressure.
摘要翻译：一种制造具有小的漏电流的SOS型半导体器件的方法，包括以下步骤：在绝缘体单晶衬底上形成单晶半导体膜，在单晶半导体膜的表面上选择性地形成用于掩蔽抗氧化的膜，以及热氧化在没有被掩模膜覆盖的区域中的单晶半导体膜在具有至少大于大气压的高压的水蒸汽气氛中向下到达绝缘单晶基板的表面。

3. 发明授权

US4262340A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US4262340A
公开(公告)日：1981-04-14
申请号：US92858
申请日：1979-11-09
申请人： Nobuo Sasaki , Yasuo Kobayashi , Takashi Iwai , Motoo Nakano
发明人： Nobuo Sasaki , Yasuo Kobayashi , Takashi Iwai , Motoo Nakano
IPC分类号： G11C11/41 , G11C5/06 , G11C8/08 , G11C11/408 , G11C11/412 , G11C11/418 , H01L27/11 , G11C11/40
CPC分类号： G11C11/418 , G11C11/4085 , G11C11/412 , G11C5/063 , G11C8/08 , H01L27/1104 , H01L27/1108
摘要： A semiconductor memory device provides a plurality of bit lines, a plurality of memory cells each of which is connected to a pair of different bit lines, a plurality of common word wires each of which is connected to the memory cells via a transmission gate. A characteristic feature of the present invention is to provide at least one amplifier between two memory cells which are connected to a word line or a bit line so as to prevent an increase of the access time of the memory device.
摘要翻译：半导体存储器件提供多个位线，多个存储单元，每个存储单元都连接到一对不同的位线，多个公共字线，每个通常的字线经由传输门连接到存储单元。本发明的特征在于提供连接到字线或位线的两个存储单元之间的至少一个放大器，以防止存储器件的访问时间的增加。

4. 植物专利

USPP29169P2 Tecoma plant named ‘Sunhortedai’ 有权
公开(公告)号：USPP29169P2
公开(公告)日：2018-04-03
申请号：US15530290
申请日：2016-12-19
申请人： Kenichi Arisumi , Yasuo Kobayashi
发明人： Kenichi Arisumi , Yasuo Kobayashi
IPC分类号： A01H5/02
CPC分类号： A01H5/02
摘要： A new and distinct cultivar of Tecoma plant named ‘Sunhortedai’, characterized by its upright and relatively compact plant habit; vigorous growth habit; freely branching habit; early and freely flowering habit; flowering under high temperature conditions; greyed orange-colored flowers; and low temperature tolerant.

5. 发明申请

US20100032838A1 AMORPHOUS CARBON FILM, SEMICONDUCTOR DEVICE, FILM FORMING METHOD, FILM FORMING APPARATUS AND STORAGE MEDIUM 审中-公开
标题翻译：非晶碳膜，半导体器件，膜成膜方法，成膜装置和储存介质
公开(公告)号：US20100032838A1
公开(公告)日：2010-02-11
申请号：US12516862
申请日：2007-11-30
申请人： Yoshiyuki Kikuchi , Yasuo Kobayashi , Kohei Kawamura , Toshihisa Nozawa , Hiraku Ishikawa
发明人： Yoshiyuki Kikuchi , Yasuo Kobayashi , Kohei Kawamura , Toshihisa Nozawa , Hiraku Ishikawa
IPC分类号： H01L23/532 , H01L21/314 , C09D1/00
CPC分类号： H01L21/02115 , C23C16/26 , H01L21/02123 , H01L21/02274 , H01L21/0276 , H01L21/31144 , H01L21/3146 , H01L21/76811 , H01L21/76834 , H01L21/76835 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Provided is an amorphous carbon film having a high elastic modulus and a low thermal contraction rate with a suppressed low dielectric constant, a semiconductor device including the amorphous carbon film and a technology for forming the amorphous carbon film. Since the amorphous carbon film is formed by controlling an additive amount of Si (silicon) during film formation, it is possible to form the amorphous carbon film having a high elastic modulus and a low thermal contraction rate with a suppressed dielectric constant as low as 3.3 or less. Accordingly, when the amorphous carbon film is used as a film in the semiconductor device, troubles such as a film peeling can be suppressed.
摘要翻译：本发明提供一种具有高弹性模量和低收缩率以及低介电常数的非晶碳膜，包括非晶碳膜的半导体器件和用于形成非晶碳膜的技术。由于通过在成膜期间控制Si（硅）的添加量来形成无定形碳膜，所以可以形成具有高的弹性模量和低热收缩率的无定形碳膜，其介电常数低至3.3 或更少。因此，当在半导体器件中使用无定形碳膜作为膜时，可以抑制诸如膜剥离的问题。

6. 发明申请

US20070077737A1 Plasma processing method and plasma processing apparatus 失效
标题翻译：等离子体处理方法和等离子体处理装置
公开(公告)号：US20070077737A1
公开(公告)日：2007-04-05
申请号：US10580036
申请日：2004-11-19
申请人： Yasuo Kobayashi , Kohei Kawamura
发明人： Yasuo Kobayashi , Kohei Kawamura
IPC分类号： H01L21/26 , H01L21/42 , H05H1/24
CPC分类号： C23C16/511 , C23C16/26 , C23C16/4404 , C23C16/4405 , H01J37/32192 , H01J37/3222 , H01J37/32238 , H01J37/3244
摘要： A microwave is radiated into a processing chamber (1) from a planar antenna member of an antenna (7) through a dielectric plate (6). With this, a C5F8 gas supplied into the processing chamber (1) from a gas supply member (3) is changed (activated) into a plasma so as to form a fluorine-containing carbon film of a certain thickness on a semiconductor wafer (W). Each time a film forming process of forming a film on one wafer is carried out, a cleaning process and a pre-coating process are carried out. In the cleaning process, the inside of the processing chamber is cleaned with a plasma of an oxygen gas and a hydrogen gas. In the pre-coating process, the C5F8 gas is changed into a plasma, and a pre-coat film of fluorine-containing carbon thinner than the fluorine-containing carbon film formed in the film forming process is formed.
摘要翻译：通过电介质板（6）将微波从天线（7）的平面天线部件辐射到处理室（1）中。由此，从气体供给构件（3）供给到处理室（1）中的C 5 C 8 C 8气体被变更（激活）为等离子体，从而在半导体晶片（W）上形成一定厚度的含氟碳膜。每次进行在一个晶片上形成膜的成膜工艺时，进行清洗处理和预涂工序。在清洁过程中，用氧气和氢气的等离子体清洁处理室的内部。在预涂布过程中，将C 5 F 8 N气体变成等离子体，并且含氟碳的预涂膜比含氟形成在成膜工艺中形成的碳膜。

7. 发明授权

US06342763B1 Fluorescent lamp, method for manufacturing the same, and fluorescent lamp device 失效
标题翻译：荧光灯，其制造方法以及荧光灯装置
公开(公告)号：US06342763B1
公开(公告)日：2002-01-29
申请号：US09123403
申请日：1998-07-28
申请人： Mamoru Fukushima , Yasuo Kobayashi , Soichiro Ogawa
发明人： Mamoru Fukushima , Yasuo Kobayashi , Soichiro Ogawa
IPC分类号： H01J6100
CPC分类号： H01J9/28 , H01J61/045 , H01J61/366 , H01J61/72
摘要： A high frequency operation fluorescent lamp which can reduce a possibility of over-heat damage of a flare stem at the end of its life. In the lamp, a pair of intermediate lead wires are passed through the flare stem at each end of a light emitting envelope, and an insulator is provided to cover a top of the flare stem.
摘要翻译：一种高频操作荧光灯，可以在其使用寿命结束时减少火炬杆过热损坏的可能性。在灯中，一对中间引线在发光外壳的每个端部通过扩口杆，并且设置绝缘体以覆盖火炬杆的顶部。

8. 发明授权

US06229757B1 Semiconductor memory device capable of securing large latch margin 有权
标题翻译：能够确保大的锁存余量的半导体存储器件
公开(公告)号：US06229757B1
公开(公告)日：2001-05-08
申请号：US09315828
申请日：1999-05-21
申请人： Kyoichi Nagata , Yasuo Kobayashi
发明人： Kyoichi Nagata , Yasuo Kobayashi
IPC分类号： G11C800
CPC分类号： G11C7/1093 , G11C7/1066 , G11C7/1072 , G11C7/1087 , G11C7/22
摘要： In a double data rate type synchronous dynamic random access memory (DDR-SDRAM) device, a large latch margin of input data is secured. The DDR-SDRAM device is arranged by a data strobe signal processing circuit for detecting at least one of a rise edge of a data strobe signal and a fall edge thereof to thereby produce at least a first one-shot pulse signal; a clock signal processing circuit for detecting a rise edge of a clock signal to thereby produce a second one-shot pulse signal; and a data-in processing circuit for latching input data by using the first one-shot pulse signal produced from the data strobe signal, and further for latching the latched input data by using the second one-shot pulse signal produced from the clock signal, and also for simultaneously writing both the latched data into a memory cell in a parallel manner. The data-in processing circuit controls a delay amount of the first one-shot pulse signal and another delay amount of the second one-shot pulse signal so as to secure a latch margin of the input data.
摘要翻译：在双倍数据速率类型的同步动态随机存取存储器（DDR-SDRAM）装置中，确保输入数据的大的锁存边沿。 DDR-SDRAM装置由数据选通信号处理电路配置，用于检测数据选通信号的上升沿及其下降沿中的至少一个，从而产生至少第一单触发脉冲信号; 时钟信号处理电路，用于检测时钟信号的上升沿，从而产生第二单触发脉冲信号; 以及数据输入处理电路，用于通过使用从数据选通信号产生的第一单触发脉冲信号来锁存输入数据，并且还用于通过使用从时钟信号产生的第二单触发脉冲信号来锁存锁存的输入数据，并且还用于以并行方式同时将锁存的数据写入存储器单元。数据输入处理电路控制第一单触发脉冲信号的延迟量和第二单触发脉冲信号的另一延迟量，以确保输入数据的锁存边沿。

9. 发明授权

US5851600A Plasma process method and apparatus 失效
标题翻译：等离子体处理方法和装置
公开(公告)号：US5851600A
公开(公告)日：1998-12-22
申请号：US953624
申请日：1997-10-17
申请人： Yasuhiro Horiike , Yasuo Kobayashi
发明人： Yasuhiro Horiike , Yasuo Kobayashi
IPC分类号： H05H1/46 , C23C16/50 , C23C16/509 , H01J37/32 , H01L21/31 , B05D3/04
CPC分类号： C23C16/509 , H01J37/32431
摘要： Plasma processing gas is introduced into an upper portion of a processing vessel and a film-formation gas is simultaneously introduced into the vicinity of a substrate to be processed. The plasma processing gas is ionized to form a first plasma and any of the plasma processing gas that has temporarily recombined in locations close to the substrate to be processed is re-ionized as a second plasma. As a result, the density of etchant ions used for cutting away overhangs around the openings of grooves can be increased. In other words, the number of etchant ions can be increased. This makes it possible to reduce the bias voltage applied to the substrate to be processed, preventing damage thereto.
摘要翻译：将等离子体处理气体引入处理容器的上部，同时将成膜气体引入待处理的基板的附近。等离子体处理气体被离子化以形成第一等离子体，并且在接近待处理衬底的位置中暂时重新组合的任何等离子体处理气体被再次离子化为第二等离子体。结果，可以增加用于切除凹槽周围的突出部的蚀刻剂离子的密度。换句话说，可以增加蚀刻剂离子的数量。这使得可以减小施加到待处理基板的偏置电压，从而防止其损坏。

10. 发明授权

US5327388A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5327388A
公开(公告)日：1994-07-05
申请号：US952977
申请日：1992-09-29
申请人： Yasuo Kobayashi
发明人： Yasuo Kobayashi
IPC分类号： G11C11/413 , G11C5/14 , G11C11/401 , G11C11/407 , G11C29/00 , G11C29/04 , G11C29/12 , G11C7/00
CPC分类号： G11C5/147
摘要： A semiconductor memory device with a power source voltage step-down circuit which generates a stepped-down voltage from electric power supplied from outside and supplies this stepped-down voltage to a memory cell array and peripheral circuits. Current switching device interposed in a circuit or circuits of the semiconductor memory device other than the memory cell array and a switch controlling signal generating means for generating a controlling signal in response to a signal from the outside are provided. The current switching device performs switching of current to flow through the circuit in response to a controlling signal.
摘要翻译：一种具有电源电压降压电路的半导体存储器件，其从外部提供的电力产生降压电压，并将该降压电压提供给存储单元阵列和外围电路。提供了插入电路中的电流开关器件或除了存储单元阵列之外的半导体存储器件的电路和用于响应于来自外部信号产生控制信号的开关控制信号产生装置。当前的开关装置响应于控制信号执行电流的切换以流过电路。

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