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1. 发明授权

US4008381A Multichannel record disc recording system 失效
标题翻译：多声道记录光盘记录系统
公开(公告)号：US4008381A
公开(公告)日：1977-02-15
申请号：US610463
申请日：1975-09-04
申请人： Nobuaki Takahashi , Takaro Mori , Yoshiki Iwasaki
发明人： Nobuaki Takahashi , Takaro Mori , Yoshiki Iwasaki
IPC分类号： G11B3/00
CPC分类号： G11B3/00
摘要： A multichannel record disc recording system comprises: a circuit for shaping sum and difference signals from multichannel signals, angle modulating the difference signal, multiplexing the sum signal and the angle-modulated difference signal, and recording the resulting signal on a record disc. A first level control circuit, in the transmission system for the sum signal, operates to attenuate the high-frequency band of components of the sum signal when its level is at a high level. A second level control circuit, in the transmission system of the difference signal, operates to attenuate the middle-high frequency band of components of the difference signal when its level is at a high level. The first level control circuit attenuates the level of the sum signal to prevent an admixing of the higher harmonics of the high frequency component of the sum signal into the band of the angle-modulated difference signal. The second level control circuit attenuates the level of the difference signal to prevent an overdeviation due to overmodulation of the angle-modulated difference signal.
摘要翻译：多通道记录盘记录系统包括：用于对来自多通道信号的和和信号进行整形的电路，对差分信号进行角度调制，对和信号和角度调制的差分信号进行多路复用，并将得到的信号记录在记录盘上。在和信号的传输系统中的第一电平控制电路在其电平处于高电平时衰减和信号的分量的高频带。差分信号的传输系统中的第二电平控制电路在其电平处于高电平时，对差分信号的分量的中高频带进行衰减。第一电平控制电路衰减和信号的电平，以防止将和信号的高频分量的高次谐波混入角度调制差分信号的频带中。第二电平控制电路衰减差分信号的电平，以防止由角度调制差分信号的过调制引起的过度偏移。

2. 发明授权

US4516163A Digital information signal recording system 失效
标题翻译：数字信息记录系统
公开(公告)号：US4516163A
公开(公告)日：1985-05-07
申请号：US508540
申请日：1983-06-28
申请人： Isao Masuda , Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Shoji Ueno
发明人： Isao Masuda , Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Shoji Ueno
IPC分类号： G11B20/10 , G11B20/18 , G11B5/00 , G11B5/09
CPC分类号： G11B20/1809 , G11B20/10 , G11B20/10527
摘要： A digital information recording system comprises a randomized digital signal forming circuit for forming a randomized digital signal by carrying out modulo-2 addition of at least digital information signals of a plurality of channels in a digital signal and a random code sequence which is generated independently, a detector for successively detecting values of each of a predetermined number of words from each of the digital information signals of a plurality of channels in the randomized digital signal, in terms of one word, and generating a detection signal only when values of bits in the one word are all "1" or all "0", a timing circuit for generating a timing signal for every period corresponding to a transmission period of a least significant bit in one word from each of the digital information signals of a plurality of channels, a polarity inverting circuit for passing the randomized digital signal unchanged during a period in which the detection signal is not generated from the detector, and inverting the polarity of the least significant bit in one word from each of the digital information signals of a plurality of channels in the randomized digital signal when simultaneously applied with the detection signal and the timing signal, and a recording circuit for recording a digital signal obtained from the polarity inverting circuit.
摘要翻译：数字信息记录系统包括一个随机数字信号形成电路，用于通过对数字信号中的至少数个信道信号和独立产生的随机码序列至少进行模2加法来形成随机数字信号，一个检测器，用于根据一个字连续地检测随机数字信号中的多个通道的每个数字信息信号中的每一个的预定数量的字的值，并且仅当在一个字中的位的值时产生检测信号一个字全部为“1”或全部为“0”，定时电路用于在与多个通道的每个数字信息信号中的一个字中的最低有效位的发送周期相对应的每个周期产生定时信号，极性反转电路，用于在不从d产生检测信号的期间内使随机数字信号不变并且当同时施加检测信号和定时信号时，将随机数字信号中的多个通道的数字信息信号中的每一个的一个字中的最低有效位的极性反转，以及记录电路从极性反转电路获得的数字信号。

3. 发明授权

US3934087A Angle modulated wave demodulation system 失效
标题翻译：角度调制波解调系统
公开(公告)号：US3934087A
公开(公告)日：1976-01-20
申请号：US403635
申请日：1973-10-04
申请人： Nobuaki Takahashi , Yoshiki Iwasaki , Masao Kasuga , Yasuo Itoh
发明人： Nobuaki Takahashi , Yoshiki Iwasaki , Masao Kasuga , Yasuo Itoh
IPC分类号： H03D3/24 , H04S3/00 , G11B3/04
CPC分类号： H04S3/006 , H03D3/244
摘要： A system for demodulating angle modulated waves comprises a phase locked loop including a phase comparator and a voltage controlled oscillator. An attenuation means is inserted into the phase locked loop. This attenuation means does not affect the DC component of an input angle modulated wave, but does cause an attenuation with respect to an AC component, to cause a decrease in the loop gain. The phase locked loop has a DC lock range exhibiting a relatively wide lock range width even when the input level is relatively low and an AC lock range produced by the attenuation circuit and exhibiting a relatively narrow lock range width when the input level is relatively low. The attenuation means detects an abnormality in the angle modulated wave, the harmonics component of the direct wave, and the like. A variable attenuation circuit controlled by the output of the detecting means is varied in its attenuation quantity.
摘要翻译：用于解调角度调制波的系统包括包括相位比较器和压控振荡器的锁相环。衰减装置插入到锁相环中。该衰减装置不影响输入角调制波的直流分量，但是相对于AC分量产生衰减，导致环路增益的降低。即使当输入电平相对较低时，锁相环也具有相对宽的锁定范围宽度的DC锁定范围，并且当输入电平相对较低时，锁相环由衰减电路产生并产生相对窄的锁定范围宽度。衰减装置检测角度调制波的异常，直接波的谐波分量等。由检测装置的输出控制的可变衰减电路的衰减量变化。

4. 发明授权

US4561083A Memory circuit write-in system 失效
标题翻译：内存电路写入系统
公开(公告)号：US4561083A
公开(公告)日：1985-12-24
申请号：US496589
申请日：1983-05-20
申请人： Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Shoji Ueno , Makoto Komura , Nobuaki Takahashi
发明人： Kazunori Nishikawa , Yoshiki Iwasaki , Isao Masuda , Shoji Ueno , Makoto Komura , Nobuaki Takahashi
IPC分类号： G11B3/00 , G11B7/00 , G11B7/004 , G11B20/10 , G11C7/00 , G11C11/34 , H04N5/956 , H04N5/76
CPC分类号： H04N5/956
摘要： A memory circuit write-in system comprises a first circuit for supplying a digital signal including a time base fluctuation component, where one frame of the digital signal is constituted by at least a synchronizing signal and information data and the digital signal has a first repetition frequency with a period of one frame of the digital signal, a memory circuit for writing therein and reading out therefrom the digital signal supplied from the first circuit, and a second circuit for applying a write-in control signal to the memory circuit. The write-in control signal includes no time base fluctuation component and has a second repetition frequency substantially equal to the first repetition frequency, and the memory circuit is controlled by the write-in control signal so that write-in of the digital signal is carried out with a write-in period in a range of two times within the one frame period.
摘要翻译：存储电路写入系统包括：第一电路，用于提供包括时基波动分量的数字信号，其中数字信号的一帧至少由同步信号和信息数据构成，数字信号具有第一重复频率具有数字信号的一帧的周期，用于在其中写入并从其读出从第一电路提供的数字信号的存储器电路，以及用于将写入控制信号施加到存储器电路的第二电路。写入控制信号不包括时基波动分量，并且具有基本上等于第一重复频率的第二重复频率，并且存储电路由写入控制信号控制，以便承载数字信号的写入在一个帧周期内以两次的写入周期输出。

5. 发明授权

US4186281A Multichannel record disc reproducing apparatus 失效
标题翻译：多通道记录盘再现装置
公开(公告)号：US4186281A
公开(公告)日：1980-01-29
申请号：US843863
申请日：1977-10-20
申请人： Masao Kasuga , Nobuaki Takahashi , Fujio Suzuki , Yoshiki Iwasaki
发明人： Masao Kasuga , Nobuaki Takahashi , Fujio Suzuki , Yoshiki Iwasaki
IPC分类号： H04S3/00 , G11B3/00 , H03D3/00
CPC分类号： H04S3/006
摘要： A multichannel record disc reproducing apparatus comprises a first phase locked loop circuit including a phase comparator and a voltage controlled oscillator for demodulating an angle-modulated wave signal. The modulated signal is separated from a composite signal picked up from a multichannel record disc on which a multiplexed direct wave signal and an angle-modulated wave signal are recorded. The output of the first phase locked loop is a demodulated signal. A second phase locked loop circuit includes a phase comparator and a voltage controlled oscillator, supplied with the separated angle-modulated wave signal and having a lock range of a width which covers and is wider than the maximum lock range width of the first phase locked loop circuit. A synchronous detector compares the phases of the angle-modulated wave signal and the output signal of voltage controlled oscillator of the second phase locked loop. The synchronous detector operates when the phase difference of the two signals deviates sufficiently from a predetermined phase difference. Means are provided for reducing or removing noise components which are developed in the demodulated signal in accordance with the output of the synchronous detector. This noise reduction or removal is provided in the first phase locked loop circuit and/or in a channel for transmitting the demodulated signal.
摘要翻译：多通道记录盘重放装置包括第一锁相环电路，其包括用于解调角度调制波信号的相位比较器和压控振荡器。调制信号与从其上记录有多路复用直接波信号和角度调制波信号的多通道记录盘拾取的复合信号分离。第一锁相环的输出是解调信号。第二锁相环电路包括相位比较器和压控振荡器，被提供有分离的角度调制波信号并且具有覆盖并且比第一锁相环的最大锁定范围宽度宽的宽度的锁定范围电路。同步检波器将角度调制波信号的相位与第二锁相环的压控振荡器的输出信号进行比较。当两个信号的相位差从预定的相位差充分偏离时，同步检测器工作。提供了用于根据同步检测器的输出减少或去除在解调信号中产生的噪声分量的装置。在第一锁相环电路和/或用于发送解调信号的信道中提供该噪声降低或去除。

6. 发明授权

US4107478A Angle modulated wave demodulation system 失效
标题翻译：角度调制波解调系统
公开(公告)号：US4107478A
公开(公告)日：1978-08-15
申请号：US698191
申请日：1976-06-21
申请人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
发明人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
IPC分类号： G11B20/00 , G11B23/00 , H03D3/24 , H04S3/00 , G11B3/04 , G11B3/74 , H03D3/00
CPC分类号： H03D3/244 , G11B20/00992 , G11B23/0007 , H04S3/006
摘要： An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.
摘要翻译：角度调制波解调系统通过锁相环系统对输入角调制波进行解调，该锁相环系统包括响应于输入角调制波操作的相位比较器。电压控制振荡器被提供有控制其振荡频率的相位比较器的输出的一部分。振荡器将其振荡频率提供给相位比较器。锁相环系统具有当输入角度调制波的电平低于预定电平时减小其宽度的锁定频率范围。正确地利用锁定范围的宽度减小的锁定范围的部分。当锁相环解锁时，压控振荡器的振荡频率等于输入角调制波的载波的中心频率。

7. 发明授权

US3983500A Angle modulated wave demodulation system 失效
公开(公告)号：US3983500A
公开(公告)日：1976-09-28
申请号：US502531
申请日：1974-09-03
申请人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
发明人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
IPC分类号： G11B20/00 , G11B23/00 , H03D3/24 , H04S3/00 , G11B3/04 , G11B3/74 , H03D3/00
CPC分类号： H03D3/244 , G11B20/00992 , G11B23/0007 , H04S3/006
摘要： An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.

8. 发明授权

US09528172B2 High-strength steel sheet having improved resistance to fracture and to HIC 有权
$High-strength steel sheet having improved resistance to fracture and to HIC$
标题翻译：具有改善的耐断裂性和HIC的高强度钢板
公开(公告)号：US09528172B2
公开(公告)日：2016-12-27
申请号：US13820581
申请日：2011-09-02
申请人： Izuru Minato , Nobuaki Takahashi , Akio Yamamoto
发明人： Izuru Minato , Nobuaki Takahashi , Akio Yamamoto
IPC分类号： C22C38/50 , C21D8/02 , C22C38/58 , F16L9/02 , C22C38/00 , C22C38/02 , C22C38/04 , C22C38/06 , C22C38/42 , C22C38/44 , C22C38/46 , C22C38/48
CPC分类号： C22C38/50 , C21D8/0205 , C21D8/0226 , C21D8/0263 , C21D2211/002 , C21D2211/005 , C21D2211/009 , C22C38/001 , C22C38/002 , C22C38/02 , C22C38/04 , C22C38/06 , C22C38/42 , C22C38/44 , C22C38/46 , C22C38/48 , C22C38/58 , F16L9/02
摘要： A high-strength steel sheet having improved HIC resistance and fracture resistance even when it is thick has a chemical composition comprising, in mass %, C: 0.02-0.07%, Si: 0.05-0.50%, Mn: 1.10-1.60%, P: at most 0.015%, S: at most 0.0030%, Nb: 0.005-0.030%, Ti: 0.005-0.020%, Al: 0.005-0.060%, Ca: 0.0005-0.0060%, N: 0.0015-0.0070%, at least one of Cu, Ni, Cr, and Mo in a total of greater than 0.1% to less than 1.5%, and a remainder of Fe and impurities and a steel structure composed of at least 10% by area of bainite and a remainder of ferrite and pearlite. The degree of segregation is less than 1.6 for Nb and less than 1.4 for Mn in the central portion of the thickness of the steel sheet.
摘要翻译：即使厚度高的耐HIC和耐断裂性提高的高强度钢板也具有以质量％计含有C：0.02-0.07％，Si：0.05-0.50％，Mn：1.10-1.60％，P ：至少0.015％，S：0.0030％以下，Nb：0.005〜0.030％，Ti：0.005〜0.020％，Al：0.005〜0.060％，Ca：0.0005〜0.0060％，N：0.0015-0.0070％ Cu，Ni，Cr和Mo中的一种总计大于0.1％至小于1.5％，剩余的Fe和杂质以及由贝氏体至少10％的面积组成的钢结构和剩余的铁素体和珠光体。对于Nb，偏析度小于1.6，在钢板的中心部分的Mn小于1.4。

9. 发明授权

US08716451B2 Stabilized human IgG2 and IgG3 antibodies 有权
标题翻译：稳定的人IgG2和IgG3抗体
公开(公告)号：US08716451B2
公开(公告)日：2014-05-06
申请号：US11794950
申请日：2006-01-12
申请人： Nobuaki Takahashi , Hideaki Yoshida
发明人： Nobuaki Takahashi , Hideaki Yoshida
IPC分类号： C07K16/00 , C12N15/00
CPC分类号： C07K16/00 , C07K16/2878 , C07K2317/21 , C07K2317/52 , C07K2317/56 , C07K2317/94
摘要： It is intended to provide highly stable variants of human antibody IgG2 and IgG3 subclasses. The present invention provides an IgG heavy chain comprising the constant region of a human IgG2 heavy chain having at least a substitution of Y for F at the 300th position, L for V at the 309th position, or A for T at the 339th position designated by the EU index of Kabat et al. and an IgG heavy chain comprising the constant region of a human IgG3 heavy chain having at least a substitution of K for N at the 392nd position or V for M at the 397th position designated by the EU index of Kabat et al. The present invention also provides monoclonal antibodies comprising these heavy chains.
摘要翻译：旨在提供人抗体IgG2和IgG3亚类的高度稳定的变体。本发明提供一种IgG重链，其包含人IgG2重链的恒定区，其在第300位具有至少取代F的F，在第309位具有至少取代F的L，在第309位具有至少取代F的第三十九位，欧盟指数Kabat等和IgG重链，其包含人类IgG3重链的恒定区，在Kabat等人的EU指数指定的第397位具有至少在第392位具有K取代为N或V代表M。本发明还提供了包含这些重链的单克隆抗体。

10. 发明授权

US08451592B2 Electronic package, display device, and electronic device 有权
标题翻译：电子封装，显示设备和电子设备
公开(公告)号：US08451592B2
公开(公告)日：2013-05-28
申请号：US12989005
申请日：2009-03-13
申请人： Norihisa Shintani , Nobuaki Takahashi , Masahiro Imai , Koichi Yoshioka
发明人： Norihisa Shintani , Nobuaki Takahashi , Masahiro Imai , Koichi Yoshioka
IPC分类号： G06F1/16
CPC分类号： G02F1/133308 , G02F2001/133322 , G02F2001/133325 , G02F2201/465 , H05K1/147 , H05K5/02 , H05K2201/09063 , H05K2201/10136 , H05K2203/167
摘要： Provided is a liquid crystal display device (69) including: a liquid crystal display panel unit (49); a backlight unit (59); and a front bezel (BZ1) and a rear bezel (BZ2) for housing the liquid crystal display panel unit and the backlight unit. The liquid crystal display panel unit includes an FPC board (1) which winds around side walls (WL2) and a bottom surface (31) of the rear bezel so as to cover the side walls (WL2) and the bottom surface (31). Outer claw sections (CW1) projecting inward from the side walls (WL1) of the front bezel and inner claw sections (CW2) projecting outward from the side walls of the rear bezel are engaged with each other through openings (HL) provided in the FPC board, thereby integrating the front bezel and the rear bezel.
摘要翻译：提供一种液晶显示装置（69），包括：液晶显示面板单元（49）; 背光单元（59）; 以及用于容纳液晶显示面板单元和背光单元的前挡板（BZ1）和后挡板（BZ2）。液晶显示面板单元包括卷绕侧壁（WL2）和后挡板的底面（31）的FPC基板（1），以覆盖侧壁（WL2）和底面（31）。从前挡板的侧壁（WL1）向内突出的外爪部（CW1）和从后挡板的侧壁向外突出的内爪部（CW2）通过设置在FPC的开口（HL）彼此接合从而整合前挡板和后挡板。

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