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1. 发明授权

US06313024B1 Method for forming a semiconductor device 有权
标题翻译：半导体器件形成方法
公开(公告)号：US06313024B1
公开(公告)日：2001-11-06
申请号：US09394190
申请日：1999-09-10
申请人： Nigel G. Cave , Kathleen C. Yu , Janos Farkas
发明人： Nigel G. Cave , Kathleen C. Yu , Janos Farkas
IPC分类号： H01L2144
CPC分类号： H01L24/05 , H01L23/5329 , H01L24/03 , H01L2224/02166 , H01L2224/05599 , H01L2224/05624 , H01L2224/05647 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/30105 , H01L2924/00014
摘要： In one embodiment of the invention, conductive support structures (112) are formed within an interlevel dielectric layer. The conductive support structures (112) lie within the bond pad region (111) of the integrated circuit and provide support to portions of the interlevel dielectric layer that have a low Young's modulus. The conductive support structures (112) are formed using the same processes that are used to form metal interconnects in the device region (109) of the integrated circuit, but they are not electrically coupled to semiconductor devices that lie within the device region (109). Conductive support structures (114) are also formed within the scribe line region (104) to provide support to the interlevel dielectric layer in this region of the integrated circuit.
摘要翻译：在本发明的一个实施例中，导电支撑结构（112）形成在层间电介质层内。导电支撑结构（112）位于集成电路的接合焊盘区域（111）内，并且对具有低杨氏模量的层间电介质层的部分提供支撑。导电支撑结构（112）使用用于在集成电路的器件区域（109）中形成金属互连的相同工艺形成，但它们不电耦合到位于器件区域（109）内的半导体器件，。导电支撑结构（114）也形成在划线区域（104）内，以提供对集成电路的该区域中的层间电介质层的支撑。

2. 发明授权

US6037668A Integrated circuit having a support structure 有权
标题翻译：具有支撑结构的集成电路
公开(公告)号：US6037668A
公开(公告)日：2000-03-14
申请号：US191353
申请日：1998-11-13
申请人： Nigel G. Cave , Kathleen C. Yu , Janos Farkas
发明人： Nigel G. Cave , Kathleen C. Yu , Janos Farkas
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/822 , H01L23/485 , H01L23/532 , H01L27/04 , H01L23/48 , H01L29/40
CPC分类号： H01L24/05 , H01L23/5329 , H01L24/03 , H01L2224/02166 , H01L2224/05599 , H01L2224/05624 , H01L2224/05647 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/30105
摘要： In one embodiment of the invention, conductive support structures (112) are formed within an interlevel dielectric layer. The conductive support structures (112) lie within the bond pad region (111) of the integrated circuit and provide support to portions of the interlevel dielectric layer that have a low Young's modulus. The conductive support structures (112) are formed using the same processes that are used to form metal interconnects in the device region (109) of the integrated circuit, but they are not electrically coupled to semiconductor devices that lie within the device region (109). Conductive support structures (114) are also formed within the scribe line region (104) to provide support to the interlevel dielectric layer in this region of the integrated circuit.
摘要翻译：在本发明的一个实施例中，导电支撑结构（112）形成在层间电介质层内。导电支撑结构（112）位于集成电路的接合焊盘区域（111）内，并且对具有低杨氏模量的层间电介质层的部分提供支撑。导电支撑结构（112）使用用于在集成电路的器件区域（109）中形成金属互连的相同工艺形成，但它们不电耦合到位于器件区域（109）内的半导体器件，。导电支撑结构（114）也形成在划线区域（104）内，以提供对集成电路的该区域中的层间电介质层的支撑。

3. 发明授权

US07176574B2 Semiconductor device having a multiple thickness interconnect 有权
标题翻译：具有多重厚度互连的半导体器件
公开(公告)号：US07176574B2
公开(公告)日：2007-02-13
申请号：US10946675
申请日：2004-09-22
申请人： Kathleen C. Yu , Kirk J. Strozewski , Janos Farkas , Hector Sanchez , Yeong-Jyh T. Lii
发明人： Kathleen C. Yu , Kirk J. Strozewski , Janos Farkas , Hector Sanchez , Yeong-Jyh T. Lii
IPC分类号： H01L23/52
CPC分类号： H01L23/5283 , H01L21/76807 , H01L21/76816 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A conductive line varies in thickness to assist in overcoming RC delays and noise coupling. By varying line thickness, variation in conductor width is avoided if necessary to maintain a specified minimum pitch between conductors while maintaining predetermined desired RC parameters and noise characteristics of the conductive line. Conductor depth variation is achieved by etching a dielectric layer to different thicknesses. A subsequent conductive fill over the dielectric layer and in the differing thicknesses results in a conductive line that varies in thickness. Different conductive line thicknesses available at a particular metal level can additionally be used for semiconductor structures other than a signal or a power supply conductive line, such as a contact, a via or an electrode of a device. The thickness analysis required to determine how interconnect thickness is varied in order to meet a desired design criteria may be automated and provided as a CAD tool.
摘要翻译：导线的厚度变化，有助于克服RC延迟和噪声耦合。通过改变线路厚度，如果需要在导体之间保持规定的最小间距，同时保持预定的期望的RC参数和导线的噪声特性，则避免导体宽度的变化。通过将介电层蚀刻成不同的厚度来实现导体深度变化。电介质层上的不同厚度的导电填充导致厚度变化的导线。在特定金属水平可用的不同的导线厚度可以另外用于除信号或电源导线之外的半导体结构，例如器件的触点，通孔或电极。为了满足期望的设计标准，确定互连厚度如何变化所需的厚度分析可以是自动化的并且作为CAD工具提供。

4. 发明授权

US06815820B2 Method for forming a semiconductor interconnect with multiple thickness 有权
标题翻译：用于形成具有多个厚度的半导体互连的方法
公开(公告)号：US06815820B2
公开(公告)日：2004-11-09
申请号：US10141714
申请日：2002-05-09
申请人： Kathleen C. Yu , Kirk J. Strozewski , Janos Farkas , Hector Sanchez , Yeong-Jyh T. Lii
发明人： Kathleen C. Yu , Kirk J. Strozewski , Janos Farkas , Hector Sanchez , Yeong-Jyh T. Lii
IPC分类号： H01L2348
CPC分类号： H01L23/5283 , H01L21/76807 , H01L21/76816 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A conductive line varies in thickness to assist in overcoming RC delays and noise coupling. By varying line thickness, variation in conductor width is avoided if necessary to maintain a specified minimum pitch between conductors while maintaining predetermined desired RC parameters and noise characteristics of the conductive line. Conductor depth variation is achieved by etching a dielectric layer to different thicknesses. A subsequent conductive fill over the dielectric layer and in the differing thicknesses results in a conductive line that varies in thickness. Different conductive line thicknesses available at a particular metal level can additionally be used for semiconductor structures other than a signal or a power supply conductive line, such as a contact, a via or an electrode of a device. The thickness analysis required to determine how interconnect thickness is varied in order to meet a desired design criteria may be automated and provided as a CAD tool.

5. 发明授权

US08752228B2 Apparatus for cleaning of circuit substrates 有权
标题翻译：电路基板清洗装置
公开(公告)号：US08752228B2
公开(公告)日：2014-06-17
申请号：US11912126
申请日：2005-04-20
申请人： Janos Farkas , Srdjan Kordic , Sebastien Petitdidier , Kevin E Cooper , Jan Van Hassel
发明人： Janos Farkas , Srdjan Kordic , Sebastien Petitdidier , Kevin E Cooper , Jan Van Hassel
IPC分类号： H01L21/00
CPC分类号： H01L21/67046
摘要： Silicon wafers and the like are cleaned using new scrubber-type apparatus in which measures are taken to compensate for differential cleaning of the central region of the wafer by: using rotary brushes having one or more non-contact portions arranged in the section thereof that faces the central region of the substrate, or toggling the relative position of the wafer and the rotary brushes, or directing cleaning fluid(s) preferentially towards the central region of the wafer. Another aspect of the invention provides scrubber-type cleaning apparatus in which the rotary brushes are replaced by rollers (110). A web of cleaning material (116) is interposed between each roller and the substrate. Various different webs of cleaning material may be used, e.g. a length of tissue, a continuous loop of cleaning material whose surface is reconditioned on each cleaning pass, adhesive material provided on a carrier tape, etc.
摘要翻译：使用新的洗涤器型装置清洁硅晶片等，其中采取措施来补偿晶片的中心区域的差别清洁：使用具有一个或多个非接触部分的旋转电刷，或者切换晶片和旋转刷的相对位置，或者将清洁流体优先地引向晶片的中心区域。本发明的另一方面提供了一种洗涤器型清洁装置，其中旋转刷由辊（110）代替。清洁材料网（116）插入在每个辊和基底之间。可以使用各种不同的清洁材料网，例如。组织长度，每个清洁通道上表面被修复的清洁材料的连续回路，设置在载带上的粘合材料等。

6. 发明授权

US07691756B2 Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device 有权
标题翻译：包括耦合电介质层和金属层的半导体器件，其制造方法以及用于在半导体器件中耦合电介质层和金属层的材料
公开(公告)号：US07691756B2
公开(公告)日：2010-04-06
申请号：US12065179
申请日：2006-09-01
申请人： Janos Farkas , Srdjan Kordic , Cindy Goldberg
发明人： Janos Farkas , Srdjan Kordic , Cindy Goldberg
IPC分类号： H01L21/31 , H01L23/58
CPC分类号： H01L21/3105 , C04B35/5603 , C04B35/565 , C04B2235/483 , C08G77/60 , C08L83/16 , C09D183/16 , H01L21/02063 , H01L21/02126 , H01L21/02164 , H01L21/02203 , H01L21/288 , H01L21/76801 , H01L21/7682 , H01L21/76838
摘要： A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device. In one example, the passivating coupling material has multiple Si atoms in its chemical composition, which desirably increases the thermal stability of the material.
摘要翻译：一种钝化耦合材料，一方面使半导体器件中的电介质层钝化，另一方面，用于在随后的工艺步骤中允许或至少促进液相金属沉积。在具体实例中，电介质层可以是具有理想的降低介电常数k的多孔材料，并且钝化耦合材料提供空间屏蔽基团，其基本上阻止环境水分吸附和吸收到多孔介电层中。与金属沉积相比，钝化耦合材料还提供金属成核侧，用于促进金属沉积在液相中，而不存在钝化偶联材料。使用液相金属沉积工艺有助于随后的半导体器件的制造。在一个实例中，钝化偶联材料在其化学组成中具有多个Si原子，这有利地增加了材料的热稳定性。

7. 发明申请

US20090094098A1 Promotion of a wine industry 审中-公开
标题翻译：推广葡萄酒产业
公开(公告)号：US20090094098A1
公开(公告)日：2009-04-09
申请号：US11906980
申请日：2007-10-04
申请人： Janos Farkas
发明人： Janos Farkas
IPC分类号： G06Q30/00
CPC分类号： G06Q30/02 , G06Q30/0236 , G06Q30/0241
摘要： Disclosed herein is a method and system for promoting a first wine industry of a first geographical location utilizing a plurality of advertising media. In a first embodiment, the plurality of advertising mediums is selected for promoting the first wine industry. The disclosed method links information of contribution of the first wine industry to a second wine industry. The information is publicized in a plurality of locations. In a second embodiment, the first wine industry is promoted utilizing a web portal. The web portal comprises a first set of information of the first wine industry and a second set of information of the second wine industry. The web portal establishes a virtual link between the first set of information and the second set of information. Further, revenue may be generated through the advertising mediums and targeted advertising.
摘要翻译：本文公开了一种利用多种广告媒体促进第一地理位置的第一葡萄酒业的方法和系统。在第一实施例中，多个广告媒体被选择用于促进第一葡萄酒行业。所公开的方法将第一葡萄酒行业的贡献信息与第二葡萄酒行业相关联。该信息在多个位置公开。在第二实施例中，利用门户网站来推广第一葡萄酒行业。该门户网站包括第一葡萄酒行业的第一组信息和第二葡萄酒行业的第二组信息。网络门户在第一组信息和第二组信息之间建立虚拟链路。此外，可以通过广告媒介和有针对性的广告来产生收入。

8. 发明授权

US07456105B1 CMP metal polishing slurry and process with reduced solids concentration 失效
标题翻译： CMP金属抛光浆料和固体浓度降低的工艺
公开(公告)号：US07456105B1
公开(公告)日：2008-11-25
申请号：US10321973
申请日：2002-12-17
申请人： Kevin Elliot Cooper , Jennifer Lynn Cooper , Janos Farkas , John C. Flake , Johannes Friedrich Groschopf , Yuri Solomentsev
发明人： Kevin Elliot Cooper , Jennifer Lynn Cooper , Janos Farkas , John C. Flake , Johannes Friedrich Groschopf , Yuri Solomentsev
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/3212 , C09G1/02
摘要： This disclosure describes a low particle concentration formulation for slurry which is particularly useful in continuous CMP polishing of copper layers during semiconductor wafer manufacture. The slurry is characterized by particle concentrations generally less than 2 wt %, and advantageously less than 1 wt %. In particular embodiments, where the particle concentration is in a range of 50 to 450 PPM, an 8-fold increase in polishing rate over reactive liquid slurries has been realized. Slurries thus formulated also achieve a reduction in defectivity and in the variations in planarity from wafer to wafer during manufacture, by improving the stability of polishing quality. The slurry formulations permit substantial cost savings over traditional 2-component, reactive liquid and fixed/bonded abrasive slurries. In addition the formulations provides an advantageous way during CMP to easily change the selectivity or rate of removal of one film material vs. another. Yet another use is to provide slurry “pulsing” as a means to activate bonded abrasive or fixed abrasive slurry technology.
摘要翻译：本公开内容描述了用于浆料的低颗粒浓度配方，其特别适用于半导体晶片制造过程中铜层的连续CMP抛光。浆料的特征在于颗粒浓度通常小于2重量％，有利地小于1重量％。在特定实施方案中，其中颗粒浓度在50至450PPM的范围内，抛光速率比反应性液体浆料高8倍。因此，通过提高抛光质量的稳定性，由此制成的浆料也可以在制造过程中实现缺陷率的降低和从晶片到晶片的平面度的变化。与传统的2组分反应性液体和固定/粘结的磨料浆料相比，浆料配方可节省大量成本。此外，制剂在CMP期间提供有利的方式以容易地改变一种膜材料相对于另一种膜材料的选择性或速率。另一种用途是提供浆料“脉冲”作为活化粘合磨料或固定磨料浆料技术的手段。

9. 发明申请

US20060294259A1 Method and device for audience monitoring on multicast capable networks 审中-公开
标题翻译：用于组播能力网络的观众监控的方法和设备
公开(公告)号：US20060294259A1
公开(公告)日：2006-12-28
申请号：US10595346
申请日：2003-10-24
申请人： Gergely Matefi , Janos Farkas , Tamas Elteto
发明人： Gergely Matefi , Janos Farkas , Tamas Elteto
IPC分类号： G06F15/16
CPC分类号： H04L12/2861 , H04H60/44 , H04L12/18 , H04L12/2856 , H04L43/08 , H04L67/22
摘要： The presented idea is a cheap solution for audience monitoring in multicast capable networks e.g. Ethernet, IP or UMTS. There is no need for user equipment in order to monitor the viewers' watching behavior. The measurement is done in the operator's network; therefore, there is no need to contact the end user. The idea can be applied in systems comprising multicast capable network contention server, network devices and user equipment. The content is carried in data packets to the end user. The network devices are remote manageable. The user can choose between several contents. The aim is to measure the user statistics regarding the chosen content. According to the invention it is enough to place a measurement host with our proposed software block in the network, which collects data from the network devices in the edge of the network periodically in order to make a content access survey.
摘要翻译：所提出的想法是用于在具有多播能力的网络中的观众监视的廉价解决方案。以太网，IP或UMTS。为了监视观众的观看行为，不需要用户设备。测量在操作员网络中完成; 因此，无需与最终用户联系。该思想可以应用于包括多播能力的网络争用服务器，网络设备和用户设备的系统中。内容以数据包传送给最终用户。网络设备可远程管理。用户可以选择多个内容。目的是衡量有关所选内容的用户统计信息。根据本发明，将测量主机与我们提出的软件块放置在网络中，从而周期性地从网络边缘的网络设备收集数据，以进行内容访问调查。

10. 发明申请

US20060223320A1 Polishing technique to minimize abrasive removal of material and composition therefor 审中-公开
标题翻译：抛光技术，尽可能减少材料的磨料去除及其组成
公开(公告)号：US20060223320A1
公开(公告)日：2006-10-05
申请号：US11093578
申请日：2005-03-30
申请人： Kevin Cooper , Jennifer Cooper , Janos Farkas , John Flake , Johannes Groschopf , Yuri Solomentsev
发明人： Kevin Cooper , Jennifer Cooper , Janos Farkas , John Flake , Johannes Groschopf , Yuri Solomentsev
IPC分类号： B24B49/00
CPC分类号： H01L21/3212 , B24B37/044 , C09G1/02 , C09G1/04
摘要： The present invention provides a composition and a method of polishing a surface that minimizes abrasive removal of material from the surface. To that end, the composition is formulated to maximize dissolution of the material from the surface.
摘要翻译：本发明提供一种抛光表面的组合物和方法，其最小化材料从表面的磨料去除。为此，配制组合物以最大化材料从表面的溶解。

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