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1. 发明申请

US20140013287A1 FRACTURE AWARE OPC 有权
公开(公告)号：US20140013287A1
公开(公告)日：2014-01-09
申请号：US13544014
申请日：2012-07-09
申请人： Nian-Fuh Cheng , Yu-Po Tang , Chien-Fu Lee , Sheng-Wen Lin , Yong-Cheng Lin , Wen-Chun Huang , Ru-Gun Liu
发明人： Nian-Fuh Cheng , Yu-Po Tang , Chien-Fu Lee , Sheng-Wen Lin , Yong-Cheng Lin , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F1/70
摘要： The present disclosure describes an OPC method of preparing data for forming a mask. The method includes setting a plurality of dissection points at the main feature and further includes setting a target point at the main feature. The method includes arranging the two dissection points crossing the main feature symmetrically each other. The method includes separating two adjacent dissection points at one side of the main feature by a maximum resolution of the mask writer. The method includes dividing the main feature into a plurality of segments using the dissection points. The method includes performing an OPC convergence simulation to a target point. The method includes correcting the segments belonging to an ambit of the target point and further includes correcting the segment shared by two ambits.
摘要翻译：本公开描述了制备用于形成掩模的数据的OPC方法。该方法包括在主要特征处设置多个解剖点，并且还包括在主要特征处设置目标点。该方法包括将两个解剖点布置成彼此对称的主要特征。该方法包括通过掩模写入器的最大分辨率在主要特征的一侧分离两个相邻的解剖点。该方法包括使用解剖点将主要特征划分成多个段。该方法包括对目标点执行OPC收敛模拟。该方法包括校正属于目标点的范围的段，并且还包括校正由两个方位共享的段。

2. 发明授权

US08745550B2 Fracture aware OPC 有权
标题翻译：断裂感知OPC
公开(公告)号：US08745550B2
公开(公告)日：2014-06-03
申请号：US13544014
申请日：2012-07-09
申请人： Nian-Fuh Cheng , Yu-Po Tang , Chien-Fu Lee , Sheng-Wen Lin , Yong-Cheng Lin , Wen-Chun Huang , Ru-Gun Liu
发明人： Nian-Fuh Cheng , Yu-Po Tang , Chien-Fu Lee , Sheng-Wen Lin , Yong-Cheng Lin , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F1/70
摘要： The present disclosure describes an OPC method of preparing data for forming a mask. The method includes setting a plurality of dissection points at the main feature and further includes setting a target point at the main feature. The method includes arranging the two dissection points crossing the main feature symmetrically each other. The method includes separating two adjacent dissection points at one side of the main feature by a maximum resolution of the mask writer. The method includes dividing the main feature into a plurality of segments using the dissection points. The method includes performing an OPC convergence simulation to a target point. The method includes correcting the segments belonging to an ambit of the target point and further includes correcting the segment shared by two ambits.
摘要翻译：本公开描述了制备用于形成掩模的数据的OPC方法。该方法包括在主要特征处设置多个解剖点，并且还包括在主要特征处设置目标点。该方法包括将两个解剖点布置成彼此对称的主要特征。该方法包括通过掩模写入器的最大分辨率在主要特征的一侧分离两个相邻的解剖点。该方法包括使用解剖点将主要特征划分成多个段。该方法包括对目标点执行OPC收敛模拟。该方法包括校正属于目标点的范围的段，并且还包括校正由两个方位共享的段。

3. 发明申请

US20130258304A1 ENHANCED EUV LITHOGRAPHY SYSTEM 有权
公开(公告)号：US20130258304A1
公开(公告)日：2013-10-03
申请号：US13437145
申请日：2012-04-02
申请人： Ching-Hsu Chang , Nian-Fuh Cheng , Chih-Shiang Chou , Wen-Chun Huang , Ru-Gun Liu
发明人： Ching-Hsu Chang , Nian-Fuh Cheng , Chih-Shiang Chou , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G03F1/22 , G03B27/72 , G06F17/50
CPC分类号： G03F1/22 , G03F1/70 , G03F7/70066 , G03F7/70283 , G03F7/70433
摘要： The present disclosure provides a semiconductor lithography system. The lithography system includes a projection optics component. The projection optics component includes a curved aperture. The lithography system includes a photo mask positioned over the projection optics component. The photo mask contains a plurality of elongate semiconductor patterns. The semiconductor patterns each point in a direction substantially perpendicular to the curved aperture of the projection optics component. The present disclosure also provides a method. The method includes receiving a design layout for a semiconductor device. The design layout contains a plurality of semiconductor patterns each oriented in a given direction. The method includes transforming the design layout into a mask layout. The semiconductor patterns in the mask layout are oriented in a plurality of different directions as a function of their respective location.

4. 发明申请

US20130055173A1 GEOMETRIC PATTERN DATA QUALITY VERIFICATION FOR MASKLESS LITHOGRAPHY 有权
标题翻译：几何图形数据质量验证用于MASKLESS LITHOGRAPHY
公开(公告)号：US20130055173A1
公开(公告)日：2013-02-28
申请号：US13217345
申请日：2011-08-25
申请人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/2059
摘要： The present disclosure involves a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.
摘要翻译：本公开涉及执行无掩模光刻工艺的方法。该方法包括提供接近校正模式。该方法包括基于接近校正图案生成变形图案。该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。该方法包括响应于识别确定变形图案是否是光刻刻画的。

5. 发明授权

US08473877B2 Striping methodology for maskless lithography 有权
标题翻译：无掩模光刻的剥离方法
公开(公告)号：US08473877B2
公开(公告)日：2013-06-25
申请号：US13225617
申请日：2011-09-06
申请人： Hung-Chun Wang , Tzu-Chin Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Tzu-Chin Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/70425 , H01J37/3174
摘要： The present disclosure involves a method of performing a maskless lithography process. The method includes receiving a computer layout file for an integrated circuit (IC) device. The layout file contains a plurality of IC sections. The method includes separating the computer layout file into a plurality of sub-files. The method includes striping the plurality of sub-files concurrently using a plurality of computer processors, thereby generating a plurality of striped sub-files. The method includes transferring the plurality of striped sub-files to a maskless lithography system.
摘要翻译：本公开涉及执行无掩模光刻工艺的方法。该方法包括接收用于集成电路（IC）设备的计算机布局文件。布局文件包含多个IC部分。该方法包括将计算机布局文件分离成多个子文件。该方法包括使用多个计算机处理器并行地分割多个子文件，从而生成多个条带化子文件。该方法包括将多个条带化子文件传送到无掩模光刻系统。

6. 发明授权

US08468473B1 Method for high volume e-beam lithography 有权
标题翻译：大容量电子束光刻方法
公开(公告)号：US08468473B1
公开(公告)日：2013-06-18
申请号：US13492408
申请日：2012-06-08
申请人： Hung-Chun Wang , Tzu-Chin Lin , Chia-Chi Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Tzu-Chin Lin , Chia-Chi Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： H01J37/3026 , B82Y10/00 , B82Y40/00 , G03F7/70475 , H01J37/3174 , H01J2237/31764 , H01J2237/31771
摘要： The present disclosure describes a method of forming a pattern by an electron beam lithography system. The method includes receiving an integrated circuit (IC) design layout data having a polygon and a forbidden pattern, modifying the polygon and the forbidden pattern using an electron proximity correction (EPC) technique, stripping the modified polygon into subfields, converting the stripped polygon to an electron beam writer format data, and writing the electron beam writer formatted polygon onto a substrate by an electron beam writer. Stripping the modified polygon includes finding the modified forbidden pattern as a reference layer, and stitching the modified polygon to avoid stitching the modified forbidden pattern.
摘要翻译：本公开描述了通过电子束光刻系统形成图案的方法。该方法包括接收具有多边形和禁止图案的集成电路（IC）设计布局数据，使用电子接近校正（EPC）技术修改多边形和禁止图案，将修改的多边形剥离成子字段，将剥离的多边形转换为电子束写入器格式数据，并通过电子束写入器将电子束写入器格式化的多边形写入到衬底上。剥离修改的多边形包括找到修改的禁止图案作为参考层，并且修剪修改的多边形以避免修改修改的禁止图案。

7. 发明申请

US20130061187A1 STRIPING METHODOLOGY FOR MASKLESS LITHOGRAPHY 有权
标题翻译：用于MASKLESS LITHOGRAPHY的划线方法
公开(公告)号：US20130061187A1
公开(公告)日：2013-03-07
申请号：US13225617
申请日：2011-09-06
申请人： Hung-Chun Wang , Tzu-Chin Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Tzu-Chin Lin , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/70425 , H01J37/3174
摘要： The present disclosure involves a method of performing a maskless lithography process. The method includes receiving a computer layout file for an integrated circuit (IC) device. The layout file contains a plurality of IC sections. The method includes separating the computer layout file into a plurality of sub-files. The method includes striping the plurality of sub-files concurrently using a plurality of computer processors, thereby generating a plurality of striped sub-files. The method includes transferring the plurality of striped sub-files to a maskless lithography system.
摘要翻译：本公开涉及执行无掩模光刻工艺的方法。该方法包括接收用于集成电路（IC）设备的计算机布局文件。布局文件包含多个IC部分。该方法包括将计算机布局文件分离成多个子文件。该方法包括使用多个计算机处理器并行地分割多个子文件，从而生成多个条带化子文件。该方法包括将多个条带化子文件传送到无掩模光刻系统。

8. 发明授权

US09091930B2 Enhanced EUV lithography system 有权
标题翻译：增强型EUV光刻系统
公开(公告)号：US09091930B2
公开(公告)日：2015-07-28
申请号：US13437145
申请日：2012-04-02
申请人： Ching-Hsu Chang , Nian-Fuh Cheng , Chih-Shiang Chou , Wen-Chun Huang , Ru-Gun Liu
发明人： Ching-Hsu Chang , Nian-Fuh Cheng , Chih-Shiang Chou , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G03F1/22 , G03F1/70 , G03F7/20
CPC分类号： G03F1/22 , G03F1/70 , G03F7/70066 , G03F7/70283 , G03F7/70433
摘要： The present disclosure provides a semiconductor lithography system. The lithography system includes a projection optics component. The projection optics component includes a curved aperture. The lithography system includes a photo mask positioned over the projection optics component. The photo mask contains a plurality of elongate semiconductor patterns. The semiconductor patterns each point in a direction substantially perpendicular to the curved aperture of the projection optics component. The present disclosure also provides a method. The method includes receiving a design layout for a semiconductor device. The design layout contains a plurality of semiconductor patterns each oriented in a given direction. The method includes transforming the design layout into a mask layout. The semiconductor patterns in the mask layout are oriented in a plurality of different directions as a function of their respective location.
摘要翻译：本公开提供了一种半导体光刻系统。光刻系统包括投影光学部件。投影光学部件包括弯曲孔。光刻系统包括位于投影光学部件上的光掩模。光掩模包含多个细长半导体图案。半导体图案各自指向基本上垂直于投影光学部件的弯曲孔径的方向。本公开还提供了一种方法。该方法包括接收半导体器件的设计布局。设计布局包含多个沿给定方向定向的半导体图案。该方法包括将设计布局转换为蒙版布局。作为其各自位置的函数，掩模布局中的半导体图案被定向在多个不同的方向上。

9. 发明授权

US08601407B2 Geometric pattern data quality verification for maskless lithography 有权
标题翻译：无掩模光刻的几何图形数据质量验证
公开(公告)号：US08601407B2
公开(公告)日：2013-12-03
申请号：US13217345
申请日：2011-08-25
申请人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Pei-Shiang Chen , Tzu-Chin Lin , Cheng-Hung Chen , Shih-Chi Wang , Nian-Fuh Cheng , Jeng-Horng Chen , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G03F7/2059
摘要： Provided is a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.
摘要翻译：提供了进行无掩模光刻处理的方法。该方法包括提供接近校正模式。该方法包括基于接近校正图案生成变形图案。该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。该方法包括响应于识别确定变形图案是否是光刻刻画的。

10. 发明授权

US08631360B2 Methodology of optical proximity correction optimization 有权
标题翻译：光学邻近校正优化方法
公开(公告)号：US08631360B2
公开(公告)日：2014-01-14
申请号：US13448977
申请日：2012-04-17
申请人： Hung-Chun Wang , Ming-Hui Chih , Yu-Po Tang , Chia-Ping Chiang , Feng-Ju Chang , Cheng Kun Tsai , Wen-Chun Huang , Ru-Gun Liu
发明人： Hung-Chun Wang , Ming-Hui Chih , Yu-Po Tang , Chia-Ping Chiang , Feng-Ju Chang , Cheng Kun Tsai , Wen-Chun Huang , Ru-Gun Liu
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G03F1/70
摘要： A method for performing OPC and evaluating OPC solutions is disclosed. An exemplary method includes receiving a design database corresponding to an IC circuit mask. A first lithography simulation and evaluation is performed on the design database utilizing a first set of performance indexes. A modification is made to the design database based on a result of performing the first lithography simulation and evaluation. A second lithography simulation and evaluation is performed on the design database utilizing a second set of performance indexes to verify the modification. If necessary, the design database is modified again based on a result of the second lithography simulation and evaluation. The modified design database is provided to a mask manufacturer for manufacturing the mask corresponding to the modified design database.
摘要翻译：公开了一种执行OPC和评估OPC解决方案的方法。一种示例性方法包括接收对应于IC电路掩码的设计数据库。使用第一组性能指标对设计数据库执行第一光刻模拟和评估。基于执行第一光刻仿真和评估的结果对设计数据库进行修改。使用第二组性能指标对设计数据库执行第二次光刻模拟和评估，以验证修改。如果需要，基于第二光刻模拟和评估的结果再次修改设计数据库。将修改后的设计数据库提供给掩模制造商以制造与修改的设计数据库相对应的掩模。

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