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1. 发明授权

US08204067B2 Technique for lane virtualization 有权
标题翻译：车道虚拟化技术
公开(公告)号：US08204067B2
公开(公告)日：2012-06-19
申请号：US10891348
申请日：2004-07-13
申请人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
IPC分类号： H04L12/56
CPC分类号： G06F13/4018 , G06F13/4009 , Y02D10/14 , Y02D10/151
摘要： A technique to perform virtualization of lanes within a common system interface (CSI) link. More particularly, embodiments described herein relate to virtualizing interconnective paths between two or more electronic devices residing in an electronic network.
摘要翻译：在公共系统接口（CSI）链路中执行通道虚拟化的技术。更具体地，这里描述的实施例涉及虚拟化驻留在电子网络中的两个或多个电子设备之间的互连路径。

2. 发明授权

US07610500B2 Link power saving state 有权
标题翻译：链路省电状态
公开(公告)号：US07610500B2
公开(公告)日：2009-10-27
申请号：US11950292
申请日：2007-12-04
申请人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , Phanindra K. Mannava , Aaron T. Spink , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , Phanindra K. Mannava , Aaron T. Spink , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
IPC分类号： G06F1/00 , H04B1/38 , H04L27/00 , H04L1/00
CPC分类号： G06F1/3209 , G06F1/3253 , H04L12/12 , Y02D10/151 , Y02D50/20 , Y02D50/40
摘要： Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
摘要翻译：公开了用于点对点链路的低功率状态的方法，装置和系统的实施例。在低功率状态期间，差分发送对的两个导体上的信号被驱动到电气空闲。模拟活动检测器在低功率状态期间被使能，并且在正常功率状态期间被禁用。退出低功耗状态不需要物理层重新初始化的顺序。还描述和要求保护其他实施例。

3. 发明授权

US07313712B2 Link power saving state 有权
标题翻译：链路省电状态
公开(公告)号：US07313712B2
公开(公告)日：2007-12-25
申请号：US10850733
申请日：2004-05-21
申请人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , Phanindra K. Mannava , Aaron T. Spink , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Jeffrey R. Wilcox , Sanjay Dabral , Phanindra K. Mannava , Aaron T. Spink , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
IPC分类号： G06F1/00 , G06F1/32
CPC分类号： G06F1/3209 , G06F1/3253 , H04L12/12 , Y02D10/151 , Y02D50/20 , Y02D50/40
摘要： Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
摘要翻译：公开了用于点对点链路的低功率状态的方法，装置和系统的实施例。在低功率状态期间，差分发送对的两个导体上的信号被驱动到电气空闲。模拟活动检测器在低功率状态期间被使能，并且在正常功率状态期间被禁用。退出低功耗状态不需要物理层重新初始化的顺序。还描述和要求保护其他实施例。

4. 发明申请

US20120011276A1 Dynamically Modulating Link Width 有权
标题翻译：动态调节链路宽度
公开(公告)号：US20120011276A1
公开(公告)日：2012-01-12
申请号：US13240546
申请日：2011-09-22
申请人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
IPC分类号： G06F15/173
CPC分类号： H04L67/141 , G06F13/4265 , H04L65/60 , Y02D10/14 , Y02D10/151
摘要： Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
摘要翻译：管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

5. 发明授权

US08914541B2 Dynamically modulating link width 有权
标题翻译：动态调制链路宽度
公开(公告)号：US08914541B2
公开(公告)日：2014-12-16
申请号：US13240546
申请日：2011-09-22
申请人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
IPC分类号： G06F15/16 , G06F13/42
CPC分类号： H04L67/141 , G06F13/4265 , H04L65/60 , Y02D10/14 , Y02D10/151
摘要： Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
摘要翻译：管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

6. 发明授权

US08046488B2 Dynamically modulating link width 有权
标题翻译：动态调制链路宽度
公开(公告)号：US08046488B2
公开(公告)日：2011-10-25
申请号：US10850851
申请日：2004-05-21
申请人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannava , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannava , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
IPC分类号： G06F15/16
CPC分类号： H04L67/141 , G06F13/4265 , H04L65/60 , Y02D10/14 , Y02D10/151
摘要： Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
摘要翻译：管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

7. 发明授权

US08707072B2 Interface frequency modulation to allow non-terminated operation and power reduction 有权
标题翻译：接口频率调制允许非终端操作和功率降低
公开(公告)号：US08707072B2
公开(公告)日：2014-04-22
申请号：US13106187
申请日：2011-05-12
申请人： Jeffrey R. Wilcox
发明人： Jeffrey R. Wilcox
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/325 , G06F1/3253 , Y02D10/126 , Y02D10/151
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for using interface frequency modulation to allow non-terminated operation and power reduction. In some embodiments, an apparatus includes an interface having a termination mode and a power management controller coupled with the interface. The apparatus may also include a power management controller coupled with the interface. In some embodiments, the power management controller is capable of dynamically reducing the operating frequency of the interface and disabling the termination mode to reduce the power consumed by the interface. Other embodiments are described and claimed.
摘要翻译：本发明的实施例通常涉及用于使用接口频率调制以允许非终止操作和功率降低的系统，方法和装置。在一些实施例中，装置包括具有终止模式的接口和与接口耦合的功率管理控制器。该装置还可以包括与该接口耦合的功率管理控制器。在一些实施例中，功率管理控制器能够动态地降低接口的工作频率并禁用终端模式以减少接口消耗的功率。描述和要求保护其他实施例。

8. 发明授权

US07315952B2 Power state coordination between devices sharing power-managed resources 有权
标题翻译：共享权力管理资源的设备之间的电源状态协调
公开(公告)号：US07315952B2
公开(公告)日：2008-01-01
申请号：US10871638
申请日：2004-06-17
申请人： Jeffrey R. Wilcox , Shivnandan Kaushik , Stephen H. Gunther , Devadatta V. Bodas , Siva Ramakrishnan , David Poisner , Lance E. Hacking
发明人： Jeffrey R. Wilcox , Shivnandan Kaushik , Stephen H. Gunther , Devadatta V. Bodas , Siva Ramakrishnan , David Poisner , Lance E. Hacking
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G06F1/3203 , G06F1/3246 , G06F1/3287 , Y02D10/171 , Y10T307/438
摘要： Methods and apparatuses for coordination of power state management in and electronic system.
摘要翻译：电力系统管理与电力系统协调的方法与装置。

9. 发明授权

US06820169B2 Memory control with lookahead power management 有权
标题翻译：内存控制与前瞻性电源管理
公开(公告)号：US06820169B2
公开(公告)日：2004-11-16
申请号：US09963002
申请日：2001-09-25
申请人： Jeffrey R. Wilcox , Opher D. Kahn
发明人： Jeffrey R. Wilcox , Opher D. Kahn
IPC分类号： G06F1200
CPC分类号： G06F13/161 , G06F13/4031
摘要： One or more memory requests are stored in a request buffer. Each memory request targets a memory device in a memory system having one or more memory devices. Each memory device has a first power state and a second power state. Each memory request is issued in an order from the request buffer to the memory system. The memory device targeted by one memory request from the request buffer is identified prior to or while another memory request ahead of the one memory request is issued to the memory system and performed by the memory system. The identified memory device is placed or maintained in the second power state prior to issuing the one memory request to the memory system.
摘要翻译：一个或多个存储器请求存储在请求缓冲器中。每个存储器请求针对具有一个或多个存储器设备的存储器系统中的存储器设备。每个存储器件具有第一功率状态和第二功率状态。每个存储器请求以从请求缓冲器到存储器系统的顺序发出。在一个存储器请求之前的另一个存储器请求被发布到存储器系统并由存储器系统执行的情况下，识别来自请求缓冲器的一个存储器请求所针对的存储器件。在向存储器系统发出一个存储器请求之前，将所识别的存储器件放置或维持在第二电源状态。

10. 发明申请

US20150032941A1 NON-VOLATILE MEMORY INTERFACE 有权
标题翻译：非易失性存储器接口
公开(公告)号：US20150032941A1
公开(公告)日：2015-01-29
申请号：US14128669
申请日：2013-07-25
申请人： Eng Hun Ooi , Robert J. Royer, JR. , Michael W. Williams , Jeffrey R. Wilcox , Ritesh B. Trivedi , Blaise Fanning
发明人： Eng Hun Ooi , Robert J. Royer, JR. , Michael W. Williams , Jeffrey R. Wilcox , Ritesh B. Trivedi , Blaise Fanning
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F3/0679 , G06F12/02 , G06F13/12 , G06F13/16 , G06F13/1668 , G06F13/38 , G06F13/4234 , G06F2212/7202
摘要： In an embodiment, a memory interface may send an indication that a request is being sent. The indication may be sent to a non-volatile memory via a point-to-point bus between a memory interface and the non-volatile memory. The memory interface may send the request to the non-volatile memory via the bus. The request may include an address that may be used to identify a location for storing or reading data. The non-volatile memory may acquire the request from the bus and process the request. After processing the request, the non-volatile memory may send an indication to the memory interface that indicates the non-volatile memory has a response to send to the memory interface. The memory interface may grant access to the bus to the non-volatile memory. After being granted access to the bus, the non-volatile memory may send the response to the memory interface.
摘要翻译：在一个实施例中，存储器接口可以发送请求被发送的指示。该指示可以经由存储器接口和非易失性存储器之间的点对点总线发送到非易失性存储器。存储器接口可以经由总线将请求发送到非易失性存储器。请求可以包括可用于标识用于存储或读取数据的位置的地址。非易失性存储器可以从总线获取请求并处理请求。在处理请求之后，非易失性存储器可以向存储器接口发送指示非易失性存储器具有发送到存储器接口的响应的指示。存储器接口可以向总线授予对非易失性存储器的访问。在被允许访问总线之后，非易失性存储器可以将响应发送到存储器接口。

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