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1. 发明申请

US20090293907A1 METHOD OF SUBSTRATE POLYMER REMOVAL 审中-公开
标题翻译：底物聚合物去除方法
公开(公告)号：US20090293907A1
公开(公告)日：2009-12-03
申请号：US12246137
申请日：2008-10-06
申请人： Nancy Fung , Siyi Li , Ying Rui , Walter R. Merry , Anchel Sheyner , Kathryn Keswick , Shing-Li Sung , Mang-Mang Ling , Chia-Ling Kao , Wei-Te Wu , Kang-Lie Chiang
发明人： Nancy Fung , Siyi Li , Ying Rui , Walter R. Merry , Anchel Sheyner , Kathryn Keswick , Shing-Li Sung , Mang-Mang Ling , Chia-Ling Kao , Wei-Te Wu , Kang-Lie Chiang
IPC分类号： B08B6/00
CPC分类号： H01L21/67069 , G03F7/427 , H01L21/02087 , H01L21/0209
摘要： Methods for cleaning a substrate are provided. In one embodiment, the method includes depositing a polymer on a substrate. A cleaning gas is provided to clean a frontside, a bevel edge, and a backside of the substrate. The cleaning gas may include various reactive chemicals such as H2 and N2 in one embodiment. In another embodiment, the cleaning gas may include H2 and H2O. Plasma is initiated from the cleaning gas and used to remove polymer that formed on a bevel edge, backside, or frontside of the substrate during semiconductor processing.
摘要翻译：提供了清洗基板的方法。在一个实施方案中，该方法包括在基底上沉积聚合物。提供清洁气体以清洁基板的前侧，斜边和背面。在一个实施方案中，清洁气体可以包括各种反应性化学品，例如H 2和N 2。在另一个实施方案中，清洁气体可以包括H 2和H 2 O. 等离子体从清洁气体引发，并用于去除在半导体处理期间在衬底的斜边缘，背面或前面形成的聚合物。

2. 发明授权

US07981812B2 Methods for forming ultra thin structures on a substrate 失效
标题翻译：在基材上形成超薄结构的方法
公开(公告)号：US07981812B2
公开(公告)日：2011-07-19
申请号：US12167553
申请日：2008-07-03
申请人： Kang-Lie Chiang , Chia-Ling Kao
发明人： Kang-Lie Chiang , Chia-Ling Kao
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/31144 , H01L21/02063 , H01L21/0337 , H01L21/0338 , H01L21/31116 , H01L21/76802
摘要： Methods for forming an ultra thin structure using a method that includes multiple cycles of polymer deposition of photoresist (PDP) process and etching process. The embodiments described herein may be advantageously utilized to fabricate a submicron structure on a substrate having a critical dimension less than 55 nm and beyond. In one embodiment, a method of forming a submicron structure on a substrate may include providing a substrate having a patterned photoresist layer disposed on a film stack into an etch chamber, wherein the film stack includes at least a hardmask layer disposed on a dielectric layer, performing a polymer deposition process to deposit a polymer layer on the pattered photoresist layer, thus reducing a critical dimension of an opening in the patterned photoresist layer, and etching the underlying hardmask layer through the opening having the reduced dimension.
摘要翻译：使用包括光致抗蚀剂（PDP）工艺和蚀刻工艺的聚合物沉积的多个循环的方法形成超薄结构的方法。本文描述的实施例可有利地用于在临界尺寸小于55nm及以上的衬底上制造亚微米结构。在一个实施例中，在衬底上形成亚微米结构的方法可以包括提供具有设置在膜堆叠上的图案化光致抗蚀剂层进入蚀刻室的衬底，其中所述膜堆叠包括至少设置在电介质层上的硬掩模层，执行聚合物沉积工艺以在图案化的光致抗蚀剂层上沉积聚合物层，从而减小图案化光致抗蚀剂层中的开口的临界尺寸，以及通过具有减小的尺寸的开口蚀刻下面的硬掩模层。

3. 发明申请

US20090035944A1 METHODS OF FOR FORMING ULTRA THIN STRUCTURES ON A SUBSTRATE 失效
标题翻译：在基材上形成超薄结构的方法
公开(公告)号：US20090035944A1
公开(公告)日：2009-02-05
申请号：US12167553
申请日：2008-07-03
申请人： Kang-Lie Chiang , Chia-Ling Kao
发明人： Kang-Lie Chiang , Chia-Ling Kao
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/02063 , H01L21/0337 , H01L21/0338 , H01L21/31116 , H01L21/76802
摘要： Methods for forming an ultra thin structure using a method that includes multiple cycles of polymer deposition of photoresist (PDP) process and etching process. The embodiments described herein may be advantageously utilized to fabricate a submicron structure on a substrate having a critical dimension less than 55 nm and beyond. In one embodiment, a method of forming a submicron structure on a substrate may include providing a substrate having a patterned photoresist layer disposed on a film stack into an etch chamber, wherein the film stack includes at least a hardmask layer disposed on a dielectric layer, performing a polymer deposition process to deposit a polymer layer on the pattered photoresist layer, thus reducing a critical dimension of an opening in the patterned photoresist layer, and etching the underlying hardmask layer through the opening having the reduced dimension.
摘要翻译：使用包括光致抗蚀剂（PDP）工艺和蚀刻工艺的聚合物沉积的多个循环的方法形成超薄结构的方法。本文描述的实施例可有利地用于在临界尺寸小于55nm及以上的衬底上制造亚微米结构。在一个实施例中，在衬底上形成亚微米结构的方法可以包括提供具有设置在膜堆叠上的图案化光致抗蚀剂层进入蚀刻室的衬底，其中所述膜堆叠包括至少设置在电介质层上的硬掩模层，执行聚合物沉积工艺以在图案化的光致抗蚀剂层上沉积聚合物层，从而减小图案化光致抗蚀剂层中的开口的临界尺寸，以及通过具有减小的尺寸的开口蚀刻下面的硬掩模层。

4. 发明申请

US20140273496A1 METHOD OF REMOVING A METAL HARDMASK 有权
标题翻译：移除金属硬质合金的方法
公开(公告)号：US20140273496A1
公开(公告)日：2014-09-18
申请号：US13889550
申请日：2013-05-08
申请人： Chia-Ling Kao , Kwang-soo Kim , Sean S. Kang , Srinivas D. Nemani
发明人： Chia-Ling Kao , Kwang-soo Kim , Sean S. Kang , Srinivas D. Nemani
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/02063 , H01L21/31116 , H01L21/32136 , H01L21/76811 , H01L21/76813 , H01L21/76814 , H01L2221/1063
摘要： Methods of removing metal hardmasks in the presence of ultra low-k dielectric films are described. In an example, a method of patterning a low-k dielectric film includes forming a pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. The method also includes etching, using the metal nitride hardmask layer as a mask, the pattern at least partially into the low-k dielectric film, the etching involving using a plasma etch based on SiFx. The etching also involves forming an SiOx passivation layer at least on sidewalls of the low-k dielectric film formed during the etching. The method also includes removing the metal nitride hardmask layer by a dry etch process, where the SiOx passivation layer protects the low-k dielectric film during the removing.
摘要翻译：描述了在超低k电介质膜存在下去除金属硬掩模的方法。在一个示例中，图案化低k电介质膜的方法包括在形成在衬底上方的低k电介质膜上形成的金属氮化物硬掩模层中形成图案。该方法还包括使用金属氮化物硬掩模层作为掩模的蚀刻，该图案至少部分地进入低k电介质膜，该蚀刻涉及使用基于SiFx的等离子体蚀刻。蚀刻还包括至少在蚀刻期间形成的低k电介质膜的侧壁上形成SiO x钝化层。该方法还包括通过干蚀刻工艺去除金属氮化物硬掩模层，其中SiO x钝化层在去除期间保护低k绝缘膜。

5. 发明申请

US20140024220A1 METHOD OF FABRICATING AN ULTRA LOW-K DIELECTRIC SELF-ALIGNED VIA 有权
标题翻译：制造超低K电介质自对准方法
公开(公告)号：US20140024220A1
公开(公告)日：2014-01-23
申请号：US13724698
申请日：2012-12-21
申请人： Chih-Yang Chang , Sean S. Kang , Chia-Ling Kao , Nikolaos Bekiaris
发明人： Chih-Yang Chang , Sean S. Kang , Chia-Ling Kao , Nikolaos Bekiaris
IPC分类号： H01L21/3065
CPC分类号： H01L21/3065 , H01L21/3105 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/76811 , H01L21/76813 , H01L21/76814
摘要： Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.
摘要翻译：描述了制造超低k电介质自对准通孔的方法。在一个示例中，在低k电介质膜中形成自对准通孔（SAV）的方法包括在形成在衬底上方的低k电介质膜上形成的金属氮化物硬掩模层中形成沟槽图案。在形成在金属氮化物硬掩模层之上的掩模层中形成通孔图案。通孔图案至少部分地被蚀刻到低k电介质膜中，蚀刻包括使用基于CF4，H2和稀释惰性气体组成的化学物质进行等离子体蚀刻。

6. 发明授权

US08987139B2 Method of patterning a low-k dielectric film 有权
标题翻译：图案化低k电介质膜的方法
公开(公告)号：US08987139B2
公开(公告)日：2015-03-24
申请号：US14159832
申请日：2014-01-21
申请人： Chia-Ling Kao , Sean S. Kang , Srinivas D. Nemani
发明人： Chia-Ling Kao , Sean S. Kang , Srinivas D. Nemani
IPC分类号： H01L21/311 , H01L21/321 , H01L21/3213
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/321 , H01L21/32136 , H01L21/76802
摘要： Methods of patterning low-k dielectric films are described. In an example, In an embodiment, a method of patterning a low-k dielectric film involves forming and patterning a metal nitride mask layer above a low-k dielectric layer. The low-k dielectric layer is disposed above a substrate. The method also involves passivating the metal nitride mask layer by treating with a plasma based on O2/N2/SixFy. The method also involves etching a portion of the low-k dielectric layer.
摘要翻译：描述了低k介电膜图案的方法。在一个实施例中，在一个实施例中，图案化低k电介质膜的方法涉及在低k电介质层上形成和图案化金属氮化物掩模层。低k电介质层设置在衬底之上。该方法还涉及通过用基于O 2 / N 2 / SixFy的等离子体处理钝化金属氮化物掩模层。该方法还涉及蚀刻低k电介质层的一部分。

7. 发明授权

US09006106B2 Method of removing a metal hardmask 有权
标题翻译：去除金属硬掩模的方法
公开(公告)号：US09006106B2
公开(公告)日：2015-04-14
申请号：US13889550
申请日：2013-05-08
申请人： Chia-Ling Kao , Kwang-soo Kim , Sean S. Kang , Srinivas D. Nemani
发明人： Chia-Ling Kao , Kwang-soo Kim , Sean S. Kang , Srinivas D. Nemani
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/02063 , H01L21/31116 , H01L21/32136 , H01L21/76811 , H01L21/76813 , H01L21/76814 , H01L2221/1063
摘要： Methods of removing metal hardmasks in the presence of ultra low-k dielectric films are described. In an example, a method of patterning a low-k dielectric film includes forming a pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. The method also includes etching, using the metal nitride hardmask layer as a mask, the pattern at least partially into the low-k dielectric film, the etching involving using a plasma etch based on SiFx. The etching also involves forming an SiOx passivation layer at least on sidewalls of the low-k dielectric film formed during the etching. The method also includes removing the metal nitride hardmask layer by a dry etch process, where the SiOx passivation layer protects the low-k dielectric film during the removing.
摘要翻译：描述了在超低k电介质膜存在下去除金属硬掩模的方法。在一个示例中，图案化低k电介质膜的方法包括在形成在衬底上方的低k电介质膜上形成的金属氮化物硬掩模层中形成图案。该方法还包括使用金属氮化物硬掩模层作为掩模的蚀刻，该图案至少部分地进入低k电介质膜，该蚀刻涉及使用基于SiFx的等离子体蚀刻。蚀刻还包括至少在蚀刻期间形成的低k电介质膜的侧壁上形成SiO x钝化层。该方法还包括通过干蚀刻工艺去除金属氮化物硬掩模层，其中SiO x钝化层在去除期间保护低k绝缘膜。

8. 发明申请

US20140213060A1 METHOD OF PATTERNING A LOW-K DIELECTRIC FILM 有权
标题翻译：绘制低K电介质膜的方法
公开(公告)号：US20140213060A1
公开(公告)日：2014-07-31
申请号：US14159832
申请日：2014-01-21
申请人： Chia-Ling Kao , Sean S. Kang , Srinivas D. Nemani
发明人： Chia-Ling Kao , Sean S. Kang , Srinivas D. Nemani
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/321 , H01L21/32136 , H01L21/76802
摘要： Methods of patterning low-k dielectric films are described. In an example, In an embodiment, a method of patterning a low-k dielectric film involves forming and patterning a metal nitride mask layer above a low-k dielectric layer. The low-k dielectric layer is disposed above a substrate. The method also involves passivating the metal nitride mask layer by treating with a plasma based on O2/N2/SixFy. The method also involves etching a portion of the low-k dielectric layer.
摘要翻译：描述了低k介电膜图案的方法。在一个实施例中，在一个实施例中，图案化低k电介质膜的方法涉及在低k电介质层上形成和图案化金属氮化物掩模层。低k电介质层设置在衬底之上。该方法还涉及通过用基于O 2 / N 2 / SixFy的等离子体处理钝化金属氮化物掩模层。该方法还涉及蚀刻低k电介质层的一部分。

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