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    • 4. 发明申请
    • DIGITAL AMPLITUDE MODULATOR AND POLAR TRANSMITTER USING THEREOF
    • 数字振幅调制器及其使用的极性发射器
    • US20110280334A1
    • 2011-11-17
    • US12859800
    • 2010-08-20
    • Joon Hyung LimHan Jin ChoYong Il KwonKyung Hee HongKoon Shik ChoMyeung Su Kim
    • Joon Hyung LimHan Jin ChoYong Il KwonKyung Hee HongKoon Shik ChoMyeung Su Kim
    • H04L27/00H03C1/02
    • H04L27/361H03C5/00H03F2200/331H03M1/682H03M1/685H03M7/3042
    • The present invention provides a digital amplitude modulator and polar transmitter using the same. The polar transmitter includes: a polar converter for converting an input signal into an amplitude information signal and a phase information signal, and outputting the converted amplitude and phase information signal; a sigma-delta modulator for receiving a fractional part of the amplitude information signal, and generating a correcting value for an integer part of the amplitude information signal; a phase-modulator for upward-modulating the phase information signal outputted from the polar converter, and outputting carrier waves including the upward-modulated phase information signal; and a digital power amplifier for generating an output signal whose amplitude corresponds to the integer part of the amplitude information signal which is subjected to correction by the correcting value, and outputting combining the output signal with an output value of the phase-modulator to output the combined signal.
    • 本发明提供一种数字振幅调制器和使用该调幅器的极化发射机。 极性发射机包括:极化转换器,用于将输入信号转换为振幅信息信号和相位信息信号,并输出转换的幅度和相位信息信号; 一个Σ-Δ调制器,用于接收幅度信息信号的分数部分,并产生一个幅度信息信号整数部分的校正值; 相位调制器,用于对从极化转换器输出的相位信息信号进行向上调制,并输出包括向上调制相位信息信号的载波; 以及数字功率放大器,用于产生其幅度对应于通过校正值进行校正的振幅信息信号的整数部分的输出信号,并且输出将输出信号与相位调制器的输出值相组合以输出 组合信号。
    • 7. 发明授权
    • Pad controlling apparatus
    • 垫控制装置
    • US08564360B2
    • 2013-10-22
    • US13440497
    • 2012-04-05
    • Yong Il KwonHan Jin ChoTah Joon ParkKoon Shik Cho
    • Yong Il KwonHan Jin ChoTah Joon ParkKoon Shik Cho
    • G05F1/10
    • G06F1/32
    • Disclosed herein is a pad controlling apparatus controlling current and voltage applied to a pad, the pad controlling apparatus including: a voltage drop unit dropping the voltage applied to the pad; a switching unit connected in parallel with the voltage drop unit; and a control unit comparing a level of the dropped voltage and first reference voltage with each other and turning on the switching unit on when the level of the dropped voltage is larger than the first reference voltage. According to the present invention, even though interrupt occurs from the outside, a chip may be normally operated.
    • 这里公开了一种控制施加到焊盘的电流和电压的焊盘控制装置,焊盘控制装置包括:降压单元,降低施加到焊盘的电压; 开关单元,与所述电压降单元并联连接; 以及控制单元,其将所述下降电压和所述第一参考电压的电平相互比较,并且在所述下降电压的电平大于所述第一参考电压时接通所述开关单元。 根据本发明,即使从外部发生中断,芯片也可以正常工作。
    • 10. 发明授权
    • Crossbar switch architecture for multi-processor SoC platform
    • 交叉开关架构为多处理器SoC平台
    • US07554355B2
    • 2009-06-30
    • US11607515
    • 2006-12-01
    • June Young ChangHan Jin Cho
    • June Young ChangHan Jin Cho
    • H04L12/50H03K17/00
    • H04L49/101H04L49/15H04L49/45
    • Provided is a crossbar switch architecture appropriate to a multi-processor system-on-a-chip (SoC) platform including a plurality of masters and slaves, capable of high-speed data transfer, allowing the number of masters or slaves therein to be easily increased, and having a simple control structure. The crossbar switch architecture includes 2×1 multiplexers connected in a matrix form consisting of rows and columns. The 2×1 multiplexers each have one input line connected with an output line of a multiplexer at a front column of the same row, and the other input line connected with an input/output line of a column including the corresponding multiplexer, and an output line of a multiplexer at the last column of each row is connected with an input/output line of the row.
    • 提供了一种适用于多处理器片上系统(SoC)平台的交叉开关架构,其包括能够进行高速数据传输的多个主机和从机,从而允许其中的主机或从机的数量容易 增加并具有简单的控制结构。 交叉开关架构包括以行和列组成的矩阵形式连接的2x1多路复用器。 2×1复用器各自具有一个输入线,与同一行前列的多路复用器的输出线连接,另一条输入线与包括相应多路复用器的列的输入/输出线连接,另一条输入线与 每行最后一列的多路复用器与该行的输入/输出线连接。