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1. 发明授权

US08203817B2 Power supply circuit, overcurrent protection circuit for the same, and electronic device 有权
公开(公告)号：US08203817B2
公开(公告)日：2012-06-19
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.

2. 发明申请

US20090201618A1 POWER SUPPLY CIRCUIT, OVERCURRENT PROTECTION CIRCUIT FOR THE SAME, AND ELECTRONIC DEVICE 有权
标题翻译：电源电路，相同的过电流保护电路和电子设备
公开(公告)号：US20090201618A1
公开(公告)日：2009-08-13
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译：电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。

3. 发明授权

US08233257B2 Power supply circuit, overcurrent protection circuit for the same, and electronic device 有权
标题翻译：电源电路，过流保护电路相同，电子设备
公开(公告)号：US08233257B2
公开(公告)日：2012-07-31
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译：电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。

4. 发明申请

US20090115382A1 LINEAR REGULATOR CIRCUIT, LINEAR REGULATION METHOD AND SEMICONDUCTOR DEVICE 有权
标题翻译：线性调节器电路，线性调节方法和半导体器件
公开(公告)号：US20090115382A1
公开(公告)日：2009-05-07
申请号：US12255356
申请日：2008-10-21
申请人： Morihito HASEGAWA , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
发明人： Morihito HASEGAWA , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
IPC分类号： G05F1/00
CPC分类号： G05F1/575
摘要： According to one aspect of the embodiment, a linear regulator circuit includes an output transistor outputting an output current based on a input voltage, an error amplifier outputting a control signal based on an electric potential difference between an output voltage based on the output current and a reference voltage, a buffer circuit coupled between the error amplifier and the output transistor, and a drive capability adjustment circuit adjusting a load drive capability of the buffer circuit in synchronization with the output current.
摘要翻译：根据本实施例的一个方面，线性调节器电路包括输出晶体管，其基于输入电压输出输出电流;误差放大器，基于输出电流的输出电压和基于输出电流的电位差输出控制信号; 参考电压，耦合在误差放大器和输出晶体管之间的缓冲电路，以及与输出电流同步地调节缓冲电路的负载驱动能力的驱动能力调整电路。

5. 发明授权

US08760133B2 Linear drop-out regulator circuit 有权
标题翻译：线性掉电稳压电路
公开(公告)号：US08760133B2
公开(公告)日：2014-06-24
申请号：US12255356
申请日：2008-10-21
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
IPC分类号： G05F1/40
CPC分类号： G05F1/575
摘要： According to one aspect of the embodiment, a linear regulator circuit includes an output transistor outputting an output current based on a input voltage, an error amplifier outputting a control signal based on an electric potential difference between an output voltage based on the output current and a reference voltage, a buffer circuit coupled between the error amplifier and the output transistor, and a drive capability adjustment circuit adjusting a load drive capability of the buffer circuit in synchronization with the output current.
摘要翻译：根据本实施例的一个方面，线性调节器电路包括输出晶体管，其基于输入电压输出输出电流;误差放大器，基于输出电流的输出电压和基于输出电流的电位差输出控制信号; 参考电压，耦合在误差放大器和输出晶体管之间的缓冲电路，以及与输出电流同步地调节缓冲电路的负载驱动能力的驱动能力调整电路。

6. 发明授权

US07352163B2 Early effect cancelling circuit, differential amplifier, linear regulator, and early effect canceling method 有权
标题翻译：早期效应消除电路，差分放大器，线性稳压器和早期效应消除方法
公开(公告)号：US07352163B2
公开(公告)日：2008-04-01
申请号：US11132172
申请日：2005-05-19
申请人： Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
发明人： Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
IPC分类号： G05F3/04 , G05F3/08
CPC分类号： G05F1/575 , H03F3/345 , H03F3/45273 , H03F2200/303 , H03F2200/91
摘要： In an input transistor of current mirror circuit, it is intended to prevent the current generated by Early effects from appearing in the output current of the current mirror circuit. Having an Early voltage detector 22 of same connection and structure as a driver circuit 21, and connected in parallel to the driver circuit 21, the current flowing in input transistor Q9 of the Early voltage detector 22 is detected. Output current (current IQ11) of Early voltage detector 22 is added to input current (current IQ5) of driver circuit 21. As a result, in input current (current IQ7) of current mirror circuit 25, current α due to Early voltage effects can be canceled. At the same time, current α due to Early voltage effects generated in input transistor Q5 of current mirror circuit 25 is prevented from appearing in output current (current IQ8) of current mirror circuit 25.
摘要翻译：在电流镜电路的输入晶体管中，旨在防止由早期效应产生的电流出现在电流镜电路的输出电流中。具有与驱动电路21相同的连接和结构的早期电压检测器22并且并联连接到驱动器电路21，检测在早期电压检测器22的输入晶体管Q 9中流动的电流。早期电压检测器22的输出电流（电流IQ11）被加到驱动电路21的输入电流（电流IQ 5）。结果，在电流镜电路25的输入电流（电流IQ 7）中，可以消除由于早期电压效应引起的电流α。同时，由于电流镜电路25的输入晶体管Q 5中产生的早期电压效应的电流α被防止出现在电流镜电路25的输出电流（电流IQ 8）中。

7. 发明授权

US07250745B2 Control circuit of DC-DC converter and its control method 有权
标题翻译： DC-DC转换器的控制电路及其控制方法
公开(公告)号：US07250745B2
公开(公告)日：2007-07-31
申请号：US10973257
申请日：2004-10-27
申请人： Katsuyuki Yasukouchi , Hidenobu Ito
发明人： Katsuyuki Yasukouchi , Hidenobu Ito
IPC分类号： G05F1/40
CPC分类号： H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： In a DC-DC converter of synchronous rectifying system, a control circuit of DC-DC converter capable of improving the control voltage value of output voltage at light load and enhancing the power conversion efficiency, and its control method are presented. An inverting input terminal of comparator COMP2 of which non-inverting input terminal is connected to a grounding potential is connected to one terminal of choke coil L1 by way of terminal (X). An output terminal (N1) of comparator COMP2 is connected to a delay circuit DL, and an output terminal (N2) of delay circuit DL is connected to AND gate circuit AND1. The delay circuit DL is a circuit for delaying the transition from high level to low level of input terminal (N1). Excessive power supplied more than demanded by the load at light load is returned to choke coil L1. Elevation of output voltage VOUT due to excess power accumulated in output capacitor C1 can be suppressed.
摘要翻译：在同步整流系统的DC-DC转换器中，提出了一种能够提高轻载输出电压控制电压值，提高功率转换效率的DC-DC转换器控制电路及其控制方法。通过端子（X）将同相输入端子连接到接地电位的比较器COMP 2的反相输入端子连接到扼流线圈L 1的一端。比较器COMP2的输出端（N1）连接到延迟电路DL，并且延迟电路DL的输出端（N 2）连接到与门电路AND 1。延迟电路DL是用于延迟从高电平到低电平的输入端子（N 1）的转换的电路。在负载较轻的情况下供电超过供电的功率过大返回扼流圈L1。可以抑制由于在输出电容器C 1中蓄积的过剩功率而导致的输出电压VOUT的升高。

8. 发明申请

US20050285579A1 Control circuit of DC-DC converter and its control method 有权
标题翻译： DC-DC转换器的控制电路及其控制方法
公开(公告)号：US20050285579A1
公开(公告)日：2005-12-29
申请号：US10973257
申请日：2004-10-27
申请人： Katsuyuki Yasukouchi , Hidenobu Ito
发明人： Katsuyuki Yasukouchi , Hidenobu Ito
IPC分类号： H02M3/155 , G05F1/40 , H02M3/158
CPC分类号： H02M3/1588 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： In a DC-DC converter of synchronous rectifying system, a control circuit of DC-DC converter capable of improving the control voltage value of output voltage at light load and enhancing the power conversion efficiency, and its control method are presented. An inverting input terminal of comparator COMP2 of which non-inverting input terminal is connected to a grounding potential is connected to one terminal of choke coil L1 by way of terminal (X). An output terminal (N1) of comparator COMP2 is connected to a delay circuit DL, and an output terminal (N2) of delay circuit DL is connected to AND gate circuit AND1. The delay circuit DL is a circuit for delaying the transition from high level to low level of input terminal (N1). Excessive power supplied more than demanded by the load at light load is returned to choke coil L1. Elevation of output voltage VOUT due to excess power accumulated in output capacitor C1 can be suppressed.
摘要翻译：在同步整流系统的DC-DC转换器中，提出了一种能够提高轻载输出电压控制电压值，提高功率转换效率的DC-DC转换器控制电路及其控制方法。通过端子（X）将同相输入端子连接到接地电位的比较器COMP 2的反相输入端子连接到扼流线圈L 1的一端。比较器COMP2的输出端（N1）连接到延迟电路DL，并且延迟电路DL的输出端（N 2）连接到与门电路AND 1。延迟电路DL是用于延迟从高电平到低电平的输入端子（N 1）的转换的电路。在负载较轻的情况下供电超过供电的功率过大返回扼流圈L1。可以抑制由于在输出电容器C 1中蓄积的过剩功率而导致的输出电压VOUT的升高。

9. 发明申请

US20060192543A1 Early effect cancelling circuit, differential amplifier, linear regulator, and early effect canceling method 有权
标题翻译：早期效应消除电路，差分放大器，线性稳压器和早期效应消除方法
公开(公告)号：US20060192543A1
公开(公告)日：2006-08-31
申请号：US11132172
申请日：2005-05-19
申请人： Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
发明人： Yoshihiro Kizaki , Katsuyuki Yasukouchi , Hidenobu Ito
IPC分类号： G05F3/16 , G05F3/20
CPC分类号： G05F1/575 , H03F3/345 , H03F3/45273 , H03F2200/303 , H03F2200/91
摘要： In an input transistor of current mirror circuit, it is intended to prevent the current generated by Early effects from appearing in the output current of the current mirror circuit. Having an Early voltage detector 22 of same connection and structure as a driver circuit 21, and connected in parallel to the driver circuit 21, the current flowing in input transistor Q9 of the Early voltage detector 22 is detected. Output current (current IQ11) of Early voltage detector 22 is added to input current (current IQ5) of driver circuit 21. As a result, in input current (current IQ7) of current mirror circuit 25, current α due to Early voltage effects can be canceled. At the same time, current α due to Early voltage effects generated in input transistor Q5 of current mirror circuit 25 is prevented from appearing in output current (current IQ8) of current mirror circuit 25.
摘要翻译：在电流镜电路的输入晶体管中，旨在防止由早期效应产生的电流出现在电流镜电路的输出电流中。具有与驱动电路21相同的连接和结构的早期电压检测器22并且并联连接到驱动器电路21，检测在早期电压检测器22的输入晶体管Q 9中流动的电流。早期电压检测器22的输出电流（电流IQ11）被加到驱动电路21的输入电流（电流IQ 5）。结果，在电流镜电路25的输入电流（电流IQ 7）中，可以消除由于早期电压效应引起的电流α。同时，由于电流镜电路25的输入晶体管Q 5中产生的早期电压效应的电流α被防止出现在电流镜电路25的输出电流（电流IQ 8）中。

10. 发明授权

US07777473B2 DC-DC converter and control circuit for DC-DC converter 有权
标题翻译： DC-DC转换器和DC-DC转换器的控制电路
公开(公告)号：US07777473B2
公开(公告)日：2010-08-17
申请号：US12257222
申请日：2008-10-23
申请人： Morihito Hasegawa , Chikara Tsuchiya , Hidenobu Ito
发明人： Morihito Hasegawa , Chikara Tsuchiya , Hidenobu Ito
IPC分类号： G05F1/575 , G05F1/656
CPC分类号： H02M1/38 , H03K2017/307
摘要： A DC-DC converter prevents through current from flowing in an output transistor. A first transistor receives an input voltage. A second transistor is connected to the first transistor. A comparator is connected to the second transistor. The comparator detects current flowing through a choke coil based on the potential difference between two terminals of the second transistor to generate a switching control signal for turning the second transistor on and off. The second transistor and the comparator form an ideal diode. A control circuit of the DC-DC converter generates an activation signal for turning the first transistor on and off based on a pulse signal to keep an output voltage constant. A through current prevention pulse generation circuit generates a pulse signal for turning off the second transistor from before the first transistor is turned on to after the first transistor is turned on.
摘要翻译： DC-DC转换器防止直流电流流入输出晶体管。第一晶体管接收输入电压。第二晶体管连接到第一晶体管。比较器连接到第二晶体管。比较器基于第二晶体管的两个端子之间的电位差来检测流过扼流线圈的电流，以产生用于使第二晶体管接通和关断的开关控制信号。第二个晶体管和比较器构成一个理想的二极管。 DC-DC转换器的控制电路基于脉冲信号产生用于使第一晶体管导通和截止的激活信号，以保持输出电压恒定。通过电流防止脉冲产生电路在第一晶体管导通之后到第一晶体管导通之后产生用于使第二晶体管截止的脉冲信号。

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