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1. 发明申请

US20070132435A1 Step-up type DC-DC converter and method for controlling step-up type DC-DC converter 有权
标题翻译：升压型DC-DC转换器和控制升压型DC-DC转换器的方法
公开(公告)号：US20070132435A1
公开(公告)日：2007-06-14
申请号：US11362513
申请日：2006-02-27
申请人： Morihito Hasegawa , Hidekiyo Ozawa , Shoji Tajiri , Toshihiko Kasai
发明人： Morihito Hasegawa , Hidekiyo Ozawa , Shoji Tajiri , Toshihiko Kasai
IPC分类号： G05F1/00
CPC分类号： H02M1/36 , H02M3/156 , H02M2003/078 , H03K17/302 , H03K2217/0018
摘要： The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET1). During a period during which an output voltage (Vout) is lower than a reference voltage (e0), an oscillation signal (OS1) is inputted to a gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET1) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e0), a pulse signal (PS) is inputted to the gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (5). Therefore, the transistor (FET1) has a threshold voltage higher than the reference threshold voltage (Vto).
摘要翻译：本发明提供一种DC-DC转换器，其能够在输入电压低的状态下启动并且能够在不增加电路尺寸的情况下被构造。背栅电压（Vsb）从背栅极电压产生电路（VBGN）输出，并被输入到晶体管（FET1）的背栅极。在输出电压（Vout）低于基准电压（e 0）的期间，将振荡信号（OS1）输入到晶体管（FET1）的栅极，将栅极电压（Vsb ）设置在接地电压。因此，晶体管（FET1）具有参考阈值电压（Vto）。另一方面，在输出电压（Vout）高于基准电压（e 0）的期间，将脉冲信号（PS）输入到晶体管（FET1）的栅极，栅极电压（Vsb）设定在电荷泵部（5）的输出电压。因此，晶体管（FET1）具有高于参考阈值电压（Vto）的阈值电压。

2. 发明授权

US07298117B2 Step-up (boost) DC regulator with two-level back-bias switch gate voltage 有权
标题翻译：升压（升压）直流稳压器，具有双电平偏压开关栅极电压
公开(公告)号：US07298117B2
公开(公告)日：2007-11-20
申请号：US11362513
申请日：2006-02-27
申请人： Morihito Hasegawa , Hidekiyo Ozawa , Shoji Tajiri , Toshihiko Kasai
发明人： Morihito Hasegawa , Hidekiyo Ozawa , Shoji Tajiri , Toshihiko Kasai
IPC分类号： G05F1/10
CPC分类号： H02M1/36 , H02M3/156 , H02M2003/078 , H03K17/302 , H03K2217/0018
摘要： The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET1). During a period during which an output voltage (Vout) is lower than a reference voltage (e0), an oscillation signal (OS1) is inputted to a gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET1) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e0), a pulse signal (PS) is inputted to the gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (5). Therefore, the transistor (FET1) has a threshold voltage higher than the reference threshold voltage (Vto).
摘要翻译：本发明提供一种DC-DC转换器，其能够在输入电压低的状态下启动并且能够在不增加电路尺寸的情况下被构造。背栅电压（Vsb）从背栅极电压产生电路（VBGN）输出，并被输入到晶体管（FET1）的背栅极。在输出电压（Vout）低于基准电压（e 0）的期间，将振荡信号（OS1）输入到晶体管（FET1）的栅极，将栅极电压（Vsb ）设置在接地电压。因此，晶体管（FET1）具有参考阈值电压（Vto）。另一方面，在输出电压（Vout）高于基准电压（e 0）的期间，将脉冲信号（PS）输入到晶体管（FET1）的栅极，栅极电压（Vsb）设定在电荷泵部（5）的输出电压。因此，晶体管（FET1）具有高于参考阈值电压（Vto）的阈值电压。

3. 发明授权

US08233257B2 Power supply circuit, overcurrent protection circuit for the same, and electronic device 有权
标题翻译：电源电路，过流保护电路相同，电子设备
公开(公告)号：US08233257B2
公开(公告)日：2012-07-31
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译：电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。

4. 发明申请

US20090201618A1 POWER SUPPLY CIRCUIT, OVERCURRENT PROTECTION CIRCUIT FOR THE SAME, AND ELECTRONIC DEVICE 有权
标题翻译：电源电路，相同的过电流保护电路和电子设备
公开(公告)号：US20090201618A1
公开(公告)日：2009-08-13
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译：电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。

5. 发明授权

US08203817B2 Power supply circuit, overcurrent protection circuit for the same, and electronic device 有权
公开(公告)号：US08203817B2
公开(公告)日：2012-06-19
申请号：US12369907
申请日：2009-02-12
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Toshihiko Kasai , Katsuyuki Yasukouchi
IPC分类号： H02H9/08
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.

6. 发明授权

US08541996B2 Power control device, power supply device, and power control method 有权
标题翻译：电源控制装置，电源装置和电源控制方式
公开(公告)号：US08541996B2
公开(公告)日：2013-09-24
申请号：US12778812
申请日：2010-05-12
申请人： Toshihiko Kasai , Hidenobu Ito
发明人： Toshihiko Kasai , Hidenobu Ito
IPC分类号： G05F1/10 , G05F1/652 , G05F1/44
CPC分类号： H02M3/1588 , H02M2001/0025 , H02M2001/0032 , Y02B70/1466 , Y02B70/16
摘要： A power control device for performing switching control for an output voltage of a power supply device includes a signal generation circuit for comparing a difference between a value of the output voltage and a value of a first reference voltage with a value of a second reference voltage, and for stopping the switching control when a value of the difference is less than or equal to the value of the second reference voltage, and an adjuster circuit for adjusting the second reference voltage based on a ratio between a value of an input voltage and the value of the output voltage.
摘要翻译：用于对电源装置的输出电压执行开关控制的功率控制装置包括信号产生电路，用于将输出电压的值和第一参考电压的值与第二参考电压的值进行比较，并且当所述差的值小于或等于所述第二参考电压的值时停止所述开关控制;以及调节器电路，用于基于输入电压的值和所述值之间的比率来调整所述第二参考电压的输出电压。

7. 发明授权

US07081792B2 Operational amplifier, line driver, and liquid crystal display device 失效
标题翻译：运算放大器，线路驱动器和液晶显示器件
公开(公告)号：US07081792B2
公开(公告)日：2006-07-25
申请号：US10811431
申请日：2004-03-29
申请人： Toshihiko Kasai , Shinya Udo , Masatoshi Kokubun , Yoshihiro Kizaki
发明人： Toshihiko Kasai , Shinya Udo , Masatoshi Kokubun , Yoshihiro Kizaki
IPC分类号： H03F1/02
CPC分类号： H03F3/45753 , G09G3/3688
摘要： An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
摘要翻译：提供能够在较短时间内抵消抵消的运算放大器以及能够缩短一个水平周期的线路驱动器和液晶显示装置。在本发明的运算放大器中，通过将一个水平周期的一个水平周期H 1的输出电压VO定义为偏移消除中的基准电压的结构，可以缩短反馈控制所需的时间准备期间HC 2，从而仅通过反馈控制将偏置电压VO（2）改变输出电压VO（2）。在本发明的线驱动器中，未用于显示数据D 1至D 6的输出的运算放大器进行偏移消除操作，并且在每一个水平周期上依次移位。由于不需要在偏移消除准备期间中包含输出期间，所以可以进一步缩短一个水平周期。

8. 发明授权

US07336124B2 Operational amplifier, line driver, and liquid crystal display device 有权
标题翻译：运算放大器，线路驱动器和液晶显示器件
公开(公告)号：US07336124B2
公开(公告)日：2008-02-26
申请号：US11448669
申请日：2006-06-08
申请人： Toshihiko Kasai , Shinya Udo , Masatoshi Kokubun , Yoshihiro Kizaki
发明人： Toshihiko Kasai , Shinya Udo , Masatoshi Kokubun , Yoshihiro Kizaki
IPC分类号： H03F1/02
CPC分类号： H03F3/45753 , G09G3/3688
摘要： An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period H1 which is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC2, thereby changing the output voltage VO(2) only by the offset voltage VO(2) by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data D1 to D6 conducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.
摘要翻译：提供能够在较短时间内抵消抵消的运算放大器以及能够缩短一个水平周期的线路驱动器和液晶显示装置。在本发明的运算放大器中，通过将一个水平周期的一个水平周期H 1的输出电压VO定义为偏移消除中的基准电压的结构，可以缩短反馈控制所需的时间准备期间HC 2，从而仅通过反馈控制将偏置电压VO（2）改变输出电压VO（2）。在本发明的线驱动器中，未用于显示数据D 1至D 6的输出的运算放大器进行偏移消除操作，并且在每一个水平周期上依次移位。由于不需要在偏移消除准备期间中包含输出期间，所以可以进一步缩短一个水平周期。

9. 发明申请

US20050282677A1 Differential 审中-公开
标题翻译：微分
公开(公告)号：US20050282677A1
公开(公告)日：2005-12-22
申请号：US11214166
申请日：2005-08-29
申请人： Masahiro Saito , Kunihiro Osawa , Toshihiko Kasai
发明人： Masahiro Saito , Kunihiro Osawa , Toshihiko Kasai
IPC分类号： F16H48/08 , F16H48/20 , F16H48/38 , F16H48/40 , F16H57/04 , F16H48/06
CPC分类号： F16H57/0483 , F16H48/08 , F16H48/40 , F16H57/0482 , F16H2048/085 , F16H2048/387
摘要： A differential capable of satisfying a demand for an improvement in performance and a reduction in cost in which the pinion shaft 19 is movably disposed in the differential case 2, and sliding bearings 16, 41, 42 are disposed between mutually opposite surfaces of the pair of side gears 13 and the differential case 2 and between mutually opposite surfaces of the pinions 12 and the differential case 2, respectively.
摘要翻译：能够满足对性能的提高的需求的差速器和小齿轮轴19可移动地设置在差速器壳体2中的成本降低，并且滑动轴承16,41,42设置在该对的相互相对的表面之间侧齿轮13和差速器壳体2以及小齿轮12和差速器壳体2的相互相对的表面之间。

10. 发明授权

US07443147B2 DC-DC converter with step-up and step-down control capable of varying the offset voltage of the PWM triangle 有权
标题翻译：具有升压和降压控制的DC-DC转换器，能够改变PWM三角形的偏移电压
公开(公告)号：US07443147B2
公开(公告)日：2008-10-28
申请号：US11131245
申请日：2005-05-18
申请人： Toshihiko Kasai , Yoshihiro Kizaki , Hidenobu Ito
发明人： Toshihiko Kasai , Yoshihiro Kizaki , Hidenobu Ito
IPC分类号： G05F1/618 , G05F1/62 , H03K7/08
CPC分类号： H02M3/1582 , H02M2001/0025
摘要： When both step-up PWM control and step-down PWM controls are executed, the offset of the ON/OFF switching timing for step-up PWM control and/or the offset of ON/OFF switching timing for step-down PWM control are changed to become identical. By synchronizing ON/OFF switching timing for step-up PWM control and ON/OFF switching timing for step-down PWM control, the loss on switching can be reduced.
摘要翻译：当执行升压PWM控制和降压PWM控制时，升压PWM控制的ON / OFF开关定时偏移量和/或降压PWM控制的ON / OFF开关时序偏移量都会发生变化变得相同。通过同步升压PWM控制的ON / OFF开关定时和降压PWM控制的ON / OFF切换定时，可以减少开关损耗。

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