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1. 发明申请

US20130335937A1 INTEGRATED CIRCUIT PACKAGING FOR IMPLANTABLE MEDICAL DEVICES 有权
标题翻译：用于可植入医疗器械的集成电路包装
公开(公告)号：US20130335937A1
公开(公告)日：2013-12-19
申请号：US13524368
申请日：2012-06-15
申请人： Mohsen Askarinya , Mark R. Boone , Andreas A. Fenner , Lejun Wang , Kenneth Heames
发明人： Mohsen Askarinya , Mark R. Boone , Andreas A. Fenner , Lejun Wang , Kenneth Heames
IPC分类号： H05K1/18
CPC分类号： H01L25/00 , A61N1/3758 , A61N1/3968 , H01F27/2804 , H01F2027/2819 , H01L23/647 , H01L25/16 , H01L2924/0002 , H01L2924/00
摘要： A hybrid integrated circuit in a wafer level package for an implantable medical device includes one or more passive component windings formed, at least in part, along one or more routing layers of the package. The windings may be primary and secondary windings of a transformer, wherein all or part of a magnetic core thereof is embedded in a component layer of the wafer level package. If the core includes a part bonded to a surface of the package, that part of the core may be E-shaped with legs extending into the routing layers, and, in some cases, through the routing layers. Routing layers may be formed on both sides of the component layer to accommodate the transformer windings, in some instances.
摘要翻译：用于可植入医疗器件的晶片级封装中的混合集成电路包括至少部分地沿着封装的一个或多个布线层形成的一个或多个无源元件绕组。绕组可以是变压器的初级和次级绕组，其中全部或部分磁芯嵌入在晶片级封装的组件层中。如果芯包括结合到包装表面的部分，那么芯部的该部分可以是E形的，其中腿部延伸到路线层中，并且在一些情况下，可以通过路由层。在某些情况下，路由层可以形成在组件层的两侧以容纳变压器绕组。

2. 发明授权

US08824161B2 Integrated circuit packaging for implantable medical devices 有权
标题翻译：用于可植入医疗器械的集成电路封装
公开(公告)号：US08824161B2
公开(公告)日：2014-09-02
申请号：US13524368
申请日：2012-06-15
申请人： Mohsen Askarinya , Mark R. Boone , Andreas A. Fenner , Lejun Wang , Kenneth Heames
发明人： Mohsen Askarinya , Mark R. Boone , Andreas A. Fenner , Lejun Wang , Kenneth Heames
IPC分类号： H05K7/00
CPC分类号： H01L25/00 , A61N1/3758 , A61N1/3968 , H01F27/2804 , H01F2027/2819 , H01L23/647 , H01L25/16 , H01L2924/0002 , H01L2924/00
摘要： A hybrid integrated circuit in a wafer level package for an implantable medical device includes one or more passive component windings formed, at least in part, along one or more routing layers of the package. The windings may be primary and secondary windings of a transformer, wherein all or part of a magnetic core thereof is embedded in a component layer of the wafer level package. If the core includes a part bonded to a surface of the package, that part of the core may be E-shaped with legs extending into the routing layers, and, in some cases, through the routing layers. Routing layers may be formed on both sides of the component layer to accommodate the transformer windings, in some instances.
摘要翻译：用于可植入医疗器件的晶片级封装中的混合集成电路包括至少部分地沿着封装的一个或多个布线层形成的一个或多个无源元件绕组。绕组可以是变压器的初级和次级绕组，其中全部或部分磁芯嵌入在晶片级封装的组件层中。如果芯包括结合到包装表面的部分，那么芯部的该部分可以是E形的，其中腿部延伸到路线层中，并且在一些情况下，可以通过路由层。在某些情况下，路由层可以形成在组件层的两侧以容纳变压器绕组。

3. 发明授权

US07167074B2 Integrated planar flyback transformer 有权
标题翻译：集成平面反激式变压器
公开(公告)号：US07167074B2
公开(公告)日：2007-01-23
申请号：US11034323
申请日：2005-01-12
申请人： Andreas A. Fenner , John V. Anderson, II , Mohsen Askarinya , Tina F. Abnoosi
发明人： Andreas A. Fenner , John V. Anderson, II , Mohsen Askarinya , Tina F. Abnoosi
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , A61N1/3956 , H01F2027/2819
摘要： Method and apparatus are provided for fabricating a planar transformer assembly for use in an implantable medical device. The planar transformer assembly includes a board, a first core, and a second core. The board has a first side, a second side, and an embedded winding, wherein the embedded winding includes a primary winding and a secondary winding and is at least partially embedded in the board between the first and second sides.
摘要翻译：提供了用于制造用于可植入医疗装置的平面变压器组件的方法和装置。平面变压器组件包括板，第一芯和第二芯。该板具有第一面，第二面和嵌入式绕组，其中嵌入式绕组包括初级绕组和次级绕组，并且至少部分地嵌入在第一和第二侧之间的板中。

4. 发明授权

US09252415B2 Power sources suitable for use in implantable medical devices and corresponding fabrication methods 有权
标题翻译：适用于植入医疗器械的电源和相应的制造方法
公开(公告)号：US09252415B2
公开(公告)日：2016-02-02
申请号：US13524304
申请日：2012-06-15
申请人： Mohsen Askarinya , Andreas A. Fenner , Erik J. Herrmann , David A. Ruben , John K. Day
发明人： Mohsen Askarinya , Andreas A. Fenner , Erik J. Herrmann , David A. Ruben , John K. Day
IPC分类号： H01M2/10 , H01M2/20 , H01M2/24 , H01M2/26 , H01M10/0562 , H01M10/0585 , H01M10/647 , H01M6/40 , H01M6/46 , H01M2/22 , H01M10/04 , H01M10/0525 , A61N1/378 , A61N1/375
CPC分类号： H01M2/204 , A61N1/3758 , A61N1/378 , H01M2/1066 , H01M2/202 , H01M2/22 , H01M2/24 , H01M2/266 , H01M6/40 , H01M6/46 , H01M10/0436 , H01M10/0525 , H01M10/0562 , H01M10/0585 , H01M10/647 , Y02E60/122 , Y10T29/49112
摘要： Arrays of planar solid state batteries are stacked in an aligned arrangement for subsequent separation into individual battery stacks. Prior to stacking, a redistribution layer (RDL) is formed over a surface of each wafer that contains an array; each RDL includes first and second groups of conductive traces, each of the first extending laterally from a corresponding positive battery contact, and each of the second extending laterally from a corresponding negative battery contact. Conductive vias, formed before or after stacking, ultimately couple together corresponding contacts of aligned batteries. If before, each via extends through a corresponding battery contact of each wafer and is coupled to a corresponding conductive layer that is included in another RDL formed over an opposite surface of each wafer. If after, each via extends through corresponding aligned conductive traces and, upon separation of individual battery stacks, becomes an exposed conductive channel of a corresponding battery stack.
摘要翻译：平面固态电池的阵列以对准的布置堆叠，以便随后分离成单独的电池堆叠。在堆叠之前，在包含阵列的每个晶片的表面上形成重分布层（RDL）; 每个RDL包括第一和第二组导电迹线，每个导体迹线首先从对应的正电池触点横向延伸，并且每个第二组从相应的负电池触点横向延伸。在堆叠之前或之后形成的导电通孔最终将对准的电池的相应触点耦合在一起。如果之前，每个通孔延伸穿过每个晶片的对应的电池触点并且耦合到相应的导电层，该导电层被包括在形成于每个晶片的相对表面上的另一个RDL中。如果之后，每个通孔延伸通过对应的对准的导电迹线，并且在单独的电池堆分离时，成为相应电池堆的暴露的导电通道。

5. 发明申请

US20130337313A1 POWER SOURCES SUITABLE FOR USE IN IMPLANTABLE MEDICAL DEVICES AND CORRESPONDING FABRICATION METHODS 有权
标题翻译：适用于可植入医疗器械和相关制造方法的电源
公开(公告)号：US20130337313A1
公开(公告)日：2013-12-19
申请号：US13524304
申请日：2012-06-15
申请人： Mohsen Askarinya , Andreas A. Fenner , Erik J. Herrmann , David A. Ruben , John K. Day
发明人： Mohsen Askarinya , Andreas A. Fenner , Erik J. Herrmann , David A. Ruben , John K. Day
IPC分类号： H01M2/22 , H01M10/04
CPC分类号： H01M2/204 , A61N1/3758 , A61N1/378 , H01M2/1066 , H01M2/202 , H01M2/22 , H01M2/24 , H01M2/266 , H01M6/40 , H01M6/46 , H01M10/0436 , H01M10/0525 , H01M10/0562 , H01M10/0585 , H01M10/647 , Y02E60/122 , Y10T29/49112
摘要： Arrays of planar solid state batteries are stacked in an aligned arrangement for subsequent separation into individual battery stacks. Prior to stacking, a redistribution layer (RDL) is formed over a surface of each wafer that contains an array; each RDL includes first and second groups of conductive traces, each of the first extending laterally from a corresponding positive battery contact, and each of the second extending laterally from a corresponding negative battery contact. Conductive vias, formed before or after stacking, ultimately couple together corresponding contacts of aligned batteries. If before, each via extends through a corresponding battery contact of each wafer and is coupled to a corresponding conductive layer that is included in another RDL formed over an opposite surface of each wafer. If after, each via extends through corresponding aligned conductive traces and, upon separation of individual battery stacks, becomes an exposed conductive channel of a corresponding battery stack.
摘要翻译：平面固态电池的阵列以对准的布置堆叠，以便随后分离成单独的电池堆叠。在堆叠之前，在包含阵列的每个晶片的表面上形成重分布层（RDL）; 每个RDL包括第一和第二组导电迹线，每个导体迹线首先从对应的正电池触点横向延伸，并且每个第二组从相应的负电池触点横向延伸。在堆叠之前或之后形成的导电通孔最终将对准的电池的相应触点耦合在一起。如果之前，每个通孔延伸穿过每个晶片的对应的电池触点并且耦合到相应的导电层，该导电层被包括在形成于每个晶片的相对表面上的另一个RDL中。如果之后，每个通孔延伸通过对应的对准的导电迹线，并且在单独的电池堆分离时，成为相应电池堆的暴露的导电通道。

6. 发明授权

US06836022B2 High voltage flip-chip component package and method for forming the same 有权
标题翻译：高压倒装芯片封装及其形成方法
公开(公告)号：US06836022B2
公开(公告)日：2004-12-28
申请号：US10365765
申请日：2003-02-13
申请人： Mark R. Boone , Andreas A. Fenner , Juan G. Milla , Lary R. Larson
发明人： Mark R. Boone , Andreas A. Fenner , Juan G. Milla , Lary R. Larson
IPC分类号： H01L2348
CPC分类号： H01L23/552 , H01L21/563 , H01L23/585 , H01L29/0619 , H01L2224/16 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/1301 , H01L2924/1305 , H01L2924/13091 , H01L2924/3025 , H01L2924/00 , H01L2224/0401
摘要： A flip-chip package comprises a substrate having at least one layer and a component flip-chip mounted to the substrate, the component having a field termination ring. The flip-chip package further comprises a shield plane interposed between the at least one layer of substrate and the field termination ring.
摘要翻译：倒装芯片封装包括具有至少一个层的衬底和安装到衬底的部件倒装芯片，该部件具有场终端环。倒装芯片封装还包括插入在至少一层衬底和场终端环之间的屏蔽平面。

7. 发明授权

US6052623A Feedthrough assembly for implantable medical devices and methods for providing same 有权
标题翻译：用于可植入医疗器械的馈通组件及其提供方法
公开(公告)号：US6052623A
公开(公告)日：2000-04-18
申请号：US201059
申请日：1998-11-30
申请人： Andreas A. Fenner , Lary R. Larson , Daniel R. Greeninger , David L. Thompson
发明人： Andreas A. Fenner , Lary R. Larson , Daniel R. Greeninger , David L. Thompson
IPC分类号： A61N1/375
CPC分类号： A61N1/3754
摘要： A feedthrough assembly for an implantable medical device includes one or more electrically conductive pins extending through apertures in a case of the medical device with the electrically conductive pins being insulated from the case. The feedthrough assembly further includes a printed circuit board having a diode protection circuit mounted thereon. The printed circuit board forms at least a part of electrically conductive paths for connection of the electrically conductive pins to a medical device circuit assembly mounted within the case. The printed circuit board further provides for electrical connection of the diode protection circuit mounted thereon between the electrically conductive pins and the case.
摘要翻译：用于可植入医疗装置的馈通组件包括在医疗装置的壳体中延伸穿过孔的一个或多个导电销，其中导电销与壳体绝缘。馈通组件还包括其上安装有二极管保护电路的印刷电路板。印刷电路板形成用于将导电针连接到安装在壳体内的医疗装置电路组件的导电路径的至少一部分。印刷电路板还提供安装在其上的二极管保护电路在导电引脚和外壳之间的电连接。

8. 发明授权

US06707065B2 Method and apparatus for wafer-level burn-in and testing of integrated circuits 失效
公开(公告)号：US06707065B2
公开(公告)日：2004-03-16
申请号：US10243264
申请日：2002-09-16
申请人： Andreas A. Fenner , David L. Thompson
发明人： Andreas A. Fenner , David L. Thompson
IPC分类号： H01L2358
CPC分类号： G01R31/2831 , G01R31/316
摘要： In one embodiment, a testing regimen is implemented to reduce test time. Specifically, a structure and method to power up and stabilize all die on the wafer prior to testing each die is implemented. More specifically, parallel powering schemes including die stabilization procedures are used to ready the wafer for testing. A wafer probe tester is indexed from one die to the next for an uninterrupted testing of all die in the wafer subsequent to all die power up and stabilization.

9. 发明授权

US07142921B2 Single axis accelerometer and method therefore 有权
标题翻译：单轴加速度计和方法因此
公开(公告)号：US07142921B2
公开(公告)日：2006-11-28
申请号：US10732990
申请日：2003-12-11
申请人： Michael F. Mattes , Ralph B. Danzl , Andreas A. Fenner , Lary R. Larson
发明人： Michael F. Mattes , Ralph B. Danzl , Andreas A. Fenner , Lary R. Larson
IPC分类号： A61N1/362
CPC分类号： G01P15/125 , A61N1/36542 , G01P15/0802 , G01P2015/0828
摘要： Methods and apparatus are provided for an accelerometer. The apparatus includes first, second, and third substrates. The first substrate includes the first plate of a first capacitor. The second substrate includes a moveable mass that is coupled to the second substrate by at least one spring. The moveable mass is the second plate of the first capacitor and the first plate of a second capacitor. The third substrate includes the second plate of the second capacitor. The moveable mass is prevented from moving in any direction where the at least one spring is inelastically flexed. The first substrate couples to the second substrate. The third substrate couples to the second substrate. The method includes forming a moveable mass in a substrate. The moveable mass is formed having a plurality of springs coupling the moveable mass to the substrate. The moveable mass is released using a dry etch.
摘要翻译：为加速度计提供了方法和装置。该装置包括第一，第二和第三基板。第一基板包括第一电容器的第一板。第二基板包括通过至少一个弹簧联接到第二基板的可移动质量块。可移动质量是第一电容器的第二板和第二电容器的第一板。第三基板包括第二电容器的第二板。防止可移动质量块在至少一个弹簧非弹性弯曲的任何方向上移动。第一衬底耦合到第二衬底。第三衬底耦合到第二衬底。该方法包括在基板中形成可移动质量块。可移动质量体形成有多个弹簧，将弹性体联接到基底上。使用干蚀刻释放可移动质量。

10. 发明授权

US06627917B1 Method and apparatus for wafer-level burn-in 失效
标题翻译：晶圆级老化的方法和装置
公开(公告)号：US06627917B1
公开(公告)日：2003-09-30
申请号：US09557508
申请日：2000-04-25
申请人： Andreas A. Fenner , Lary R. Larson , Paul F. Gerrish , Daniel E. Fulton , James W. Bell , James Thomas May
发明人： Andreas A. Fenner , Lary R. Larson , Paul F. Gerrish , Daniel E. Fulton , James W. Bell , James Thomas May
IPC分类号： H01L2358
CPC分类号： G01R31/2831 , G01R31/316
摘要： Methods and apparatus for burn-in of integrated circuit (IC) dies at the wafer level. In one embodiment, a wafer is fabricated having an array of dies formed thereon wherein the dies are separated by scribe areas. Surrounding each die is one or more ring conductors which are electrically coupled to various circuits on the die via die bond pads. The wafer further includes a series of conductive pads located in an inactive region of the wafer. Electrically connecting the conductive pads to the ring conductors is a series of redundant scribe conductors. During burn-in, a burn-in indicating apparatus located on each die monitors burn-in parameters such as elapsed burn-in time. The indicating apparatus further records the elapsed burn-in time (or other parameter). The indicating apparatus may be subsequently interrogated to verify the burn-in time.
摘要翻译：集成电路（IC）老化的方法和设备在晶圆级处死。在一个实施例中，制造具有在其上形成的模具阵列的晶片，其中模具由划线区域分开。每个管芯周围是一个或多个环形导体，其通过管芯接合焊盘电耦合到管芯上的各种电路。晶片还包括位于晶片的无效区域中的一系列导电焊盘。将导电焊盘电连接到环形导体是一系列冗余划线导体。在老化期间，位于每个管芯上的老化指示装置会监视老化参数，例如经过的老化时间。指示装置还记录经过的老化时间（或其他参数）。随后询问指示装置以验证老化时间。

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