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    • 3. 发明授权
    • Noncontact IC card
    • 非接触式IC卡
    • US06036100A
    • 2000-03-14
    • US946700
    • 1997-10-08
    • Kazuo Asami
    • Kazuo Asami
    • G06K17/00G06K19/07
    • G06K19/0723
    • A noncontact IC which transmits and receives data to and from a host computer using RF signals has a buffer for storing received data temporarily and a control circuit for controlling operation of the buffer main memory thereof, wherein the control circuit starts processing data stored in the buffer only when no further data is input after a predetermined data receiving time period has elapsed from the latest data input to the buffer.
    • 使用RF信号向主计算机发送数据和从主计算机接收数据的非接触IC具有临时存储接收数据的缓冲器和用于控制其缓冲器主存储器的操作的控制电路,其中控制电路开始处理存储在缓冲器中的数据 只有在从输入到缓冲器的最新数据经过预定数据接收时间段之后没有输入进一步的数据。
    • 4. 发明授权
    • Video distribution device, video distribution system, and video distribution method
    • 视频分配设备,视频分配系统和视频分配方式
    • US08572670B2
    • 2013-10-29
    • US12866827
    • 2009-02-18
    • Kazuo Asami
    • Kazuo Asami
    • H04N7/173H04N7/12H04N5/935H04N7/24
    • H04N5/783H04N21/234327H04N21/6587
    • To provide a video distribution device which can realize a smooth change of reproduction speed without increasing a data transfer rate from the time of a normal reproduction and decrease a decoding load even when the reproduction speed is changed.The video distribution device which distributes a video content composed of a basic signal and one or more extended signals that are hierarchically configured includes content read-out means for reading out the basic signal and the extended signal in the video content at mutually independent bit rates and reproduction speed change means for changing a content reproduction speed by specifying a read-out bit rate for each signal to the content read-out means.
    • 为了提供一种可以实现再现速度的平滑变化而不增加从正常再现时的数据传输速率并且即使当再现速度改变时也降低解码负载的视频分配设备。 分配由基本信号和分层配置的一个或多个扩展信号组成的视频内容的视频分发设备包括用于以相互独立的比特率读出视频内容中的基本信号和扩展信号的内容读出装置,以及 再现速度改变装置,用于通过向内容读出装置指定每个信号的读出比特率来改变内容再现速度。
    • 6. 发明授权
    • IC card having a monitor timer and a reset signal discrimination circuit
    • IC卡具有监视定时器和复位信号鉴别电路
    • US5247163A
    • 1993-09-21
    • US920518
    • 1992-07-28
    • Hisashi OhnoKazuo Asami
    • Hisashi OhnoKazuo Asami
    • G06F1/24G06K19/07
    • G06K19/07G06F1/24
    • An IC card includes a CPU for processing data, a data receiving circuit for receiving data and inputting the data to the CPU, a data transmitting circuit for transmitting data from the CPU, a reset receiving device for receiving an external reset signal, a monitor timer for generating a timer reset signal when there is no response after a prescribed time has elapsed following receipt of data by the data receiving circuit, and a discrimination circuit for determining which of the external reset signal or a timer reset signal from the monitor timer has been received, holding the determination, and resetting the CPU in response to a reset signal.
    • IC卡包括用于处理数据的CPU,用于接收数据并将数据输入到CPU的数据接收电路,用于从CPU发送数据的数据发送电路,用于接收外部复位信号的复位接收装置,监视定时器 用于当在数据接收电路接收数据之后经过规定时间之后没有响应时产生定时器复位信号;以及判别电路,用于确定来自监视定时器的外部复位信号或定时器复位信号中的哪一个已经被 接收,保持确定,并且响应于复位信号重置CPU。
    • 9. 发明授权
    • Memory-unit sense amplifier
    • 存储单元读出放大器
    • US5438547A
    • 1995-08-01
    • US283506
    • 1994-08-01
    • Kazuo Asami
    • Kazuo Asami
    • G11C11/419G11C7/06G11C11/407G11C11/409G11C16/06G11C16/26G11C17/00
    • G11C7/067G11C16/26
    • In a memory unit having a sense amplifier for reading data, the dependence of the memory cell current detection level of the sense amplifier on the power source voltage is restrained. A memory-unit sense amplifier includes a bias circuit (20, 21, 22) for generating an output which mitigates fluctuations in the power source voltage VDD; and a detection result output section (10, 15) which outputs a memory cell current detection result obtained for the purpose of obtaining the value of memory cell data and which has a Pch (P-channel transistor), to the gate of which the output of the bias circuit (20, 21, 22) is connected, whereby fluctuations in the source/gate voltage of the Pch 10 are mitigated so as to restrain the dependence of the memory cell current detection level on the power source voltage.
    • 在具有用于读取数据的读出放大器的存储器单元中,抑制了读出放大器的存储单元电流检测电平对电源电压的依赖性。 存储器单元读出放大器包括用于产生减小电源电压VDD波动的输出的偏置电路(20,21,22) 以及检测结果输出部(10,15),其输出为了获得存储单元数据的值而获得的具有Pch(P沟道晶体管)的存储单元电流检测结果,所述检测结果输出部向所述输出端 连接偏置电路(20,21,22),从而减小Pch10的源极/栅极电压的波动,以便抑制存储单元电流检测电平对电源电压的依赖性。