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1. 发明专利

JP2012019425A Radio communication system, and transmission device and reception device 审中-公开
标题翻译：无线电通信系统和传输设备和接收设备
公开(公告)号：JP2012019425A
公开(公告)日：2012-01-26
申请号：JP2010156389
申请日：2010-07-09
申请人： Mitsubishi Electric Corp , Tohoku Univ , 三菱電機株式会社 , 国立大学法人東北大学
发明人： TANIGUCHI EIJI , HIRANO YOSHIHITO , SHIMOZAWA MITSUHIRO , TAKAGI SUNAO , KAMEDA TAKU , SUEMATSU KENJI , TSUBOUCHI KAZUO
IPC分类号： H04J1/00 , H04B7/12 , H04J11/00 , H04W28/18
摘要： PROBLEM TO BE SOLVED: To provide a radio communication system which communicates adaptively in an optimal radio mode depending on a propagation path state.SOLUTION: A radio communication system comprises: a transmission device 1 which switches multiple radio modes; and a reception device 2 which receives multiple radio modes simultaneously. The transmission device 1 comprises: a transmission circuit 5; and a switching control circuit 6. The transmission circuit 5 includes a data modulation circuit 39 which converts a transmission signal 102 of a data sequence into a transmission signal 103 of a symbol sequence, a plurality of modulation circuits 3a-3k corresponding to respective radio modes, and a switching circuit 4 which selects a modulation circuit. The reception device 2 comprises a reception circuit 8 and a propagation path estimation evaluation circuit 9. The reception circuit 8 includes a plurality of demodulation circuits 7a-7k corresponding to respective radio modes, and a plurality of data demodulation circuits 40a-40k. The switching control circuit 6 controls the switching circuit 4 to switch radio modes of a transmission signal based on control information 106 from the propagation path estimation evaluation circuit 9.
摘要翻译：要解决的问题：提供一种根据传播路径状态以最佳无线电模式自适应地进行通信的无线电通信系统。解决方案：无线电通信系统包括：切换多种无线电模式的传输设备1; 以及同时接收多个无线模式的接收装置2。发送装置1包括：发送电路5; 发送电路5包括将数据序列的发送信号102转换为符号序列的发送信号103的数据调制电路39，与各个无线模式对应的多个调制电路3a〜3k 以及选择调制电路的切换电路4。接收装置2包括接收电路8和传播路径估计评估电路9.接收电路8包括与各个无线电模式对应的多个解调电路7a-7k和多个数据解调电路40a-40k。切换控制电路6控制切换电路4，根据来自传播路径估计评估电路9的控制信息106切换发送信号的无线模式。（C）2012，JPO＆INPIT

2. 发明专利

JP2009194722A Communication device 有权
标题翻译：通信设备
公开(公告)号：JP2009194722A
公开(公告)日：2009-08-27
申请号：JP2008034763
申请日：2008-02-15
申请人： Mitsubishi Electric Corp , Tohoku Univ , 三菱電機株式会社 , 国立大学法人東北大学
发明人： NAKASE HIROYUKI , GHEORGHIU VALENTIN , KAMEDA TAKU , TAKAGI SUNAO , TSUBOUCHI KAZUO , ADACHI FUMIYUKI , MIYAZAKI MORIYASU
IPC分类号： H04B7/005 , H04B1/16 , H04B3/06
摘要： PROBLEM TO BE SOLVED: To obtain a communication device capable of obtaining excellent characteristics by correcting device distortion and propagation distortion.
SOLUTION: The communication device for reception includes: a high frequency demodulation circuit 2 for converting a received signal into a baseband signal; an analog/digital conversion circuit 3 for converting the baseband signal converted by the high frequency demodulation circuit into a digital signal; and a baseband demodulation circuit 5 which demodulates the baseband signal from the digital signal converted by the analog/digital conversion circuit and outputs the demodulated baseband signal, wherein, between the analog/digital conversion circuit 3 and the baseband demodulation circuit 5, a frequency equalization circuit 4 for reception is provided which corrects device distortion and propagation distortion.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了获得能够通过校正装置失真和传播失真而获得优异特性的通信装置。解决方案：用于接收的通信装置包括：用于将接收信号转换为基带信号的高频解调电路2; 用于将由高频解调电路转换的基带信号转换为数字信号的模拟/数字转换电路3; 基带解调电路5，对来自模拟/数字转换电路的数字信号进行基带信号的解调，并输出解调后的基带信号，在模/数转换电路3与基带解调电路5之间，进行频率均衡提供用于接收的电路4，其校正设备失真和传播失真。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2007295257A Noise power calculation means and s/n estimation means 审中-公开
标题翻译：噪声功率计算方法和S / N估计方法
公开(公告)号：JP2007295257A
公开(公告)日：2007-11-08
申请号：JP2006120648
申请日：2006-04-25
申请人： Mitsubishi Electric Corp , Tohoku Univ , 三菱電機株式会社 , 国立大学法人東北大学
发明人： FUJIMURA AKINORI , TAKAGI SUNAO , NAKASE HIROYUKI , NAGAI YUKIMASA , SOGABE YASUSHI , TSUBOUCHI KAZUO
IPC分类号： H04J11/00
摘要： PROBLEM TO BE SOLVED: To obtain a power noise calculation means which is capable of calculating a noise power N by simpler operations, while keeping the equivalent performance level as that of the conventional means. SOLUTION: A noise power calculation means 30 which calculates the noise power of a receiving signal, on the basis of the receiving signal, having a frame configuration including K fixed patterns (K is an integer equal to or larger than 2) each of which being constituted of a data sequence of J samples (J is an integer equal to or larger than 1), includes a subtraction means 11, which outputs a result of subtraction between data of n-th samples (n is an integer equal to or larger than 1 and equal to or smaller than J) of two fixed patterns from among K fixed patterns, as difference data; an L-th power means which outputs a result, obtaining by raising the difference data to the L-th power (L is an integer equal to or larger than 2), as difference power data; and an integration means 13 which outputs an integration result, obtained by accumulating difference power data with respect to J samples, as the noise power. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了获得能够通过更简单的操作来计算噪声功率N的功率噪声计算装置，同时保持与常规装置相同的性能水平。解决方案：噪声功率计算装置30，其基于接收信号计算接收信号的噪声功率，该接收信号具有包括K个固定模式（K是等于或大于2的整数）的帧配置其由J个采样的数据序列（J是1以上的整数）构成，包括：减法装置11，输出第n个采样的数据之间的减法结果（n为等于或大于1且等于或小于J）的两个固定图案作为差分数据; 输出结果的L电力单元，将差分数据提高为L次幂（L为2以上的整数）获得，作为差分功率数据; 以及积分装置13，其输出通过累积关于J个采样的差分功率数据获得的积分结果作为噪声功率。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2006094184A High frequency amplifying device 有权
标题翻译：高频放大器件
公开(公告)号：JP2006094184A
公开(公告)日：2006-04-06
申请号：JP2004277705
申请日：2004-09-24
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： MORI KAZUTOMI , SHINJO SHINTARO , HIEDA MORISHIGE , UEDA HIROTAMI , SUEMATSU KENJI , TAKAGI SUNAO
IPC分类号： H03F3/19 , H03F1/30
摘要： PROBLEM TO BE SOLVED: To provide a high-frequency amplifying device which is capable of making its temperature characteristics low.
SOLUTION: The high-frequency amplifying device is equipped with a resistance dividing circuit 16 feeding a reference current, a current-mirror fixed voltage bias circuit 101 which applies a bias voltage on the basis of the reference current, and a high-frequency amplifier 100 which amplifies high-frequency signals on the basis of the bias voltage. The high-frequency amplifier 100 is equipped with a transistor 4 that amplifies high-frequency signals and is provided with an emitter which is grounded. The fixed voltage bias circuit 101 is equipped with a transistor 9 which applies a bias voltage to the base of the transistor 4, is equipped with an emitter that is grounded, and forms a current mirror. The resistance dividing circuit 16 is inserted between a reference voltage applying terminal 11 and a ground, composed of resistors 14 and 15 connected together in series, and supplies the reference current generated by the reference voltage 11 to the collector of the transistor 9 through the intermediary of a resistor 17 connected to a connection point between the resistors 14 and 15.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供能够使其温度特性低的高频放大装置。解决方案：高频放大装置配备有供给基准电流的电阻分压电路16，基于参考电流施加偏置电压的电流镜固定电压偏置电路101，频率放大器100，其基于偏置电压放大高频信号。高频放大器100配备有放大高频信号的晶体管4，并具有接地的发射极。固定电压偏置电路101配备有向晶体管4的基极施加偏置电压的晶体管9，配备有接地的发射极，并形成电流镜。电阻分割电路16插入到参考电压施加端子11和由串联连接在一起的电阻器14和15组成的地之间，并通过中间电路将参考电压11产生的参考电流提供给晶体管9的集电极连接到电阻器14和15之间的连接点的电阻器17。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2005286617A Delay line 有权
标题翻译：延迟线
公开(公告)号：JP2005286617A
公开(公告)日：2005-10-13
申请号：JP2004096528
申请日：2004-03-29
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NISHINO TAMOTSU , RI SHIYAKU , YOSHIDA YUKIHISA , TAKAGI SUNAO
IPC分类号： H01P9/02 , H03H7/34
摘要： PROBLEM TO BE SOLVED: To provide a delay line of which the cross-sectional dimension is small, passage loss is small, and the amount of phase change is large.
SOLUTION: The delay line is provided with a spiral conductor line which is formed on a substrate and composed of a plurality of coils 10-13, a ground conductor 21 formed on the substrate, a plurality of upper electrodes that are formed on the substrate and respectively connected to the plurality of coils 10-13 of the spiral conductor line, and a plurality of capacitors 22-25 formed between the ground conductors 21.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供横截面尺寸小的通道损耗小，相变量大的延迟线。解决方案：延迟线设置有形成在基板上并由多个线圈10-13，形成在基板上的接地导体21，形成在基板上的多个上电极组成的螺旋导线并且分别连接到螺旋导体线的多个线圈10-13，以及形成在接地导体21之间的多个电容器22-25。（C）2006，JPO＆NCIPI

6. 发明专利

JP2005142955A Power wave detector 有权
标题翻译：功率波检测器
公开(公告)号：JP2005142955A
公开(公告)日：2005-06-02
申请号：JP2003378937
申请日：2003-11-07
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： SHIMOZAWA MITSUHIRO , IIDA AKIO , TAKAGI SUNAO , FUJIWARA HIROSUKE , IMAI YOSHIHIKO , TAKEUCHI NORIO
IPC分类号： H03D1/10
摘要： PROBLEM TO BE SOLVED: To provide a power wave detector which can detect RF signals of a high level without lowering output voltage at a low input power and without raising supply voltage of a differential amplifier.
SOLUTION: The power wave detector comprises an unequal power distribution circuit 18 which distributes an input RF signal at a predetermined power distribution ratio; a wave detecting circuit 14 composed of a diode 3 to which the distributed RF signal is applied at a first power distribution ratio by the power distribution circuit, and a load resistance 7 which is connected to the diode 3 in parallel and generates a first DC voltage; a reference voltage output circuit 15 composed of a diode 4 to which the distributed RF signal is applied at a second power distribution ratio by the power distribution circuit, and a load resistance 8 which is connected to the diode 4 in parallel and generates a second DC voltage; a bias circuit 19 which supplies a bias current to the diodes 3 and 4; and a differential amplifier 13 which inputs the first DC voltage output from the wave detecting circuit 14 and the second DC voltage output from the reference voltage output circuit 15, and outputs difference voltage between these DC voltages.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够在低输入功率下降低输出电压并且不增加差分放大器的电源电压的情况下可以检测高电平的RF信号的功率波检测器。解决方案：功率波检测器包括：不均等的配电电路18，其以预定的功率分配比分配输入RF信号; 一个波形检测电路14，由一个二极管3构成，分配的RF信号以第一功率分配比率由功率分配电路施加到该二极管3，负载电阻7并联连接到二极管3并产生一个第一直流电压 ; 由二极管4构成的参考电压输出电路15，其中分布式RF信号以功率分配电路施加在第二功率分配比上，负载电阻8并联连接到二极管4并产生第二DC 电压; 偏置电路19，其向二极管3和4提供偏置电流; 以及差分放大器13，其输入从波检测电路14输出的第一直流电压和从参考电压输出电路15输出的第二直流电压，并输出这些直流电压之间的差分电压。版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2005020284A Phase-shifter circuit and phase shifter 审中-公开
标题翻译：相变电路和相位变换器
公开(公告)号：JP2005020284A
公开(公告)日：2005-01-20
申请号：JP2003181410
申请日：2003-06-25
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： MIYAGUCHI KENICHI , HIEDA MORISHIGE , ARAI MASATOSHI , TAKAGI SUNAO
IPC分类号： H03H7/20 , H03H11/20
摘要： PROBLEM TO BE SOLVED: To realize a phase shifter circuit and a phase shifter small in size and not easily influenced by the variations in manufacturing.
SOLUTION: The phase shifter circuit comprises the serial circuit of an FET 4 which shows a capacitive property under the OFF state, and an inductor 8 connected in series to this FET4, to connect one terminal of the serial circuit to a high frequency signal input/output terminal 2, and then to connect the other terminal to the ground 9. Moreover, this phase shifter circuit is connected to a 90° hybrid coupler having a high frequency input terminal and a high frequency output terminal to form a phase shifter.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：实现移相器电路和尺寸小且不容易受制造变化影响的移相器。解决方案：移相器电路包括在OFF状态下显示电容性能的FET 4的串联电路和与该FET4串联连接的电感器8，以将串行电路的一个端子连接到高频信号输入/输出端子2，然后将另一个端子连接到地面9.此外，该移相器电路连接到具有高频输入端子和高频输出端子的90°混合耦合器，以形成移相器。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2004253902A Fractional-n type phase locked loop frequency synthesizer 审中-公开
公开(公告)号：JP2004253902A
公开(公告)日：2004-09-09
申请号：JP2003040014
申请日：2003-02-18
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TAJIMA KENICHI , TSURU MASAOMI , NAKANE MASABUMI , MIYAMOTO KAZUHIRO , TAKAGI SUNAO
IPC分类号： H03L7/197 , H03L7/10 , H03L7/183 , H03L7/187
摘要： PROBLEM TO BE SOLVED: To provide an F-PLL synthesizer which employs an analog phase comparator for a phase comparator and stably establishes phase locking at a high speed. SOLUTION: The F-PLL synthesizer includes a converging voltage setting section 21 for outputting a converging voltage signal to a loop filter 4 in order to establish phase locking of an external output oscillation signal in response to a control signal from a PLL control circuit 8. Outputting a DC output voltage V a from the converging voltage setting section 21 can set an oscillated frequency of a voltage-controlled oscillator 5 in a free-running state to the vicinity of a desired output frequency when no phase locking is established. As a result, the oscillated frequency from the voltage-controlled oscillator 5 reaches within a lock-in range of the PLL synthesizer, which stably establishes the phase locking. COPYRIGHT: (C)2004,JPO&NCIPI

9. 发明专利

JP2014192807A Reception device and reception method 有权
标题翻译：接收设备和接收方法
公开(公告)号：JP2014192807A
公开(公告)日：2014-10-06
申请号：JP2013068359
申请日：2013-03-28
申请人： Mitsubishi Electric Corp , 三菱電機株式会社 , Tohoku Univ , 国立大学法人東北大学
发明人： TA TUAN THANH , KAMEDA TAKU , SUEMATSU KENJI , TAKAGI SUNAO , TSUBOUCHI KAZUO , INAGAKI RYUJI , TSURU MASAOMI , TANIGUCHI EIJI
IPC分类号： H04B7/08 , H04L27/22
CPC分类号： Y02D70/00 , Y02D70/442 , Y02D70/444
摘要： PROBLEM TO BE SOLVED: To provide a reception device and a reception method capable of reducing costs, power consumption and signal processing amount.SOLUTION: A reception device comprises: a plurality of LPF 21, installed in association with I channel signals and Q channel signals to be output from a plurality of BB phase shifters 13, for allowing only low frequency components of a predetermined frequency or less to pass; a plurality of low speed ADC 22, respectively connected to the plurality of LPF 21, for converting the I channel signals and the Q channel signals of the low frequency components into digital signals; and a DSP 23 for extracting a phase difference between a plurality of antenna elements from the outputs of the plurality of low speed ADC 22, and for controlling the plurality of BB phase shifters 13 such that the phases of the I channel signals and the Q channel signals to be output from the plurality of BB phase shifters 13 are aligned.
摘要翻译：要解决的问题：提供能够降低成本，功耗和信号处理量的接收装置和接收方法。解决方案：接收装置包括：多个LPF 21，其与I信道信号和Q信道信号相关联地安装从多个BB移相器13输出，仅允许预定频率或更小频率的低频分量通过; 分别连接到多个LPF21的多个低速ADC22，用于将低频分量的I信道信号和Q信道信号转换为数字信号; 以及DSP23，用于从多个低速ADC22的输出中提取多个天线元件之间的相位差，并且用于控制多个BB移相器13，使得I通道信号和Q通道的相位从多个BB移相器13输出的信号被对准。

10. 发明专利

JP2008219081A Balun 有权
标题翻译： BALUN
公开(公告)号：JP2008219081A
公开(公告)日：2008-09-18
申请号：JP2007049366
申请日：2007-02-28
申请人： Mitsubishi Electric Corp , Tohoku Univ , 三菱電機株式会社 , 国立大学法人東北大学
发明人： TSUBOUCHI KAZUO , TAKAGI SUNAO , NAKASE HIROYUKI , KAMEDA TAKU , ISODA YOJI , NAKAJIMA KENSUKE
IPC分类号： H01P5/10 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To reduce size, and improve performance, such as broadband performance. SOLUTION: A first wiring pattern 200 comprises terminals A, C and a first C-shaped line pattern 2 connecting the terminals A, C. A second wiring pattern 300 comprises terminals D, F and a second C-shaped line pattern 3 connecting the terminals D, F. The first and second line patterns 2, 3 are laminated via a planar dielectric 1 so that openings do not overlap while being shifted each other by 180°. The terminals A, C are connected to a first transmission line 4, and the terminals D, F are connected to second and third transmission lines 6, 7, respectively. Nearly the center section of the first line pattern 2 is electrically connected to a ground conductor 5 of the second and third transmission lines 6, 7 by a connection circuit 8. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：减小大小，提高性能，如宽带性能。解决方案：第一布线图案200包括端子A，C和连接端子A，C的第一C形线图案2.第二布线图案300包括端子D，F和第二C形线图案3 连接端子D，F。第一线图案2,3和第二线图案3通过平面电介质1层叠，使得开口不重叠，同时彼此偏移180°。端子A，C连接到第一传输线4，端子D，F分别连接到第二和第三传输线6,7。第一线路图形2的几乎中心部分通过连接电路8电连接到第二和第三传输线6,7的接地导体5.版权所有（C）2008，JPO＆INPIT

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