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    • 6. 发明授权
    • Non-volatile memory with two adjacent memory cells sharing same word line
    • 具有两个相邻存储单元的非易失性存储器共享相同的字线
    • US07139193B2
    • 2006-11-21
    • US10779683
    • 2004-02-18
    • Masahiro Kanai
    • Masahiro Kanai
    • G11C11/34
    • G11C16/0466G11C8/14H01L27/115
    • A nonvolatile semiconductor memory device having a small layout size includes a memory cell array in which a plurality of memory cells are arranged in a row direction and a column direction. The memory cell array includes a plurality of element isolation regions. Each of the memory cells includes a source region, a drain region, a channel region located between the source region and the drain region, a select gate and a word gate disposed to face the channel region, and a nonvolatile memory element formed between the word gate and the channel region. A wordline connection section which connects at least one of a plurality of word gate interconnects in an upper layer with at least one of the word gates is disposed over at least one of the element isolation regions.
    • 具有小布局尺寸的非易失性半导体存储器件包括其中多个存储单元沿行方向和列方向布置的存储单元阵列。 存储单元阵列包括多个元件隔离区域。 每个存储单元包括源极区域,漏极区域,位于源极区域和漏极区域之间的沟道区域,设置为面对沟道区域的选择栅极和字栅极以及形成在该单元之间的非易失性存储元件 门和通道区域。 将上层中的多个字门互连中的至少一个与至少一个字栅连接的字线连接部分设置在元件隔离区域中的至少一个上。