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1. 发明授权

US07307312B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07307312B2
公开(公告)日：2007-12-11
申请号：US10817904
申请日：2004-04-06
申请人： Mikimasa Suzuki , Yoshiyuki Hattori , Kyoko Nakashima
发明人： Mikimasa Suzuki , Yoshiyuki Hattori , Kyoko Nakashima
IPC分类号： H01L21/8238 , H01L29/94
CPC分类号： H01L29/7811 , H01L21/78 , H01L29/0634 , H01L29/0878 , H01L29/7802 , H01L29/7813
摘要： A semiconductor device manufacturing method comprises forming a pn column so that the pn column is designed to have a strip form in the section of the substrate and have a repetitive pattern of a p-conduction type and an n-conduction type on the substrate surface over an area where plural semiconductor devices having the same structure are formed in a semiconductor substrate, forming residual constituent elements of the plural semiconductor devices having the same structure in areas where the repetitive patterns are located while the pn column serves as a part of the constituent element of each semiconductor device, and dicing the individual semiconductor devices into chips from the area where the plural semiconductor devices having the same structure are formed.
摘要翻译：半导体器件制造方法包括形成pn列，使得pn列被设计为在衬底的部分中具有条形，并且在衬底表面上具有p导电型和n导电型的重复图案，在半导体衬底中形成具有相同结构的多个半导体器件的区域，在pn列用作构成元件的一部分的同时，在重复图案所在的区域中形成具有相同结构的多个半导体器件的残留构成元件并且从形成有相同结构的多个半导体器件的区域将各个半导体器件切割成芯片。

2. 发明申请

US20050077572A1 Semiconductor device having periodic construction 审中-公开
标题翻译：具有周期性结构的半导体器件
公开(公告)号：US20050077572A1
公开(公告)日：2005-04-14
申请号：US10960286
申请日：2004-10-08
申请人： Shoichi Yamauchi , Mikimasa Suzuki , Yoshiyuki Hattori , Kyoko Nakashima
发明人： Shoichi Yamauchi , Mikimasa Suzuki , Yoshiyuki Hattori , Kyoko Nakashima
IPC分类号： H01L29/06 , H01L29/40 , H01L29/417 , H01L29/78 , H01L29/49
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/402 , H01L29/41741 , H01L29/7813
摘要： A device includes a center portion, and a periphery portion disposed around the center portion. The periphery portion includes a first semiconductor layer, an intermediate layer, a second semiconductor layer, an insulation layer and an electrode. The intermediate layer includes a periodic construction having a first region and a second region. The center portion includes a contact region. The electrode extends to the periphery portion to have an extension length of the electrode between the contact region and a periphery of the electrode. The extension length of the electrode is equal to or longer than one-eighth of a distance between the contact region and an outer periphery of the periodic construction.
摘要翻译：装置包括中心部分和围绕中心部分设置的周边部分。周边部分包括第一半导体层，中间层，第二半导体层，绝缘层和电极。中间层包括具有第一区域和第二区域的周期性结构。中心部分包括接触区域。电极延伸到周边部分，以使得电极在接触区域和电极周边之间具有延伸长度。电极的延伸长度等于或长于接触区域和周期性构造的外周之间的距离的八分之一。

3. 发明申请

US20050133859A1 Semiconductor device and design-aiding program 失效
标题翻译：半导体器件和设计辅助程序
公开(公告)号：US20050133859A1
公开(公告)日：2005-06-23
申请号：US11012116
申请日：2004-12-16
申请人： Makoto Kuwahara , Yoshiyuki Hattori , Shoichi Yamauchi , Mikimasa Suzuki
发明人： Makoto Kuwahara , Yoshiyuki Hattori , Shoichi Yamauchi , Mikimasa Suzuki
IPC分类号： G06F17/50 , H01L27/02 , H01L29/06 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7813 , G06F17/5068 , H01L29/0634
摘要： A semiconductor device is fabricated to include a withstand-voltage assurance layer designed into a multi-dimensional super junction structure and a group of trench gate electrodes, each of which penetrating a body layer in contact with the multi-dimensional super junction structure to reach the multi-dimensional super junction structure, so that dispersions of an on-resistance of the semiconductor device can be reduced. When a position at which the group of trench gate electrodes is created is shifted in one direction, the size of an overlap area common to the group of trench gate electrodes and an n-type column changes. However, the group of trench gate electrodes is oriented in such a way that the changes in overlap-area size are minimized.
摘要翻译：半导体器件被制造成包括设计成多维超结结构的耐压保证层和一组沟槽栅极电极，每个沟槽栅电极穿透与多维超结结构接触的体层以达到多维超结结构，能够降低半导体装置的导通电阻的分散。当形成沟槽栅电极组的位置在一个方向上移动时，沟槽栅电极组和n型列共同的重叠区域的尺寸改变。然而，沟槽栅电极组被定向成使得重叠区域尺寸的变化最小化。

4. 发明授权

US07345339B2 Vertical channel FET with super junction construction 有权
标题翻译：具有超结结构的垂直沟道FET
公开(公告)号：US07345339B2
公开(公告)日：2008-03-18
申请号：US10872789
申请日：2004-06-22
申请人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
发明人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/1095
摘要： A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to the first part. The trench gate electrode penetrates the body region and reaches the drift region so that the trench gate electrode faces the body region and the drift region through an insulation layer. The trench gate electrode extends in a direction crossing with the extending direction of the first and second parts. The first part includes a portion near the trench gate electrode, which has an impurity concentration equal to or lower than that of the body region.
摘要翻译：半导体器件包括主体区域，具有第一部分和第二部分的漂移区域以及沟槽栅电极。身体区域设置在漂移区域上。第一和第二部分沿延伸方向延伸，使得第二部分与第一部分相邻。沟槽栅电极穿透体区并到达漂移区，使得沟槽栅电极通过绝缘层面向体区和漂移区。沟槽栅电极沿与第一和第二部分的延伸方向交叉的方向延伸。第一部分包括沟槽栅电极附近的部分，其杂质浓度等于或低于体区的杂质浓度。

5. 发明授权

US07364971B2 Method for manufacturing semiconductor device having super junction construction 有权
标题翻译：具有超结构构造的半导体器件的制造方法
公开(公告)号：US07364971B2
公开(公告)日：2008-04-29
申请号：US11356984
申请日：2006-02-21
申请人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
发明人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/1095
摘要： A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to the first part. The trench gate electrode penetrates the body region and reaches the drift region so that the trench gate electrode faces the body region and the drift region through an insulation layer. The trench gate electrode extends in a direction crossing with the extending direction of the first and second parts. The first part includes a portion near the trench gate electrode, which has an impurity concentration equal to or lower than that of the body region.
摘要翻译：半导体器件包括主体区域，具有第一部分和第二部分的漂移区域以及沟槽栅电极。身体区域设置在漂移区域上。第一和第二部分沿延伸方向延伸，使得第二部分与第一部分相邻。沟槽栅电极穿透体区并到达漂移区，使得沟槽栅电极通过绝缘层面向体区和漂移区。沟槽栅电极沿与第一和第二部分的延伸方向交叉的方向延伸。第一部分包括沟槽栅电极附近的部分，其杂质浓度等于或低于体区的杂质浓度。

6. 发明授权

US07342265B2 Vertical-type semiconductor device having repetitive-pattern layer 失效
标题翻译：具有重复图案层的垂直型半导体器件
公开(公告)号：US07342265B2
公开(公告)日：2008-03-11
申请号：US11012116
申请日：2004-12-16
申请人： Makoto Kuwahara , Yoshiyuki Hattori , Shoichi Yamauchi , Mikimasa Suzuki
发明人： Makoto Kuwahara , Yoshiyuki Hattori , Shoichi Yamauchi , Mikimasa Suzuki
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , G06F17/5068 , H01L29/0634
摘要： A semiconductor device is fabricated to include a withstand-voltage assurance layer designed into a multi-dimensional super junction structure and a group of trench gate electrodes, each of which penetrating a body layer in contact with the multi-dimensional super junction structure to reach the multi-dimensional super junction structure, so that dispersions of an on-resistance of the semiconductor device can be reduced. When a position at which the group of trench gate electrodes is created is shifted in one direction, the size of an overlap area common to the group of trench gate electrodes and an n-type column changes. However, the group of trench gate electrodes is oriented in such a way that the changes in overlap-area size are minimized.
摘要翻译：半导体器件被制造成包括设计成多维超结结构的耐压保证层和一组沟槽栅极电极，每个沟槽栅电极穿透与多维超结结构接触的体层以达到多维超结结构，能够降低半导体装置的导通电阻的分散。当形成沟槽栅电极组的位置在一个方向上移动时，沟槽栅电极组和n型列共同的重叠区域的尺寸改变。然而，沟槽栅电极组被定向成使得重叠区域尺寸的变化最小化。

7. 发明申请

US20050006717A1 Semiconductor device having super junction construction and method for manufacturing the same 有权
标题翻译：具有超结结构的半导体器件及其制造方法
公开(公告)号：US20050006717A1
公开(公告)日：2005-01-13
申请号：US10872789
申请日：2004-06-22
申请人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
发明人： Hitoshi Yamaguchi , Mikimasa Suzuki , Yoshiyuki Hattori
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L21/8242
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/1095
摘要： A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to the first part. The trench gate electrode penetrates the body region and reaches the drift region so that the trench gate electrode faces the body region and the drift region through an insulation layer. The trench gate electrode extends in a direction crossing with the extending direction of the first and second parts. The first part includes a portion near the trench gate electrode, which has an impurity concentration equal to or lower than that of the body region.
摘要翻译：半导体器件包括主体区域，具有第一部分和第二部分的漂移区域以及沟槽栅电极。身体区域设置在漂移区域上。第一和第二部分沿延伸方向延伸，使得第二部分与第一部分相邻。沟槽栅电极穿透体区并到达漂移区，使得沟槽栅电极通过绝缘层面向体区和漂移区。沟槽栅电极沿与第一和第二部分的延伸方向交叉的方向延伸。第一部分包括沟槽栅电极附近的部分，其杂质浓度等于或低于体区的杂质浓度。

8. 发明申请

US20090088888A1 COMPONENT MOUNTING METHOD 审中-公开
标题翻译：组件安装方法
公开(公告)号：US20090088888A1
公开(公告)日：2009-04-02
申请号：US11995166
申请日：2006-08-07
申请人： Takeyuki Kawase , Yoshiyuki Hattori
发明人： Takeyuki Kawase , Yoshiyuki Hattori
IPC分类号： G06F19/00 , B23P19/00
CPC分类号： H05K13/0813 , H05K13/0417 , Y10T29/53174
摘要： The component mounter (100) includes a component return determination apparatus (503) being a computer device for determining whether the electronic component picked up by a suction nozzle is a component to be returned to the component supply unit based on a component type. The component return determination apparatus (503) has: a data storage unit (506) into which pick-up position information (506a), the number of remaining components (506b), component return flag information (506c) are stored; a reuse judgment unit (507) which judges whether the electronic component currently picked up by the suction nozzle is the component to be returned to the component supply unit for reuse; and a component return control unit (508) which obtains pick-up position information of the picked-up component from the pick-up position information (506a) stored in the data storage unit (506) and controls an XY robot so that the component is returned to the pick-up position.
摘要翻译：部件安装器（100）包括作为计算机装置的部件返回确定装置（503），用于基于部件类型来确定由吸嘴吸取的电子部件是否要返回到部件供应部件的部件。分量返回确定装置（503）具有：拾取位置信息（506a），剩余分量数（506b），分量返回标志信息（506c）被存储到的数据存储单元（506）判断当前由吸嘴吸取的电子部件是否要返回到部件供给部用于再利用的再生判定部（507）以及从存储在数据存储单元（506）中的拾取位置信息（506a）中获取拾取组件的拾取位置信息的组件返回控制单元（508），并控制XY机器人，使得组件返回到拾取位置。

9. 发明授权

US07353087B2 Collision object discrimination apparatus for vehicles 失效
标题翻译：车辆碰撞对象识别装置
公开(公告)号：US07353087B2
公开(公告)日：2008-04-01
申请号：US10897370
申请日：2004-07-22
申请人： Tetsuya Takafuji , Yoshiyuki Hattori , Shinichi Kiribayashi
发明人： Tetsuya Takafuji , Yoshiyuki Hattori , Shinichi Kiribayashi
IPC分类号： G05D1/00 , G06F17/00
CPC分类号： B60R21/0136 , B60R21/34
摘要： A collision object discrimination apparatus for vehicles includes two collision detection sensors for discriminating kinds of a collision object based on two sensor outputs. The collision object is determined based on a collision width (W) detected by a collision width detection sensor fitted to a vehicle body. Alternatively, the collision object is determined based on a difference between operation characteristics of the two sensors. Further alternatively, the two sensors are integrated into a single unit including a plurality of censor cells.
摘要翻译：用于车辆的碰撞对象识别装置包括用于基于两个传感器输出来识别碰撞对象的种类的两个碰撞检测传感器。基于由安装在车身上的碰撞宽度检测传感器检测到的碰撞宽度（W）来确定碰撞对象。或者，基于两个传感器的操作特性之间的差异来确定碰撞对象。另外，两个传感器集成到包括多个检测单元的单个单元中。

10. 发明申请

US20070238271A1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20070238271A1
公开(公告)日：2007-10-11
申请号：US11806862
申请日：2007-06-05
申请人： Shoichi Yamauchi , Yoshiyuki Hattori , Kyoko Okada
发明人： Shoichi Yamauchi , Yoshiyuki Hattori , Kyoko Okada
IPC分类号： H01L21/20
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/66734 , H01L29/7813
摘要： A semiconductor device having SJ structure has a peripheral region having a higher withstand voltage than the withstand voltage of the cell region. A semiconductor upper layer including second conductivity-type impurities and a semiconductor lower layer including first conductivity-type impurities whose concentration is lower than the first portion region constituting the combination of the cell region are formed in the semiconductor layer of the peripheral region. A field oxide layer is formed on a surface of the semiconductor upper layer.
摘要翻译：具有SJ结构的半导体器件具有比电池区域的耐电压更高的耐受电压的周边区域。在周边区域的半导体层中形成有包含第二导电型杂质的半导体上层和包含第一导电型杂质的半导体下层，该第一导电型杂质的浓度低于构成该单元区域组合的第一部分区域。在半导体上层的表面上形成场氧化物层。

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