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1. 发明授权

US08553826B2 Method and system for multi-point signal generation with phase synchronized local carriers 有权
标题翻译：具有相位同步的本地载波的多点信号生成方法和系统
公开(公告)号：US08553826B2
公开(公告)日：2013-10-08
申请号：US13565557
申请日：2012-08-02
申请人： Mihai Banu , Vladimir Ivanov Prodanov
发明人： Mihai Banu , Vladimir Ivanov Prodanov
IPC分类号： H04L7/00
CPC分类号： H04L7/02 , G06F1/12 , H04B15/02 , H04B2215/067
摘要： A method and system of applying modulated carrier signals to tree networks and processing signals tapped from the tree networks to generate output signals with phase-synchronized carriers are disclosed.
摘要翻译：公开了一种将调制载波信号应用于树形网络并处理从树形网络中抽出的信号以产生具有相位同步载波的输出信号的方法和系统。

2. 发明申请

US20090086867A1 Method and System for Multi-Point Signal Generation with Phase Synchronized Local Carriers 有权
标题翻译：具有相位同步本地载波的多点信号生成方法和系统
公开(公告)号：US20090086867A1
公开(公告)日：2009-04-02
申请号：US12176897
申请日：2008-07-21
申请人： Mihai Banu , Vladimir Prodanov
发明人： Mihai Banu , Vladimir Prodanov
IPC分类号： H04L7/00
CPC分类号： H04L7/02 , G06F1/12 , H04B15/02 , H04B2215/067
摘要： A method and system of applying modulated carrier signals to tree networks and processing signals tapped from the tree networks to generate output signals with phase-synchronized carriers are disclosed.
摘要翻译：公开了一种将调制载波信号应用于树形网络并处理从树形网络中抽出的信号以产生具有相位同步载波的输出信号的方法和系统。

3. 发明申请

US20070127613A1 AC technique for eliminating phase ambiguity in clocking signals 失效
标题翻译： AC技术用于消除时钟信号中的相位模糊
公开(公告)号：US20070127613A1
公开(公告)日：2007-06-07
申请号：US11397005
申请日：2006-04-03
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： H04L7/00
CPC分类号： H04L7/0008 , G06F1/105 , H03K5/15013 , H03K2005/00032 , H03K2005/00097 , H03L7/08 , H03L7/0812 , H03L7/0891 , H04L7/0037
摘要： A method involving: distributing two clock signals over a clock signal distribution system; in each of a plurality local clocking regions located along the signal distribution system, detecting the two clock signals and generating therefrom a local clock signal for that local clocking region, wherein the generated local clock signals for at least some of the plurality of local clocking regions are in a first group all of which are aligned in phase with each other and the generated local clock signals for the remainder of the plurality of local clocking regions are in a second group all of which are aligned in phase with each other, and wherein the phase of the first group is out of phase with the phase of the second group by a predetermined amount; and bringing all of the clock signals for the plurality of local clocking regions into phase alignment so that the phase of the first group is in phase with the phase of the second group.
摘要翻译：一种方法，包括：通过时钟信号分配系统分配两个时钟信号; 在沿着所述信号分配系统定位的多个本地时钟区域中的每一个中，检测所述两个时钟信号并从其产生用于所述本地时钟区域的本地时钟信号，其中所产生的本地时钟信号用于所述多个本地时钟区域中的至少一些处于第一组中，所有这些组彼此相位对准，并且多个本地时钟区域的其余部分的所产生的本地时钟信号处于第二组中，所有这些本体时钟信号彼此同相对齐，并且其中，第一组的相位与第二组的相位异相预定量; 并将多个本地时钟区域的所有时钟信号引入相位对准，使得第一组的相位与第二组的相位同相。

4. 发明授权

US5757872A Clock recovery circuit 失效
标题翻译：时钟恢复电路
公开(公告)号：US5757872A
公开(公告)日：1998-05-26
申请号：US346795
申请日：1994-11-30
申请人： Mihai Banu , Alfred Earl Dunlop , Wilhelm Carl Fischer , Thaddeus John Gabara , Kalpendu Ranjitrai Shastri
发明人： Mihai Banu , Alfred Earl Dunlop , Wilhelm Carl Fischer , Thaddeus John Gabara , Kalpendu Ranjitrai Shastri
IPC分类号： H04L7/00 , H04J3/06 , H04L25/36 , H04L25/40
CPC分类号： H04J3/0626
摘要： A clock recovery circuit is coupled to an elastic storage circuit such as a FIFO circuit. More specifically, a first input of the elastic storage circuit is electrically connected to an output of the clock recovery circuit. A second input for accepts a data signal representing an input data stream from a communications medium. A third input accepts a local clock signal. The resultant circuit may be used in receiver's for communications systems to help alleviate the problems of frequency mismatch and jitter.
摘要翻译：时钟恢复电路耦合到诸如FIFO电路的弹性存储电路。更具体地，弹性存储电路的第一输入电连接到时钟恢复电路的输出端。用于接收表示来自通信介质的输入数据流的数据信号的第二输入。第三个输入接受本地时钟信号。所得到的电路可用于通信系统的接收机，以帮助减轻频率失配和抖动的问题。

5. 发明授权

US4742308A Balanced output analog differential amplifier circuit 失效
标题翻译：平衡输出模拟差分放大电路
公开(公告)号：US4742308A
公开(公告)日：1988-05-03
申请号：US037301
申请日：1987-04-10
申请人： Mihai Banu
发明人： Mihai Banu
IPC分类号： H03F3/345 , H03F3/34 , H03F3/347 , H03F3/45
CPC分类号： H03F3/45659 , G11B5/3116 , H03F2203/45008 , H03F2203/45036 , H03F2203/45074 , H03F2203/45114 , H03F2203/45202 , H03F2203/45212 , H03F2203/45221 , H03F2203/45402 , H03F2203/45418 , H03F2203/45424 , H03F2203/45702
摘要： A differential operational amplifier circuit, having an input stage and an output stage, is balanced--i.e., is designed to have zero common mode component in its output--by means of a common mode feedback loop arrangement. This arrangement includes a common mode detector, connected for detecting the common mode signal component in a pair of outputs of the output stage of the circuit, and a pair of current steering devices, connected for drawing equal currents from each of the outputs of the input stage. During operation, the common mode detector feeds back a suitable control signal to each of the current steering devices, whereby the common mode component in the outputs is substantially completely suppressed.

6. 发明授权

US4509019A Tunable active filter 失效
标题翻译：可调式有源滤波器
公开(公告)号：US4509019A
公开(公告)日：1985-04-02
申请号：US461532
申请日：1983-01-27
申请人： Mihai Banu , Yannis Tsividis
发明人： Mihai Banu , Yannis Tsividis
IPC分类号： H03F1/34 , H03G5/00 , H03H11/12 , H03F3/04
CPC分类号： H03G5/00 , H03H11/1291
摘要： A tunable high-pass or low-pass filter employs a balanced amplifier having electronically controlled elements in either the two input or the two feedback paths (or both). A reactive element is placed in the other of the paths. Especially low distortion results from this arrangement, allowing convenient integrated circuit implementation with a nonlinear device (e.g., MOS transistor) as a voltage-controllable element. Multiple stages can be cascaded and controlled from a reference clock or other precision source for high accuracy.
摘要翻译：可调高通或低通滤波器采用在两个输入或两个反馈路径（或两者）中具有电子控制元件的平衡放大器。反应元件放置在另一个路径中。通过这种布置特别低的失真，允许用非线性器件（例如，MOS晶体管）作为电压可控元件进行便利的集成电路实现。可以从参考时钟或其他精密源级联和控制多级，以实现高精度。

7. 发明授权

US09161360B2 Techniques for achieving high average spectrum efficiency in a wireless system 有权
标题翻译：在无线系统中获得高平均频谱效率的技术
公开(公告)号：US09161360B2
公开(公告)日：2015-10-13
申请号：US13442561
申请日：2012-04-09
申请人： Mihai Banu , Yiping Feng , David Poticny
发明人： Mihai Banu , Yiping Feng , David Poticny
IPC分类号： H04B7/00 , H04W72/04 , H04B7/06 , H04W8/18 , H04W16/28 , H04B7/04
CPC分类号： H04W72/046 , H04B7/0413 , H04B7/0691 , H04B7/0695 , H04W8/186 , H04W16/14 , H04W16/28
摘要： Techniques for achieving high average spectrum efficiency in a wireless system are disclosed. In one particular embodiment, the techniques may be realized as a method of communicating with a wireless station comprising defining a plurality of beams to be generated by a beam-forming device, defining a set of beam groups wherein each beam group is a different subset of beams of the plurality of beams; repeatedly cycling through the set of beam groups by sequentially generating each group of beams among the set of beam groups; identifying a beam group among the set of beam groups which yields a best communication link with a wireless station; and scheduling communications with the wireless station to occur via the identified beam group when the identified beam group is being generated.
摘要翻译：公开了在无线系统中实现高平均频谱效率的技术。在一个具体实施例中，技术可以被实现为与无线站通信的方法，包括定义要由波束形成设备生成的多个波束，定义一组波束组，其中每个波束组是多个梁的梁; 通过在所述一组光束组中顺序地产生每组光束来反复循环通过所述一组光束组; 识别在与无线站之间产生最佳通信链路的一组波束组中的波束组; 并且当所生成的所识别的波束组时，通过经识别的波束组来调度与无线站的通信。

8. 发明授权

US07500155B2 Average time extraction circuit for eliminating clock skew 失效
标题翻译：用于消除时钟偏移的平均时间提取电路
公开(公告)号：US07500155B2
公开(公告)日：2009-03-03
申请号：US11390644
申请日：2006-03-28
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： G06K5/04 , G06F1/04
CPC分类号： G06F1/105
摘要： The method involves detecting a first signal characterized by a periodically occurring first event, detecting a second signal characterized by a periodically occurring second event, and based on both the detected first and second signals, generating a third signal characterized by a periodically occurring third event. The method also involves automatically adjusting the phase of the third signal so that the periodically occurring third event occurs at a predetermined location between the first and second events of the first and second signals.
摘要翻译：该方法涉及检测以周期性发生的第一事件为特征的第一信号，检测由周期性发生的第二事件表征的第二信号，并且基于检测到的第一和第二信号两者，产生以周期性发生的第三事件为特征的第三信号。该方法还涉及自动调整第三信号的相位，使得周期性地发生的第三事件发生在第一和第二信号的第一和第二事件之间的预定位置处。

9. 发明申请

US20070127922A1 Eliminating clock skew by using bidirectional signaling 审中-公开
标题翻译：通过双向信令消除时钟偏移
公开(公告)号：US20070127922A1
公开(公告)日：2007-06-07
申请号：US11407315
申请日：2006-04-18
申请人： Vladimir Prodanov , Mihai Banu , Bryan Ackland
发明人： Vladimir Prodanov , Mihai Banu , Bryan Ackland
IPC分类号： H04J14/00
CPC分类号： G06F1/105 , H04L7/0012
摘要： A clock signal distribution circuit including: a signal transmission system having first and second signal transmission lines, each extending from the first end to the second end of the signal transmission system, the first signal transmission line for carrying a first periodic signal from the first end to the second end of the signal transmission system, the second signal transmission line for carrying a second periodic signal from the second end to the first end of the signal transmission system transmission; and a local clock signal generator circuit including a detector system for detecting at a preselected location along the signal transmission system the first and second periodic signals, wherein the generator circuit generates from both the detected first and second periodic signals a local clock signal that has a predetermined skew that is between to the skews of the detected first and second periodic signals.
摘要翻译：一种时钟信号分配电路，包括：信号传输系统，具有从信号传输系统的第一端延伸到第二端的第一和第二信号传输线，用于承载来自第一端的第一周期性信号的第一信号传输线到信号传输系统的第二端，用于承载从信号传输系统传输的第二端到第一端的第二周期信号的第二信号传输线; 以及本地时钟信号发生器电路，其包括用于在信号传输系统的预选位置处检测第一和第二周期信号的检测器系统，其中发生器电路从检测到的第一和第二周期信号两者产生本地时钟信号，处于检测到的第一和第二周期信号的偏差之间的预定偏移。

10. 发明申请

US20070126490A1 Average time extraction circuit for eliminating clock skew 审中-公开
标题翻译：用于消除时钟偏移的平均时间提取电路
公开(公告)号：US20070126490A1
公开(公告)日：2007-06-07
申请号：US11397008
申请日：2006-04-03
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： G06F1/04
CPC分类号： G06F1/105
摘要： A method and apparatus for receiving a first signal characterized by a periodically occurring first event; receiving a second signal characterized by a periodically occurring second event; delaying the first signal by a controllable amount of delay to generate a third signal characterized by a periodically occurring third event; and based on relative timing of the first and second signals, controlling the amount of delay so that the periodically occurring third event occurs at a predetermined location between the first and second events of the first and second signals.
摘要翻译：一种用于接收以周期性发生的第一事件为特征的第一信号的方法和装置; 接收以周期性发生的第二事件为特征的第二信号; 将第一信号延迟可控量的延迟以产生以周期性发生的第三事件为特征的第三信号; 并且基于第一和第二信号的相对定时，控制延迟量，使得周期性发生的第三事件发生在第一和第二信号的第一和第二事件之间的预定位置。

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