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1. 发明申请

US20090086867A1 Method and System for Multi-Point Signal Generation with Phase Synchronized Local Carriers 有权
标题翻译：具有相位同步本地载波的多点信号生成方法和系统
公开(公告)号：US20090086867A1
公开(公告)日：2009-04-02
申请号：US12176897
申请日：2008-07-21
申请人： Mihai Banu , Vladimir Prodanov
发明人： Mihai Banu , Vladimir Prodanov
IPC分类号： H04L7/00
CPC分类号： H04L7/02 , G06F1/12 , H04B15/02 , H04B2215/067
摘要： A method and system of applying modulated carrier signals to tree networks and processing signals tapped from the tree networks to generate output signals with phase-synchronized carriers are disclosed.
摘要翻译：公开了一种将调制载波信号应用于树形网络并处理从树形网络中抽出的信号以产生具有相位同步载波的输出信号的方法和系统。

2. 发明申请

US20070127613A1 AC technique for eliminating phase ambiguity in clocking signals 失效
标题翻译： AC技术用于消除时钟信号中的相位模糊
公开(公告)号：US20070127613A1
公开(公告)日：2007-06-07
申请号：US11397005
申请日：2006-04-03
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： H04L7/00
CPC分类号： H04L7/0008 , G06F1/105 , H03K5/15013 , H03K2005/00032 , H03K2005/00097 , H03L7/08 , H03L7/0812 , H03L7/0891 , H04L7/0037
摘要： A method involving: distributing two clock signals over a clock signal distribution system; in each of a plurality local clocking regions located along the signal distribution system, detecting the two clock signals and generating therefrom a local clock signal for that local clocking region, wherein the generated local clock signals for at least some of the plurality of local clocking regions are in a first group all of which are aligned in phase with each other and the generated local clock signals for the remainder of the plurality of local clocking regions are in a second group all of which are aligned in phase with each other, and wherein the phase of the first group is out of phase with the phase of the second group by a predetermined amount; and bringing all of the clock signals for the plurality of local clocking regions into phase alignment so that the phase of the first group is in phase with the phase of the second group.
摘要翻译：一种方法，包括：通过时钟信号分配系统分配两个时钟信号; 在沿着所述信号分配系统定位的多个本地时钟区域中的每一个中，检测所述两个时钟信号并从其产生用于所述本地时钟区域的本地时钟信号，其中所产生的本地时钟信号用于所述多个本地时钟区域中的至少一些处于第一组中，所有这些组彼此相位对准，并且多个本地时钟区域的其余部分的所产生的本地时钟信号处于第二组中，所有这些本体时钟信号彼此同相对齐，并且其中，第一组的相位与第二组的相位异相预定量; 并将多个本地时钟区域的所有时钟信号引入相位对准，使得第一组的相位与第二组的相位同相。

3. 发明申请

US20070127615A1 DC technique for eliminating phase ambiguity in clocking signals 审中-公开
标题翻译： DC技术，用于消除时钟信号中的相位模糊
公开(公告)号：US20070127615A1
公开(公告)日：2007-06-07
申请号：US11397232
申请日：2006-04-04
申请人： Vladimir Prodanov , Mihai Banu , Bryan Ackland
发明人： Vladimir Prodanov , Mihai Banu , Bryan Ackland
IPC分类号： H03D3/24
CPC分类号： G06F1/105
摘要： An integrated circuit including: a clock signal distribution network for carrying two global clock signals traveling in opposite directions; a plurality of local clocking regions arranged along the network, each of which includes a local clock signal generation circuit that generates a local clock signal based upon the two global clock signals; and a plurality of phase detectors each of which is associated with a different one of the local clocking regions and is configured to compare the local clock signal for that local clocking region with the local clock signal for a neighboring local clocking region, wherein in each of at least some of the local clocking regions the local clock signal generation circuit is configured to align the local clock signal for that region with the local clock signal of the neighboring region when the phase detector for that local clocking region indicates a nonalignment condition exists.
摘要翻译：一种集成电路，包括：用于承载沿相反方向行进的两个全局时钟信号的时钟信号分配网络; 沿着网络布置的多个本地时钟区域，每个本地时钟区域包括基于两个全局时钟信号产生本地时钟信号的本地时钟信号产生电路; 以及多个相位检测器，每个相位检测器与本地时钟区域中的不同的一个相关联，并且被配置为将该本地时钟区域的本地时钟信号与相邻本地时钟区域的本地时钟信号进行比较，其中在每个本地时钟信号产生电路中的至少一些本地时钟信号产生电路被配置为当该本地时钟区域的相位检测器指示不对准条件时，将该区域的本地时钟信号与相邻区域的本地时钟信号对准。

4. 发明授权

US07031690B2 Polyphase filter with low-pass response 有权
公开(公告)号：US07031690B2
公开(公告)日：2006-04-18
申请号：US10294411
申请日：2002-11-14
申请人： Vladimir Prodanov , Peter Kiss , Mihai Banu
发明人： Vladimir Prodanov , Peter Kiss , Mihai Banu
IPC分类号： H04B1/00
CPC分类号： H03H17/0277 , H03H2218/04
摘要： A complex low-pass filter that reduces the influence of component mismatch. The filter includes a first filter section for effecting a first single pole transfer function and a second filter section for effecting a second single pole transfer function, where the first and the second single pole transfer functions collectively define a conjugate pair of poles. In higher order low-pass filters, an optimal cascade order follows a shoestring pattern.

5. 发明授权

US07509516B2 AC technique for eliminating phase ambiguity in clocking signals 失效
标题翻译： AC技术用于消除时钟信号中的相位模糊
公开(公告)号：US07509516B2
公开(公告)日：2009-03-24
申请号：US11397005
申请日：2006-04-03
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： G06F1/00
CPC分类号： H04L7/0008 , G06F1/105 , H03K5/15013 , H03K2005/00032 , H03K2005/00097 , H03L7/08 , H03L7/0812 , H03L7/0891 , H04L7/0037
摘要： A method involving: distributing two clock signals over a clock signal distribution system; in each of a plurality local clocking regions located along the signal distribution system, detecting the two clock signals and generating therefrom a local clock signal for that local clocking region, wherein the generated local clock signals for at least some of the plurality of local clocking regions are in a first group all of which are aligned in phase with each other and the generated local clock signals for the remainder of the plurality of local clocking regions are in a second group all of which are aligned in phase with each other, and wherein the phase of the first group is out of phase with the phase of the second group by a predetermined amount; and bringing all of the clock signals for the plurality of local clocking regions into phase alignment so that the phase of the first group is in phase with the phase of the second group.
摘要翻译：一种方法，包括：通过时钟信号分配系统分配两个时钟信号; 在沿着所述信号分配系统定位的多个本地时钟区域中的每一个中，检测所述两个时钟信号并从其产生用于所述本地时钟区域的本地时钟信号，其中所产生的本地时钟信号用于所述多个本地时钟区域中的至少一些处于第一组中，所有这些组彼此相位对准，并且多个本地时钟区域的其余部分的所产生的本地时钟信号处于第二组中，所有这些本体时钟信号彼此同相对齐，并且其中，第一组的相位与第二组的相位异相预定量; 并将多个本地时钟区域的所有时钟信号引入相位对准，使得第一组的相位与第二组的相位同相。

6. 发明申请

US20070127921A1 Average time extraction by multiplication 审中-公开
标题翻译：通过乘法平均时间提取
公开(公告)号：US20070127921A1
公开(公告)日：2007-06-07
申请号：US11369591
申请日：2006-03-07
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： H04J14/00
CPC分类号： H04L7/0008 , G06F1/105
摘要： A method involving: in a signal distribution system including a first line and a second line both of which extend from the first end to the second end of the signal distribution system, introducing a first global clock signal into the first line so that the first global clock signal propagates from the first end to the second end of the line; introducing a second sinusoidal global clock signal into the second line so that the second global clock signal propagates from the second end to the first end of the line; and in each of a plurality of local clocking regions located along the signal distribution system, detecting the first and second global clock signals; multiplying the detected first and second clock signal for that local clocking region together to generate a combined signal, and deriving a local clock signal for that local clocking region from the combined signal.
摘要翻译：一种方法，包括：在包括从信号分配系统的第一端延伸到第二端的第一线和第二线的信号分配系统中，将第一全局时钟信号引入到第一线中，使得第一全局时钟信号从线的第一端传播到第二端; 将第二正弦全局时钟信号引入第二行，使得第二全局时钟信号从第二端传播到线的第一端; 以及沿着信号分配系统定位的多个本地时钟区域中的每一个，检测第一和第二全局时钟信号; 将检测到的第一和第二时钟信号与该本地时钟区域相乘，以产生组合信号，并从该组合信号中导出该本地时钟区域的本地时钟信号。

7. 发明申请

US20070126489A1 Average time extraction circuit for eliminating clock skew 失效
标题翻译：用于消除时钟偏移的平均时间提取电路
公开(公告)号：US20070126489A1
公开(公告)日：2007-06-07
申请号：US11390644
申请日：2006-03-28
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： G06F1/04
CPC分类号： G06F1/105
摘要： A method involving: detecting a first signal characterized by a periodically occurring first event; detecting a second signal characterized by a periodically occurring second event; and based on both the detected first and second signals, generating a third signal characterized by a periodically occurring third event, wherein generating the third signal involves automatically adjusting the phase of the third signal so that the periodically occurring third event occurs at a predetermined location between the first and second events of the first and second signals.
摘要翻译：一种方法，涉及：检测以周期性发生的第一事件为特征的第一信号; 检测以周期性发生的第二事件为特征的第二信号; 并且基于检测到的第一和第二信号，产生以周期性发生的第三事件为特征的第三信号，其中产生第三信号涉及自动调整第三信号的相位，使得周期性发生的第三事件发生在预定位置之间第一和第二信号的第一和第二事件。

8. 发明授权

US08259884B2 Method and system for multi-point signal generation with phase synchronized local carriers 有权
标题翻译：具有相位同步的本地载波的多点信号生成方法和系统
公开(公告)号：US08259884B2
公开(公告)日：2012-09-04
申请号：US12176897
申请日：2008-07-21
申请人： Mihai Banu , Vladimir Prodanov
发明人： Mihai Banu , Vladimir Prodanov
IPC分类号： H04L7/00
CPC分类号： H04L7/02 , G06F1/12 , H04B15/02 , H04B2215/067
摘要： A method and system of applying modulated carrier signals to tree networks and processing signals tapped from the tree networks to generate output signals with phase-synchronized carriers are disclosed.
摘要翻译：公开了一种将调制载波信号应用于树形网络并处理从树形网络中抽出的信号以产生具有相位同步载波的输出信号的方法和系统。

9. 发明申请

US20070127930A1 Skew correction system eliminating phase ambiguity by using reference multiplication 审中-公开
标题翻译：倾斜校正系统通过使用参考倍增来消除相位模糊
公开(公告)号：US20070127930A1
公开(公告)日：2007-06-07
申请号：US11397009
申请日：2006-04-03
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： H04B10/00
CPC分类号： H03L7/0812 , G01R31/31726 , G01R31/31727 , G06F1/105 , H03L7/085 , H03L7/18
摘要： A system for generating a local clock signal, the system including: a skew correction circuit for receiving first and second periodic signals that have associated skews, wherein the skew correction circuit is configured to use the received first and second periodic signals to generate a third periodic signal that has a fixed skew between the skews of the first and second periodic signals; a phase detector with a first input that receives the third periodic signal from the skew correction circuit and a second input; a variable oscillator for generating an output signal having a frequency that is controlled by the phase detector; and a frequency divider for dividing the frequency of the oscillator's output signal, wherein the frequency-divided output signal is fed back to the second input of the phase detector, and wherein the local clock signal is derived from the oscillator's output signal.
摘要翻译：一种用于产生本地时钟信号的系统，所述系统包括：偏斜校正电路，用于接收具有相关偏斜的第一和第二周期信号，其中所述偏斜校正电路被配置为使用所接收的第一和第二周期信号来产生第三周期信号在第一和第二周期信号的偏差之间具有固定的偏差; 相位检测器，具有从偏斜校正电路接收第三周期信号的第一输入端和第二输入端; 用于产生具有由所述相位检测器控制的频率的输出信号的可变振荡器; 以及分频器，用于分频振荡器的输出信号的频率，其中分频输出信号被反馈到相位检测器的第二输入端，并且其中本地时钟信号从振荡器的输出信号导出。

10. 发明授权

US07500155B2 Average time extraction circuit for eliminating clock skew 失效
标题翻译：用于消除时钟偏移的平均时间提取电路
公开(公告)号：US07500155B2
公开(公告)日：2009-03-03
申请号：US11390644
申请日：2006-03-28
申请人： Vladimir Prodanov , Mihai Banu
发明人： Vladimir Prodanov , Mihai Banu
IPC分类号： G06K5/04 , G06F1/04
CPC分类号： G06F1/105
摘要： The method involves detecting a first signal characterized by a periodically occurring first event, detecting a second signal characterized by a periodically occurring second event, and based on both the detected first and second signals, generating a third signal characterized by a periodically occurring third event. The method also involves automatically adjusting the phase of the third signal so that the periodically occurring third event occurs at a predetermined location between the first and second events of the first and second signals.
摘要翻译：该方法涉及检测以周期性发生的第一事件为特征的第一信号，检测由周期性发生的第二事件表征的第二信号，并且基于检测到的第一和第二信号两者，产生以周期性发生的第三事件为特征的第三信号。该方法还涉及自动调整第三信号的相位，使得周期性地发生的第三事件发生在第一和第二信号的第一和第二事件之间的预定位置处。

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