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1. 发明申请

US20040052105A1 BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH 有权
标题翻译： BRIDGE型磁性随机存取存储器（MRAM）LATCH
公开(公告)号：US20040052105A1
公开(公告)日：2004-03-18
申请号：US10246245
申请日：2002-09-17
申请人： Micron Technology, Inc.
发明人： David E. Fulkerson , Yong Lu
IPC分类号： G11C011/00
CPC分类号： G11C11/15
摘要： A technique to read a stored state in a magnetoresistive random access memory (MRAM) device, such as a giant magneto-resistance (GMR) MRAM device or a tunneling magneto-resistance (TMR) device uses a bit line in an MRAM device that is segmented into a first portion and a second portion. An interface circuit compares the resistance of a first portion and a second portion of a first bit line to the resistance of a first portion and a second portion of a second bit line to determine the logical state of a cell in the first bit line. The interface circuit includes a reset circuit that selectively couples the outputs of the interface circuit together. A subsequent decoupling of the outputs allows cross-coupling within the interface circuit to latch the outputs to a logical state corresponding to the stored magnetic state, thereby allowing the stored state of a cell to be read.
摘要翻译：在诸如巨磁电阻（MRM）MRAM装置或隧道磁阻（TMR）装置的磁阻随机存取存储器（MRAM）装置中读取存储状态的技术使用MRAM装置中的位线分割成第一部分和第二部分。接口电路将第一位线的第一部分和第二部分的电阻与第二位线的第一部分和第二部分的电阻进行比较，以确定第一位线中的单元的逻辑状态。接口电路包括将接口电路的输出选择性地耦合在一起的复位电路。输出的随后的去耦允许接口电路内的交叉耦合以将输出锁存到对应于存储的磁状态的逻辑状态，从而允许读取单元的存储状态。

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