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1. 发明授权

US06656812B1 Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process 有权
标题翻译：具有低频噪声和高电流增益的垂直双极晶体管，以及相应的制造工艺
公开(公告)号：US06656812B1
公开(公告)日：2003-12-02
申请号：US09717825
申请日：2000-11-21
申请人： Michel Marty , Didier Dutartre , Alain Chantre , Sébastien Jouan , Pierre Llinares
发明人： Michel Marty , Didier Dutartre , Alain Chantre , Sébastien Jouan , Pierre Llinares
IPC分类号： H01L21331
CPC分类号： H01L29/0895
摘要： A vertical bipolar transistor includes a semiconductor substrate, an extrinsic collector layer in the semiconductor substrate, an intrinsic collector on the extrinsic collector, a lateral isolating region surrounding an upper part of the intrinsic collector, an offset extrinsic collector well, a base including a semiconductor region above the intrinsic collector and above the lateral isolating region including at least one silicon layer, and a doped emitter surrounded by the base. The doped emitter may include first and second parts. The first part may be formed from single-crystal silicon and in direct contact with the upper surface of the semiconductor region in a predetermined window in the upper surface above the intrinsic collector. The second part may be formed from polycrystalline silicon. The two parts of the emitter may be separated by a separating oxide layer spaced apart from the emitter-base junction of the transistor.
摘要翻译：垂直双极晶体管包括半导体衬底，半导体衬底中的非本征集电极层，非本征集电极上的本征集电极，围绕本征集电极的上部的横向隔离区，偏移的外在集电极阱，包括半导体在包含至少一个硅层的横向隔离区域上方以及由该基极包围的掺杂发射极之上。掺杂发射器可以包括第一和第二部分。第一部分可以由单晶硅形成，并且在本征收集器上方的上表面中的预定窗口中与半导体区域的上表面直接接触。第二部分可以由多晶硅形成。发射极的两个部分可以通过与晶体管的发射极 - 基极结间隔开的分离氧化物层来分离。

2. 发明授权

US06642096B2 Bipolar transistor manufacturing 有权
公开(公告)号：US06642096B2
公开(公告)日：2003-11-04
申请号：US09947190
申请日：2001-09-05
申请人： Didier Dutartre , Alain Chantre , Michel Marty , Sébastien Jouan
发明人： Didier Dutartre , Alain Chantre , Michel Marty , Sébastien Jouan
IPC分类号： H01L218249
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/66272
摘要： A method of manufacturing a bipolar transistor in a single-crystal silicon substrate of a first conductivity type, including a step of carbon implantation at the substrate surface followed by an anneal step, before forming, by epitaxy, the transistor base in the form of a single-crystal semiconductor multilayer including at least a lower layer, a heavily-doped median layer of the second conductivity type, and an upper layer that contacts a heavily-doped emitter of the first conductivity type.

3. 发明授权

US06177717B1 Low-noise vertical bipolar transistor and corresponding fabrication process 有权
标题翻译：低噪声垂直双极晶体管及相应的制造工艺
公开(公告)号：US06177717B1
公开(公告)日：2001-01-23
申请号：US09323418
申请日：1999-06-01
申请人： Alain Chantre , Michel Marty , Didier Dutartre , Augustin Monroy , Michel Laurens , Francois Guette
发明人： Alain Chantre , Michel Marty , Didier Dutartre , Augustin Monroy , Michel Laurens , Francois Guette
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L29/0826 , H01L29/7378
摘要： The intrinsic collector of a vertical bipolar transitor is grown epitaxially on an extrinsic collector layer buried in a semiconductor substrate. A lateral isolation region surrounds the upper part of the intrinsic collector and an offset extrinsic collector well is produced. An SiGe heterojunction base lying above the intrinsic collector and above the lateral isolation region is produced by non-selective epitaxy. An in-situ doped emitter is produced by epitaxy on a predetermined window in the surface of the base which lies above the intrinsic collector so as to obtain, at least above the window, an emitter region formed from single-crystal silicon and directly in contact with the silicon of the base.
摘要翻译：垂直双极性偏转器的本征集电极外延生长在埋在半导体衬底中的非本征集电极层上。横向隔离区域围绕本征收集器的上部，并产生偏移的外部收集阱。通过非选择性外延生产位于本征收集器之上和横向隔离区上方的SiGe异质结基底。原位掺杂的发射体通过在位于本征集电极上方的基底表面上的预定窗口上外延生长，以便至少在窗口上方获得由单晶硅形成并直接接触的发射极区域与基底的硅。

4. 发明授权

US07470559B2 Semiconductor component comprising a buried mirror 有权
标题翻译：半导体元件包括掩埋反射镜
公开(公告)号：US07470559B2
公开(公告)日：2008-12-30
申请号：US11297973
申请日：2005-12-08
申请人： Sébastien Jouan , Michel Marty
发明人： Sébastien Jouan , Michel Marty
IPC分类号： H01L21/00
CPC分类号： H01L31/1804 , H01L31/02327 , H01L31/105 , H01L31/1085 , Y02E10/547 , Y02P70/521
摘要： A method for forming a buried mirror in a semiconductor component includes the steps of forming a structure comprising a semiconductor layer laid on an insulating layer covering a substrate; forming one or several openings in the semiconductor layer emerging at the surface of the insulating layer; eliminating a portion of the insulating layer, whereby a recess is formed; forming a second thin insulating layer against the wall of the recess; and forming a metal layer in the recess against the second insulating layer.
摘要翻译：在半导体部件中形成掩模反射镜的方法包括以下步骤：形成包括覆盖在基板上的绝缘层上的半导体层的结构; 在半导体层中形成在绝缘层的表面出现的一个或几个开口; 消除绝缘层的一部分，由此形成凹部; 在所述凹部的壁上形成第二薄绝缘层; 以及在所述凹部中在所述第二绝缘层上形成金属层。

5. 发明授权

US08524522B2 Microelectronic device, in particular back side illuminated image sensor, and production process 有权
标题翻译：微电子器件，特别是背面照明图像传感器，以及生产过程
公开(公告)号：US08524522B2
公开(公告)日：2013-09-03
申请号：US12963792
申请日：2010-12-09
申请人： Michel Marty , Didier Dutartre , Francois Roy , Pascal Besson , Jens Prima
发明人： Michel Marty , Didier Dutartre , Francois Roy , Pascal Besson , Jens Prima
IPC分类号： H01L21/00 , H01L21/46 , H01L31/0232 , H01L27/148
CPC分类号： H01L27/14687 , H01L21/2007 , H01L21/30604 , H01L21/76256 , H01L27/14632 , H01L27/1464 , H01L27/14643 , H01L27/14689 , H01L31/028 , H01L31/0312 , H01L31/1812
摘要： A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.
摘要翻译：微电子器件的制造方法包括制造第一半导体衬底，该第一半导体衬底包括存在于衬底的第一侧和第二侧之间的第一层和第二层。第一电子部件和互连部分在第二面上和上方产生。然后通过从第一侧施加的第一选择性蚀刻将衬底减薄，并停止在第一层上，随后在第二层上进行第二选择性蚀刻停止。第二衬底附接在互连部分上。电子部件可以包括通过第二层照射的光电子器件。

6. 发明申请

US20110140220A1 MICROELECTRONIC DEVICE, IN PARTICULAR BACK SIDE ILLUMINATED IMAGE SENSOR, AND PRODUCTION PROCESS 有权
标题翻译：微电子装置，特别是背面照明图像传感器，以及生产过程
公开(公告)号：US20110140220A1
公开(公告)日：2011-06-16
申请号：US12963792
申请日：2010-12-09
申请人： Michel Marty , Didier Dutartre , Francois Roy , Pascal Besson , Jens Prima
发明人： Michel Marty , Didier Dutartre , Francois Roy , Pascal Besson , Jens Prima
IPC分类号： H01L31/0236 , H01L31/0232 , H01L31/18
CPC分类号： H01L27/14687 , H01L21/2007 , H01L21/30604 , H01L21/76256 , H01L27/14632 , H01L27/1464 , H01L27/14643 , H01L27/14689 , H01L31/028 , H01L31/0312 , H01L31/1812
摘要： A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.
摘要翻译：微电子器件的制造方法包括制造第一半导体衬底，该第一半导体衬底包括存在于衬底的第一侧和第二侧之间的第一层和第二层。第一电子部件和互连部分在第二面上和上方产生。然后通过从第一侧施加的第一选择性蚀刻将衬底减薄，并停止在第一层上，随后在第二层上进行第二选择性蚀刻停止。第二衬底附接在互连部分上。电子部件可以包括通过第二层照射的光电子器件。

7. 发明授权

US07824978B2 Bipolar transistor with high dynamic performances 有权
标题翻译：具有高动态性能的双极晶体管
公开(公告)号：US07824978B2
公开(公告)日：2010-11-02
申请号：US11516067
申请日：2006-09-06
申请人： Alain Chantre , Bertrand Martinet , Michel Marty , Pascal Chevalier
发明人： Alain Chantre , Bertrand Martinet , Michel Marty , Pascal Chevalier
IPC分类号： H01L29/082
CPC分类号： H01L29/66242 , H01L21/8249 , H01L29/0817 , H01L29/36 , H01L29/41708 , H01L29/42304 , H01L29/456 , H01L29/7378
摘要： A bipolar transistor with very high dynamic performance, usable in an integrated circuit. The bipolar transistor has a single-crystal silicon emitter region with a thickness smaller than 50 nm. The base of the bipolar transistor is made of an SiGe alloy.
摘要翻译：具有非常高动态性能的双极晶体管，可用于集成电路。双极晶体管具有厚度小于50nm的单晶硅发射极区域。双极晶体管的基极由SiGe合金制成。

8. 发明申请

US20050037587A1 Heterojunction bipolar transistor 审中-公开
标题翻译：异质结双极晶体管
公开(公告)号：US20050037587A1
公开(公告)日：2005-02-17
申请号：US10914482
申请日：2004-08-09
申请人： Bertrand Martinet , Michel Marty , Pascal Chevalier , Alain Chantre
发明人： Bertrand Martinet , Michel Marty , Pascal Chevalier , Alain Chantre
IPC分类号： H01L21/331 , H01L29/08 , H01L21/8222
CPC分类号： H01L29/66287 , H01L29/0817 , H01L29/66242
摘要： A method for forming a heterojunction bipolar transistor including the steps of: forming in a semiconductor substrate a collector area of a first doping type; growing by epitaxy above a portion of the collector area a silicon/germanium layer of a second doping type forming a base area; forming above the silicon/germanium layer a sacrificial emitter formed of a material selectively etchable with respect to the silicon/germanium layer and with respect to the layers and consecutively-formed insulating spacers; forming first insulating spacers on the sides of the sacrificial emitter; growing by epitaxy a silicon layer above the exposed portions of the silicon/germanium layer; forming second insulating spacers adjacent to the first spacers and laid on the silicon layer; covering the entire structure with an insulating layer; partially removing the insulating layer above the sacrificial emitter and removing the sacrificial emitter; filling the space previously taken up by the sacrificial emitter with a semiconductor material of the first doping type.
摘要翻译：一种用于形成异质结双极晶体管的方法，包括以下步骤：在半导体衬底中形成第一掺杂类型的集电极区域; 通过在集电区域的一部分上方的外延生长形成基区的第二掺杂类型的硅/锗层; 在硅/锗层之上形成由相对于硅/锗层可选择性地蚀刻的材料以及相对于层和连续形成的绝缘间隔物形成的牺牲发射体; 在所述牺牲发射体的侧面上形成第一绝缘间隔物; 通过将硅/锗层的暴露部分上的硅层外延生长; 形成与所述第一间隔物相邻的第二绝缘间隔物并铺设在所述硅层上; 用绝缘层覆盖整个结构; 部分去除牺牲发射体上方的绝缘层并去除牺牲发射极; 用第一掺杂类型的半导体材料填充先前由牺牲发射极占据的空间。

9. 发明申请

US20060054998A1 Bipolar transistor with high dynamic performances 有权
标题翻译：具有高动态性能的双极晶体管
公开(公告)号：US20060054998A1
公开(公告)日：2006-03-16
申请号：US10942165
申请日：2004-09-16
申请人： Alain Chantre , Bertrand Martinet , Michel Marty , Pascal Chevalier
发明人： Alain Chantre , Bertrand Martinet , Michel Marty , Pascal Chevalier
IPC分类号： H01L27/082
CPC分类号： H01L29/66242 , H01L21/8249 , H01L29/0817 , H01L29/36 , H01L29/41708 , H01L29/42304 , H01L29/456 , H01L29/7378
摘要： A novel bipolar transistor with very high dynamic performances, usable in an integrated circuit. This bipolar transistor comprises a single-crystal silicon emitter region with a thickness smaller than 50 nm. The base of the bipolar transistor is made of an SiGe alloy.
摘要翻译：一种具有非常高动态性能的新型双极晶体管，可用于集成电路。该双极晶体管包括厚度小于50nm的单晶硅发射极区域。双极晶体管的基极由SiGe合金制成。

10. 发明授权

US06902970B2 Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors 有权
标题翻译：集成电路包括双极晶体管和MOSFET晶体管的制造方法
公开(公告)号：US06902970B2
公开(公告)日：2005-06-07
申请号：US10352376
申请日：2003-01-27
申请人： Michel Marty , Alain Chantre
发明人： Michel Marty , Alain Chantre
IPC分类号： H01L21/8249 , H01L21/8238
CPC分类号： H01L21/8249
摘要： Production of an insulated-gate field-effect transistor is begun and interrupted at an uncompleted point. Then, a bipolar transistor is almost completely produced. At that point, a return is made to the production of the insulated-gate field-effect transistor. Lastly, a finishing step common to both transistors and including common thermal annealing and common siliciding is performed.
摘要翻译：绝缘栅场效应晶体管的制造在未完成的点开始和中断。然后，双极晶体管几乎完全产生。此时，对绝缘栅场效应晶体管的制造进行了回归。最后，执行两个晶体管共同的包括普通热退火和普通硅化的完成步骤。

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