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    • 2. 发明申请
    • Redriver with Output Receiver Detection that Mirrors Detected Termination on Output to Input
    • 具有输出接收器检测的转接器检测到镜像检测到输出到输入的终止
    • US20120235704A1
    • 2012-09-20
    • US13487100
    • 2012-06-01
    • Tony YeungMichael Y. Zhang
    • Tony YeungMichael Y. Zhang
    • H03K17/16
    • H04L25/0278H03K19/0005H04B3/36H04L25/0272H04L25/0286H04L25/029H04L25/0298H04L25/03878
    • A redriver chip is inserted between a transmitter chip and a receiver chip and re-drives differential signals from the transmitter chip to the receiver chip. The redriver chip has switched output termination that switches to a high value to detect far-end termination at the receiver chip, and to a low value for signaling. An output detector detects when the receiver chip has termination to ground and enables switched input termination to provide termination to ground on the lines back to the transmitter chip so that the far-end termination on the receiver chip is mirrored back to the transmitter chip, hiding the redriver chip. An input signal detector detects when the transmitter chip begins signaling and enables an equalizer, limiter, pre-driver, and output stage to re-drive the signals to the receiver chip. The input signal detector also causes the switched output termination to switch to the low value termination for signaling.
    • 转发器芯片插入在发射机芯片和接收器芯片之间,并将差分信号从发射机芯片重新驱动到接收器芯片。 转接芯片已切换输出端接,切换到高电平值,以检测接收芯片的远端终端,并发送信号低值。 输出检测器检测接收器芯片何时终止接地并使能切换输入端接,以将线路上的终端提供给发射机芯片,使得接收器芯片上的远端终端被镜像回发射机芯片,隐藏 转盘芯片。 输入信号检测器检测发射机芯片什么时候开始发信号,并启用均衡器,限幅器,预驱动器和输出级,以将信号重新驱动到接收器芯片。 输入信号检测器还使切换输出端接切换到低值终端用于信令。
    • 3. 发明授权
    • Method and apparatus for low power data transmission
    • 低功率数据传输的方法和装置
    • US5831453A
    • 1998-11-03
    • US777547
    • 1996-12-30
    • Georgios I. StamoulisJunji SugisawaMichael Y. Zhang
    • Georgios I. StamoulisJunji SugisawaMichael Y. Zhang
    • H03K17/687H03K19/0948H03K19/096
    • H03K17/6872
    • A method and apparatus for low power transmission of digital data. A low power data transmission circuit includes a pass gate having parallel-connected n and p-channel CMOS transistors that transmit input data. To reduce power in a first embodiment, a circuit disables the parallel-connected p-channel pass gate transistor except when the input data is high (logical 1). The p-channel pass gate transistor is needed to pass logical 1's without degradation. In the first embodiment, the n-channel pass gate transistor is enabled to transmit the input data on every clock cycle. In a second embodiment, the circuit disables the parallel-connected n-channel pass gate transistor except when the input data is low (logical 0). The n-channel pass gate transistor is needed to pass logical 0's without degradation. In this embodiment, the p-channel pass gate transistor is enabled to transmit the input data on every clock cycle. These low power data transmission circuits achieve substantial power savings by avoiding unnecessary charging and discharging of the pass gate transistors' gate capacitance on every clock cycle.
    • 一种用于数字数据的低功率传输的方法和装置。 低功率数据传输电路包括传输输入数据的并行连接的n沟道CMOS晶体管和p沟道CMOS晶体管的栅极。 为了在第一实施例中降低功率,除了输入数据高(逻辑1)之外,电路禁用并联p沟道栅极晶体管。 需要p沟道栅极晶体管来使逻辑1不劣化。 在第一实施例中,n通道栅极晶体管能够在每个时钟周期上传输输入数据。 在第二实施例中,除了输入数据为低(逻辑0)之外,电路禁止并联n沟道栅极晶体管。 需要n沟道栅极晶体管来使逻辑0无劣化。 在本实施例中,p沟道栅极晶体管能够在每个时钟周期上传输输入数据。 这些低功率数据传输电路通过在每个时钟周期避免不必要的通路栅极晶体管栅极电容的充电和放电来实现显着的功率节省。
    • 4. 发明授权
    • Trace canceller with equalizer adjusted for trace length driving variable-gain amplifier with automatic gain control loop
    • 跟踪消除器,带有自动增益控制回路的跟踪长度驱动可变增益放大器调整均衡器
    • US08675714B2
    • 2014-03-18
    • US12902296
    • 2010-10-12
    • Hung-Yan CheungMichael Y. Zhang
    • Hung-Yan CheungMichael Y. Zhang
    • H03K11/00H04L25/60H04L25/64
    • H04B3/466H04B3/146H04L25/0264H04L25/03878H04L25/03885
    • Distortions of both amplitude and phase along a transmission line are compensated for by a trace canceller inserted between a transmitter and a receiver. The trace canceller has an equalizer that compensates for a trace length between the transmitter and the trace canceller. A variable gain amplifier between the equalizer and an output buffer has its gain controlled by an automatic gain control circuit that compares low-frequency swings of the input and output of the trace canceller. The gain of the variable gain amplifier is reduced to prevent the output buffer from saturating and clipping peak voltages on its output. Thus both the variable gain amplifier and the output buffer remain in the linear region. Training pulses from the transmitter are passed through the trace canceller without clipping of peak voltages, allowing the transmitter and receiver to adjust transmission parameters to best match the transmission line.
    • 沿着传输线的幅度和相位的变形由插入在发射机和接收机之间的跟踪消除器补偿。 跟踪消除器具有补偿发送器和跟踪消除器之间的跟踪长度的均衡器。 均衡器和输出缓冲器之间的可变增益放大器的增益由自动增益控制电路控制,自动增益控制电路比较跟踪消除器的输入和输出的低频摆幅。 降低可变增益放大器的增益,以防止输出缓冲器饱和和削减其输出端的峰值电压。 因此,可变增益放大器和输出缓冲器都保持在线性区域中。 来自发射机的训练脉冲通过跟踪消除器而不削减峰值电压,允许发射机和接收机调整传输参数以最好地匹配传输线路。
    • 6. 发明授权
    • CMOS voltage-controlled oscillator (VCO) with a current-adaptive resistor for improved linearity
    • CMOS压控振荡器(VCO),具有电流自适应电阻,可提高线性度
    • US07015766B1
    • 2006-03-21
    • US10710657
    • 2004-07-27
    • Zhangqi GuoMichael Y. Zhang
    • Zhangqi GuoMichael Y. Zhang
    • H03B5/04H03B5/24
    • H03K5/133H03K2005/00032H03L7/0891H03L7/0995H03L7/18
    • A voltage-controlled oscillator (VCO) for a phase-locked loop (PLL) has improved bandwidth and performance at lower frequency. A variable current source supplies a current to an internal oscillator-power node. The current varies with the VCO input voltage. The internal oscillator-power node drives the sources of p-channel transistors in inverter stages in the ring oscillator. The variable current causes the internal oscillator-power node's voltage to vary, which varies the output frequency. An active resistor is in parallel with the ring oscillator. The active resistor has a resistor and an n-channel transistor in series between the oscillator-power node and ground. The n-channel transistor has a fixed bias voltage on its gate and is non-linear. The non-linear effective resistance of the n-channel transistor improves overall linearity of the ring oscillator. The parallel effective resistance of the active resistor lowers overall effective resistance of the ring oscillator. Oscillator bandwidth at lower frequencies improves.
    • 用于锁相环(PLL)的压控振荡器(VCO)在较低频率下具有改善的带宽和性能。 可变电流源向内部振荡器功率节点提供电流。 电流随VCO输入电压而变化。 内部振荡器功率节点驱动环形振荡器中反相器级的p沟道晶体管的源极。 可变电流导致内部振荡器功率节点的电压变化,这会改变输出频率。 一个有源电阻与环形振荡器并联。 有源电阻在振荡器功率节点和地之间串联一个电阻和一个n沟道晶体管。 n沟道晶体管在其栅极上具有固定的偏置电压,并且是非线性的。 n沟道晶体管的非线性有效电阻提高了环形振荡器的整体线性度。 有源电阻的并联有效电阻降低了环形振荡器的总体有效电阻。 较低频率下的振荡器带宽提高。
    • 7. 发明授权
    • In-situ cable unplug detector operating during normal signaling mode
    • 原位电缆拔插检测器在正常信号传输模式下工作
    • US08786291B2
    • 2014-07-22
    • US13218419
    • 2011-08-25
    • Hung-Yan CheungMichael Y. Zhang
    • Hung-Yan CheungMichael Y. Zhang
    • H04B3/46G01R31/02
    • G01R31/021G01R31/026G01R31/04
    • An in-situ unplug detector circuit detects when a cable is disconnected or unplugged. Detection does not have to wait for normal signaling to pause, such at the end of a frame or timeout. Instead, detection occurs during normal signaling. When the cable is disconnected, the transmitter no longer drives the load at the far end of the cable, and thus can drive the near end to a higher high voltage and to a lower low voltage. The increased voltage swing is detected by a detector at the near end that amplifies the transmitter output to the cable. A fast detector has a higher bandwidth and faster response time than a slow detector, and generates a fast detect signal that crosses over a slow detect signal. When the cable is disconnected, the fast detect signal again crosses over the slow detect signal, and decision logic activates an unplug signal.
    • 原位拔插检测器电路检测电缆何时断开或拔下电源。 检测不必等待正常的信令暂停,例如帧或超时结束。 相反,检测发生在正常信令期间。 当电缆断开时,变送器不再驱动电缆远端的负载,从而可将近端驱动到较高的高电压和较低的低电压。 增加的电压摆幅由近端的检测器检测,放大到电缆的发射机输出。 快速检测器具有比慢速检测器更高的带宽和更快的响应时间,并且产生跨越慢速检测信号的快速检测信号。 当电缆断开时,快速检测信号再次超过慢速检测信号,决定逻辑激活拔插信号。
    • 10. 发明授权
    • Re-driver with pre-emphasis injected through a transformer and tuned by an L-C tank
    • 通过变压器注入预加重重新驱动器,并由L-C罐调节
    • US08362813B2
    • 2013-01-29
    • US13071448
    • 2011-03-24
    • Tony YeungMichael Y. Zhang
    • Tony YeungMichael Y. Zhang
    • H03B1/00
    • H03F3/195H03F3/45183H03F2200/541H03F2203/45366H03F2203/45631H03F2203/45702H03F2203/45731H04L25/0272H04L25/0286
    • A re-driver circuit has pre-driver, intermediate, and output stages. Pre-emphasis on the output is generated by the intermediate stage and injected into an output stage. The intermediate stage is a frequency-tuned amplifier that has an inductive-capacitive L-C tank circuit that is tuned to a desired frequency of the output. The intermediate stage does not directly drive the output stage. Instead, an on-chip coupling transformer couples the L-C tank circuit to the output stage. The coupling transformer has a first inductor that is part of the L-C tank circuit in the intermediate stage, and a second inductor that is part of the output stage. Mutual inductance between the first inductor and the second inductor inductively couple a pre-emphasis voltage onto the output. The magnitude of the pre-emphasis can be changed by adjusting current in the intermediate stage.
    • 重新驱动电路具有预驱动器,中间和输出级。 输出的预加重由中间阶段产生并注入输出级。 中间级是调谐放大器,其具有调谐到输出的期望频率的电感 - 电容L-C谐振电路。 中间阶段不直接驱动输出级。 相反,片上耦合变压器将L-C电路耦合到输出级。 耦合变压器具有作为中间级的L-C电路的一部分的第一电感器和作为输出级的一部分的第二电感器。 第一电感和第二电感之间的相互电感将预加重电压感应耦合到输出上。 可以通过调整中间阶段的电流来改变预加重的幅度。