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    • 6. 发明授权
    • Enhancement mode device
    • 增强模式设备
    • US06452221B1
    • 2002-09-17
    • US09668120
    • 2000-09-21
    • Richard LaiRonald W. GrundbacherYaochung ChenMichael E. Barsky
    • Richard LaiRonald W. GrundbacherYaochung ChenMichael E. Barsky
    • H01L31072
    • H01L29/7787
    • An enhancement mode FET device (10) that employs a strained N-doped InAlAs charge shield layer (22) disposed on an intrinsic InAlAs barrier layer (20). A gate metal electrode (38) of the FET device (10) is controllably diffused through a recess (36) into the shield layer (22) to the barrier layer (20). The resulting enhancement mode device (10) provides an excellent Schottky barrier with a high barrier height that inhibits undesirable surface depletion effects through charge shielding by the shield layer (22) in the regions between the recess edge and the gate metal. Minimizing surface depletion effects makes the device more robust by making the surface less sensitive to processing conditions and long-term operation effects.
    • 一种使用设置在本征InAlAs势垒层(20)上的应变N掺杂InAlAs电荷屏蔽层(22)的增强型FET器件(10)。 FET器件(10)的栅极金属电极(38)通过凹部(36)被可控地扩散到屏蔽层(22)中至阻挡层(20)。 所产生的增强模式器件(10)提供具有高势垒高度的优异的肖特基势垒,其通过在凹口边缘和栅极金属之间的区域中的屏蔽层(22)的电荷屏蔽来抑制不期望的表面消耗效应。 通过使表面对加工条件和长期运行效果较不敏感,最小化表面耗尽效应使器件更加坚固。
    • 9. 发明授权
    • Wafer thinning techniques
    • 晶圆薄化技术
    • US06764573B2
    • 2004-07-20
    • US09977158
    • 2001-10-11
    • Richard LaiHarvey N. RogersYaochung ChenMichael E. Barsky
    • Richard LaiHarvey N. RogersYaochung ChenMichael E. Barsky
    • B08B302
    • H01L21/30612H01L21/302H01L21/67086H01L21/67346
    • Apparatuses (10, 100), and methods of using same, for the simultaneous thinning of the backside surfaces of a plurality of semiconductor wafers (W) using a non-crystallographic and uniform etching process, are described. The apparatuses (10, 100) include a fixture (12, 102) having a plurality of horizontal receptacles (14, 16, 18, 20, 104, 106, 108, 110) for receiving the semiconductor wafers (W). The loaded fixtures (12, 102) are then immersed into an etchant solution (36, 146) that is capable of isotropically removing a layer of semiconductor material from the backside surface of the semiconductor wafers (W). The etchant solution (36, 146) is preferably heated to about 40° C.-50° C. and constantly stirred with a magnetic stirring bar (48, 158). Once a sufficient period of time has elapsed, the thinned semiconductor wafers (W) are removed from the etchant solution (36, 146). The apparatuses (10, 100) are capable of simultaneously thinning several semiconductor wafers (V) down to a final thickness of about 25 &mgr;m.
    • 描述了使用非结晶和均匀蚀刻工艺的装置(10,100)及其使用方法,用于同时薄化多个半导体晶片(W)的背面。 装置(10,100)包括具有用于接收半导体晶片(W)的多个水平插座(14,16,18,20,104,106,108,110)的固定装置(12,102)。 然后将装载的固定装置(12,102)浸入能够从半导体晶片(W)的背面各向同性地去除半导体材料层的蚀刻剂溶液(36,146)中。 蚀刻剂溶液(36,146)优选加热至约40℃-50℃,并与磁力搅拌棒(48,158)持续搅拌。 一旦经过足够的时间,就从蚀刻剂溶液(36,146)中除去变薄的半导体晶片(W)。 装置(10,100)能够同时使多个半导体晶片(V)变薄至约25μm的最终厚度。