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    • 2. 发明授权
    • Method of restarting a computer platform
    • 重新启动计算机平台的方法
    • US07962734B2
    • 2011-06-14
    • US11686528
    • 2007-03-15
    • Michael S. AllisonStephen Patrick HackJohn A. Morrison
    • Michael S. AllisonStephen Patrick HackJohn A. Morrison
    • G06F1/24
    • G06F9/4418
    • Provided is a method for restarting a computing platform to a state in which applications run in less time than an initial start, including powering on a computing platform having a plurality of devices; identifying one or more of the devices which are not critical to running applications; storing information about the non-critical devices; restarting the computing platform; retrieving the information about the non-critical devices; disabling the non-critical devices; performing at least one of testing and initialization of at least one device of the plurality of devices that are critical to running the applications before the restart is completed; offloading at least one of testing and initialization of at least one of the non-critical devices; enabling devices which are not non-critical; and enabling the non-critical devices after the restart is completed.
    • 提供了一种用于将计算平台重新启动到应用以比初始开始更少的时间运行的状态的方式,包括为具有多个设备的计算平台供电; 识别对运行应用程序不重要的一个或多个设备; 存储有关非关键设备的信息; 重新启动计算平台; 检索有关非关键设备的信息; 禁用非关键设备; 在重新启动完成之前执行对运行应用程序至关重要的多个设备中的至少一个设备的测试和初始化中的至少一个; 卸载至少一个非关键设备的测试和初始化中的至少一个; 启用不非关键的设备; 并在重新启动完成后启用非关键设备。
    • 3. 发明申请
    • METHOD OF RESTARTING A COMPUTER PLATFORM
    • 重新计算机平台的方法
    • US20080072028A1
    • 2008-03-20
    • US11686528
    • 2007-03-15
    • Michael S. AllisonStephen Patrick HackJohn A. Morrison
    • Michael S. AllisonStephen Patrick HackJohn A. Morrison
    • G06F9/24
    • G06F9/4418
    • Provided is a method for restarting a computing platform to a state in which applications run in less time than an initial start, including powering on a computing platform having a plurality of devices; identifying one or more of the devices which are not critical to running applications; storing information about the non-critical devices; restarting the computing platform; retrieving the information about the non-critical devices; disabling the non-critical devices; performing at least one of testing and initialization of at least one device of the plurality of devices that are critical to running the applications before the restart is completed; offloading at least one of testing and initialization of at least one of the non-critical devices; enabling devices which are not non-critical; and enabling the non-critical devices after the restart is completed.
    • 提供了一种用于将计算平台重新启动到应用以比初始开始更少的时间运行的状态的方式,包括为具有多个设备的计算平台供电; 识别对运行应用程序不重要的一个或多个设备; 存储有关非关键设备的信息; 重新启动计算平台; 检索有关非关键设备的信息; 禁用非关键设备; 在重新启动完成之前执行对运行应用程序至关重要的多个设备中的至少一个设备的测试和初始化中的至少一个; 卸载至少一个非关键设备的测试和初始化中的至少一个; 启用不非关键的设备; 并在重新启动完成后启用非关键设备。
    • 7. 发明授权
    • Apparatus and method for converting interrupt transactions to interrupt signals to distribute interrupts to IA-32 processors
    • 将中断事务转换为中断信号以将中断分配给IA-32处理器的装置和方法
    • US06625679B1
    • 2003-09-23
    • US09294927
    • 1999-04-19
    • John A. MorrisonMichael S. AllisonLeo J. Embry
    • John A. MorrisonMichael S. AllisonLeo J. Embry
    • G06F1324
    • G06F13/4022
    • An apparatus and method for distributing interrupts to Intel® Architecture (IA)-32 processors includes a system bus having a number of nodes. Each node includes a bridge that couples the system bus to a processor bus. The processor bus may include multiple IA-32 processors. The system bus may include any number of nodes. Interrupt transactions appearing on the system bus are converted by the bridge to interrupt signals. The bridge asserts the interrupt signals at one of two pins on a target IA-32 processor. One pin may be programmed to receive non-maskable interrupts and the other pin may be programmed to receive external interrupts. The bridge incorporates a priority and threshold mechanism. The bridge includes a buffer to store pending interrupt signals. The apparatus and method may be used in a mixed IA-32 and IA-64 computer architecture that uses IA-64 components to receive interrupts and uses the bridge to convert the transactions on an IA-64 bus into interrupt signal assertions to an IA-32 processor.
    • 用于向Intel(R)架构(IA)-32处理器分配中断的装置和方法包括具有多个节点的系统总线。 每个节点包括将系统总线耦合到处理器总线的桥。 处理器总线可以包括多个IA-32处理器。 系统总线可以包括任何数量的节点。 系统总线上出现的中断事务由桥转换为中断信号。 桥接器将目标IA-32处理器的两个引脚之一置为中断信号。 一个引脚可能被编程为接收不可屏蔽的中断,另一个引脚可能被编程为接收外部中断。 桥梁结合了优先级和阈值机制。 该桥包括一个用于存储未决中断信号的缓冲器。 该装置和方法可以在使用IA-64组件接收中断的混合IA-32和IA-64计算机体系结构中使用,并使用该桥将IA-64总线上的事务转换为IA- 32处理器。
    • 8. 发明授权
    • Option ROM code acquisition
    • 选件ROM代码采集
    • US07539832B2
    • 2009-05-26
    • US10923905
    • 2004-08-23
    • Stephen SilvaJohn A. MorrisonMichael S. Allison
    • Stephen SilvaJohn A. MorrisonMichael S. Allison
    • G06F12/00
    • G06F9/4411
    • Systems, methodologies, media, and other embodiments associated with acquiring processor executable instructions from an option ROM are described. One exemplary method embodiment includes discovering input/output devices operably connected to a processor and updating a data structure with information concerning the input/output devices. The example method embodiment may also include obtaining a device driver from an option ROM associated with an input/output device, storing the device driver in non-MMIO memory and making the device driver available to input/output devices physically connected to the processor and for which information is stored in the data structure.
    • 描述了与从选项ROM获取处理器可执行指令相关联的系统,方法,介质和其他实施例。 一个示例性方法实施例包括发现可操作地连接到处理器的输入/输出设备,并且利用关于输入/输出设备的信息来更新数据结构。 示例性方法实施例还可以包括从与输入/输出设备相关联的选项ROM中获取设备驱动程序,将设备驱动程序存储在非MMIO存储器中,并使得设备驱动程序可用于物理连接到处理器的输入/输出设备 哪些信息存储在数据结构中。
    • 9. 发明授权
    • Apparatus and method for delivering interrupts via an APIC bus to IA-32 processors
    • 通过APIC总线将中断传送到IA-32处理器的装置和方法
    • US06470408B1
    • 2002-10-22
    • US09292131
    • 1999-04-14
    • John A. MorrisonRobert J. BlakelyLeo J. EmbryMichael S. Allison
    • John A. MorrisonRobert J. BlakelyLeo J. EmbryMichael S. Allison
    • G06F1324
    • G06F13/24
    • An apparatus and a method are provided to distribute interrupts from a system bus to Intel® Architecture (IA)-32 applications processors. The apparatus includes a bridge that couples a processor bus to the system bus. In addition, the bridge is coupled to an advanced programmable interrupt controller (APIC) by an APIC bus. The bridge monitors the system bus for interrupts and converts selected interrupt transactions into APIC messages. The bridge then sends the APIC messages to the APIC bus. Each of the applications processors is also coupled to one of many APIC buses. The applications processor that is the target of the interrupt transaction receives the APIC message and executes an interrupt handler routine. The apparatus and method also incorporate interrupt transaction buffering and throttling.
    • 提供了一种装置和方法来将中断从系统总线分配到Intel(R)Architecture(IA)-32应用处理器。 该装置包括将处理器总线耦合到系统总线的桥。 此外,桥接器通过APIC总线耦合到高级可编程中断控制器(APIC)。 桥接器监视系统总线进行中断,并将所选中断事务转换为APIC消息。 然后桥接器将APIC消息发送到APIC总线。 每个应用处理器也耦合到许多APIC总线之一。 作为中断事务的目标的应用处理器接收APIC消息并执行中断处理程序。 该装置和方法还包括中断事务缓冲和限制。