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    • 4. 发明授权
    • N-drive or P-drive VCSEL array
    • N驱动或P驱动VCSEL阵列
    • US6069908A
    • 2000-05-30
    • US20724
    • 1998-02-09
    • Albert T. YuenMichael R. T. TanChun Lei
    • Albert T. YuenMichael R. T. TanChun Lei
    • H01S5/00H01S5/02H01S5/042H01S5/183H01S5/187H01S5/42H01S3/19
    • H01S5/183H01S5/423H01S5/0208H01S5/0422
    • A VCSEL that is adapted to the fabrication of an array of VCSELs. A VCSEL array according to the present invention includes first and second VCSELs for generating light of a predetermined wavelength. Each VCSEL includes a bottom reflector comprising an epitaxial layer of a semiconductor of a first conductivity type, a light generation region and a top reflector comprising a semiconductor of a second conductivity type. A bottom electrode is electrically connected to the bottom reflector, and a top electrode is electrically connected to the top reflector. The bottom electrode is grown on top of a buffer layer having an electrical conductivity less than a predetermined value and a crystalline structure that permits epitaxial growth of the bottom reflector on the buffer layer. The buffer layer may be grown on top of a substrate or be the substrate itself in the case in which a substrate having sufficiently low conductivity is utilized. The bottom reflector of each of the VCSELs is in contact with the top of the buffer layer. The first and second VCSELs are electrically isolated from one another by a trench extending into the buffer layer. The buffer layer is constructed from a material having resistivity that is sufficiently low to prevent cross-talk between the first and second VCSELs.
    • 适用于制造VCSEL阵列的VCSEL。 根据本发明的VCSEL阵列包括用于产生预定波长的光的第一和第二VCSEL。 每个VCSEL包括底部反射器,其包括第一导电类型的半导体的外延层,发光区域和包括第二导电类型的半导体的顶部反射器。 底部电极电连接到底部反射器,并且顶部电极电连接到顶部反射器。 底部电极生长在具有小于预定值的电导率的缓冲层的顶部上,并且允许底部反射器在缓冲层上外延生长的晶体结构。 在使用具有足够低的导电性的基板的情况下,可以在衬底的顶部生长缓冲层或者作为衬底本身。 每个VCSEL的底部反射器与缓冲层的顶部接触。 第一和第二VCSEL通过延伸到缓冲层中的沟槽彼此电隔离。 缓冲层由具有足够低的电阻率的材料构成,以防止第一和第二VCSEL之间的串扰。
    • 5. 发明授权
    • N-drive, p-common light-emitting devices fabricated on an n-type
substrate and method of making same
    • 在n型衬底上制造的N驱动p普通发光器件及其制造方法
    • US5892787A
    • 1999-04-06
    • US635838
    • 1996-04-22
    • Michael R. T. TanAlbert T. YuenShih-Yuan WangGhulam HasnainYu-Min Houng
    • Michael R. T. TanAlbert T. YuenShih-Yuan WangGhulam HasnainYu-Min Houng
    • H01S5/00H01L33/00H01L33/30H01S5/042H01S5/183H01S5/30H01S5/42H01S3/19
    • H01L33/30H01L33/0016H01L33/0062H01S5/18308H01S5/0207H01S5/0421H01S5/18305H01S5/2059H01S5/2063H01S5/3054H01S5/3095H01S5/423
    • A substantially n-type substrate structure having a p-type surface for use in semiconductor devices as a substitute for a p-type semiconductor substrate. The substrate structure comprises a substrate region and a buffer region. The substrate region is a region of n-type compound semiconductor, and includes a degeneratively n-doped portion adjacent its first surface. The buffer region is a region of compound semiconductor doped with a p-type dopant. The buffer region is located on the first surface of the substrate region and includes a surface remote from the substrate region that provides the p-type surface of the substrate structure. The buffer region also includes a degeneratively p-doped portion adjacent the degeneratively n-doped portion of the substrate region. The substrate structure includes a tunnel junction between the degeneratively n-doped portion of the substrate region and the degeneratively p-doped portion of the buffer region. The substrate structure is made by degeneratively doping a substrate region of n-type compound semiconductor material adjacent its first surface with an n-type impurity, and depositing a layer of compound semiconductor material doped with a p-type impurity on the first surface of the substrate region to form a buffer region that includes a surface remote from the substrate region. In the course of depositing the compound semiconductor material to form the buffer region, the compound semiconductor material is degeneratively doped with the p-type impurity at least in a portion adjacent the substrate region to form a tunnel junction between the substrate region and the buffer region.
    • 具有用于半导体器件的p型表面作为p型半导体衬底的替代物的基本为n型衬底结构。 衬底结构包括衬底区域和缓冲区域。 衬底区域是n型化合物半导体的区域,并且包括与其第一表面相邻的退化的n-掺杂部分。 缓冲区是掺杂有p型掺杂剂的化合物半导体的区域。 缓冲区域位于衬底区域的第一表面上并且包括远离衬底区域的表面,该表面提供衬底结构的p型表面。 缓冲区还包括与衬底区域的退化的n掺杂部分相邻的退化的p掺杂部分。 衬底结构包括在衬底区域的退化的n掺杂部分和缓冲区域的退化的p掺杂部分之间的隧道结。 衬底结构是通过用n型杂质将邻近其第一表面的n型化合物半导体材料的衬底区域简单地掺杂制成的,并且在第一表面上沉积掺杂有p型杂质的化合物半导体材料层 衬底区域以形成包括远离衬底区域的表面的缓冲区域。 在沉积化合物半导体材料以形成缓冲区的过程中,化合物半导体材料至少在与衬底区域相邻的部分中被p型杂质退变掺杂以在衬底区域和缓冲区域之间形成隧道结 。