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1. 发明授权

US07193544B1 Parallel, adaptive delta sigma ADC 失效
标题翻译：并行，自适应Δ西格玛ADC
公开(公告)号：US07193544B1
公开(公告)日：2007-03-20
申请号：US11220712
申请日：2005-09-08
申请人： Michael M. Fitelson , Aaron Pesetski , Alfred P. Turley
发明人： Michael M. Fitelson , Aaron Pesetski , Alfred P. Turley
IPC分类号： H03M3/00
CPC分类号： H03M3/396 , H03M3/388 , H03M3/468
摘要： An apparatus performs adaptive analog-to-digital conversion. The apparatus according to one embodiment comprises a frequency modulator unit for changing an input analog signal into a modulated analog signal with a frequency spectrum in a bandwidth of interest, a parallel delta sigma conversion unit operatively connected to the frequency modulator unit, the parallel delta sigma conversion unit converting the modulated analog signal into a digital signal, and a controller operatively connected to the frequency modulator unit and the parallel delta sigma conversion unit, the controller adjusting at least one parameter relating to a frequency characteristic of the frequency modulator unit and/or the parallel delta sigma conversion unit.
摘要翻译：一种装置执行自适应模数转换。根据一个实施例的装置包括：频率调制器单元，用于将输入的模拟信号改变成具有感兴趣带宽中的频谱的经调制的模拟信号，可操作地连接到频率调制器单元的并行ΔΣ转换单元，并行Δ西格玛转换单元将调制的模拟信号转换为数字信号，以及可操作地连接到频率调制器单元和并行ΔΣ转换单元的控制器，所述控制器调整与频率调制器单元的频率特性相关的至少一个参数和/或并行ΔΣ转换单元。

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