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1. 发明授权

US08129253B2 Providing current control over wafer borne semiconductor devices using trenches 有权
标题翻译：提供使用沟槽的晶圆传输半导体器件的电流控制
公开(公告)号：US08129253B2
公开(公告)日：2012-03-06
申请号：US10486780
申请日：2002-08-12
申请人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
发明人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
IPC分类号： H01L21/76
CPC分类号： G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
摘要： Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
摘要翻译：公开了一种用于向具有衬底（1520），至少一个有源层（1565）和表面层（1510）的半导体晶片（1500）提供晶片寄生电流控制的方法以及形成在所述表面层上的电触头（1515）（1510）。可以通过在电触点周围形成沟槽（1525）来实现电流控制，其中电触点和相关层限定电子装置。绝缘植入物（1530）可以放置在沟槽（1525）中，并且可以在电子触点（1515）之间形成牺牲层（1540）。沟槽通过促进在有源（例如，导电）区域（1560）内的电流流动并阻止电流通过非活性（例如非导电）区域（1550）来控制电流。还公开了半导体器件的晶片级老化（WLBI）的方法和系统。使用WLBI方法和系统时，晶圆级的电流控制很重要。

2. 发明授权

US07662650B2 Providing photonic control over wafer borne semiconductor devices 有权
标题翻译：提供晶圆传导半导体器件的光子控制
公开(公告)号：US07662650B2
公开(公告)日：2010-02-16
申请号：US10486666
申请日：2002-08-12
申请人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
发明人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
IPC分类号： H01L21/66 , H01L21/00 , G01R31/26
CPC分类号： G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
摘要： Disclosed are methods for providing wafer photonic flow control to a semiconductor wafer (1700) having a substrate (1720), at least one active layer (1765) and at least one surface layer (1710). Photonic flow control can be achieved through the formation of trenches (1725) and/or insulating implants (1730) formed in said wafer (1700), whereby active regions (1760) are defined by trenches (1725) that operate as nonconductive areas (1750). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Photonic flow control at the wafer level is important when using WLBI methods and systems.
摘要翻译：公开了用于向具有衬底（1720），至少一个有源层（1765）和至少一个表面层（1710）的半导体晶片（1700）提供晶片光子流控制的方法。可以通过形成在所述晶片（1700）中形成的沟槽（1725）和/或绝缘植入物（1730）来实现光子流控制，由此有源区域（1760）由作为非导电区域（1750）的沟槽（1725）限定）。还公开了半导体器件的晶片级老化（WLBI）的方法和系统。使用WLBI方法和系统时，晶圆级的光子流量控制很重要。

3. 发明授权

US08039277B2 Providing current control over wafer borne semiconductor devices using overlayer patterns 有权
标题翻译：使用覆盖图案提供对晶圆传输半导体器件的电流控制
公开(公告)号：US08039277B2
公开(公告)日：2011-10-18
申请号：US10486665
申请日：2002-08-12
申请人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
发明人： Michael J. Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
IPC分类号： G01R31/26 , H01L21/66
CPC分类号： G01R31/2856 , G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
摘要： Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1240) having a substrate (1240), at least one active layer (1240) and at least one surface layer (1240), Current control can be achieved through the formation of patterns (1240) surrounding contacts (1215), said patterns (1240) including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (1215). Current flows through active regions (1260) associated with said contacts (1215) and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
摘要翻译：公开了用于向具有衬底（1240），至少一个有源层（1240）和至少一个表面层（1240）的半导体晶片（1240）提供晶片寄生电流控制的方法，电流控制可以通过形成围绕触点（1215）的图案（1240），所述图案（1240）包括在由所述触点（1215）表示的有源器件之间形成的绝缘植入物和/或牺牲层。电流流过与所述触点（1215）和有源器件相关联的有源区（1260）。还公开了半导体器件的晶片级老化（WLBI）的方法和系统。使用WLBI方法和系统时，晶圆级的电流控制很重要。

4. 发明申请

US20100264511A1 PROVIDING CURRENT CONTROL OVER WAFER BORNE SEMICONDUCTOR DEVICES USING TRENCHES 有权
标题翻译：通过使用TRENCHES的波形BORNE半导体器件提供电流控制
公开(公告)号：US20100264511A1
公开(公告)日：2010-10-21
申请号：US10486780
申请日：2002-08-12
申请人： Michael J Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
发明人： Michael J Haji-Sheikh , James R. Biard , James K. Guenter , Bobby M. Hawkins
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
摘要： Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a sub-state (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
摘要翻译：公开了一种用于向具有子状态（1520），至少一个有源层（1565）和表面层（1510）的半导体晶片（1500）提供晶片寄生电流控制的方法，以及形成在所述表面层（1510）。可以通过在电触点周围形成沟槽（1525）来实现电流控制，其中电触点和相关层限定电子装置。绝缘植入物（1530）可以放置在沟槽（1525）中，并且可以在电子触点（1515）之间形成牺牲层（1540）。沟槽通过促进在有源（例如，导电）区域（1560）内的电流流动并阻止电流通过非活性（例如非导电）区域（1550）来控制电流。还公开了半导体器件的晶片级老化（WLBI）的方法和系统。使用WLBI方法和系统时，晶圆级的电流控制很重要。

5. 发明授权

US07700379B2 Methods of conducting wafer level burn-in of electronic devices 有权
标题翻译：进行电子器件晶圆级老化的方法
公开(公告)号：US07700379B2
公开(公告)日：2010-04-20
申请号：US10486661
申请日：2002-08-12
申请人： Michael J. Haji-Sheikh , James R. Biard , Simon Rabinovich , James K. Guenter , Bobby M. Hawkins
发明人： Michael J. Haji-Sheikh , James R. Biard , Simon Rabinovich , James K. Guenter , Bobby M. Hawkins
IPC分类号： H01L21/66 , G01R31/26
CPC分类号： G01R31/2874 , H01S5/0021 , H01S5/02461 , H01S5/183
摘要： Methods of conducting wafer level burn-in (WLBI) of semiconductor devices are presented wherein systems are provided having at least two electrodes (210, 215). Electrical bias (920) and/or thermal power (925) is applied on each side of a wafer (100) having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer (910) is described for supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system (950) is also described for enabling the application of a uniform temperature to a wafer undergoing burn-in. Wafer level burn-in is performed by applying electrical and physical contact (915) using an upper contact plate to individual contacts for the semiconductor devices; applying electrical and physical contact using a lower contact plate (910) to a substrate surface of said semiconductor wafer; providing electrical power (920) to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates; monitoring and controlling electrical power (935) to said semiconductor devices for a period in accordance with a specified burn-in criteria; removing electrical power at completion of said period (955); and removing electrical and physical contact to said semiconductor wafer (965).
摘要翻译：提供了进行半导体器件的晶片级老化（WLBI）的方法，其中提供具有至少两个电极（210,215）的系统。电晶体（920）和/或热功率（925）施加在具有由晶片承载的半导体器件的背面和前部电触头的晶片（100）的每一侧上。描述了一种柔性导电层（910），用于在具有电接触的晶片的器件侧上提供引脚和/或用于为施加到其表面的机械压力提供对晶片的保护。还描述了使用冷却系统（950），以使得能够对经历老化的晶片施加均匀的温度。通过使用上接触板向半导体器件的单个触点施加电和物理接触（915）来执行晶片级老化; 使用下接触板（910）将电和物理接触施加到所述半导体晶片的衬底表面; 通过所述上和下第二接触板从耦合到所述上和下接触板的电源向所述半导体器件提供电力（920）; 根据指定的老化标准对所述半导体器件监测和控制电力（935）一段时间; 在所述期间完成时移除电力（955）; 以及去除与所述半导体晶片（965）的电和物理接触。

6. 发明授权

US07190184B2 Systems for wafer level burn-in of electronic devices 有权
标题翻译：电子设备晶圆级老化系统
公开(公告)号：US07190184B2
公开(公告)日：2007-03-13
申请号：US10486672
申请日：2002-08-12
申请人： Michael J. Haji-Sheikh , James R. Biard , Simon Rabinovich , James K. Guenter , Bobby M. Hawkins
发明人： Michael J. Haji-Sheikh , James R. Biard , Simon Rabinovich , James K. Guenter , Bobby M. Hawkins
IPC分类号： G01R31/02
CPC分类号： G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
摘要： In one example, a wafer level burn-in system includes a first electrode plate for providing electrical contact simultaneously to contacts of a group of semiconductor devices borne by a semiconductor wafer on a device surface of the semiconductor wafer. A second electrode plate is employed for providing electrical contact to a substrate surface of the semiconductor wafer. Finally, an electrical power generator is employed for providing electrical power to the group of semiconductor devices through the contacts and the substrate of the semiconductor wafer through the first and second electrode plates.
摘要翻译：在一个示例中，晶片级老化系统包括第一电极板，用于同时向半导体晶片的器件表面上由半导体晶片承载的一组半导体器件的触点提供电接触。使用第二电极板来提供与半导体晶片的衬底表面的电接触。最后，采用电力发生器通过第一和第二电极板通过触点和半导体晶片的衬底向半导体器件组提供电力。

7. 发明授权

US08031752B1 VCSEL optimized for high speed data 有权
标题翻译： VCSEL针对高速数据进行了优化
公开(公告)号：US08031752B1
公开(公告)日：2011-10-04
申请号：US12340286
申请日：2008-12-19
申请人： Ralph H. Johnson , James K. Guenter , James R. Biard
发明人： Ralph H. Johnson , James K. Guenter , James R. Biard
IPC分类号： H01S5/00
CPC分类号： H01S5/18358 , H01S5/18311 , H01S5/18344 , H01S5/18361 , H01S5/305 , H01S5/3077 , H01S5/3211
摘要： A Vertical Cavity Surface Emitting Laser (VCSEL) is optimized for longer life of the VCSEL by controlling the distance of doped and undoped layers near an active region. In addition, the VCSEL optimized for reduced parasitic lateral current under an oxide of the VCSEL by forming a high Al confinement region and placing the oxide at a null in a standing optical wave. Further, the VCSEL is optimized to reduce resistance.
摘要翻译：垂直腔表面发射激光器（VCSEL）通过控制有源区域附近的掺杂层和未掺杂层的距离来优化VCSEL的更长寿命。此外，VCSEL通过形成高Al限制区域并将氧化物置于无效的静态光波中而优化用于在VCSEL的氧化物下降低的寄生横向电流。此外，VCSEL被优化以降低电阻。

8. 发明授权

US07920612B2 Light emitting semiconductor device having an electrical confinement barrier near the active region 有权
标题翻译：在有源区附近具有电限制屏障的发光半导体器件
公开(公告)号：US07920612B2
公开(公告)日：2011-04-05
申请号：US11461353
申请日：2006-07-31
申请人： Ralph H. Johnson , James R. Biard , James K. Guenter
发明人： Ralph H. Johnson , James R. Biard , James K. Guenter
IPC分类号： H01S5/00 , H01S5/183 , H01S5/323
CPC分类号： H01S5/18358 , B82Y20/00 , H01L33/105 , H01S5/18311 , H01S5/3054 , H01S5/3211 , H01S5/3432
摘要： Light emitting semiconductor devices such as VCSELs, SELs, and LEDs are manufactured to have a thin electrical confinement barrier in a confining layer near the active region of the device. The thin confinement barrier comprises a III-V semiconductor material having a high aluminum content (e.g. 80%-100% of the type III material). The aluminum content of the adjacent spacer layer is lower than that of the confinement barrier. In one embodiment the spacer layer has an aluminum content of less than 40% and a direct bandgap. The aluminum profile reduces series resistance and improves the efficiency of the semiconductor device.
摘要翻译：制造诸如VCSEL，SEL和LED的发光半导体器件在靠近器件的有源区域的约束层中具有薄的电限制屏障。薄限制屏障包括具有高铝含量（例如III型材料的80％-100％）的III-V半导体材料。相邻间隔层的铝含量低于限制屏障的铝含量。在一个实施方案中，间隔层具有小于40％的铝含量和直接的带隙。铝型材降低了串联电阻并提高了半导体器件的效率。

9. 发明授权

US07403553B2 Absorbing layers for reduced spontaneous emission effects in an integrated photodiode 有权
标题翻译：吸收层，用于降低集成光电二极管中的自发发射效应
公开(公告)号：US07403553B2
公开(公告)日：2008-07-22
申请号：US11026095
申请日：2004-12-30
申请人： James K. Guenter , Jimmy A. Tatum , James R. Biard
发明人： James K. Guenter , Jimmy A. Tatum , James R. Biard
IPC分类号： H01S5/00
CPC分类号： H01S5/18308 , H01S5/0264 , H01S5/0425 , H01S5/18311 , H01S5/18313 , H01S5/1835 , H01S5/18358 , H01S5/2022 , H01S5/2027 , H01S5/3054 , H01S5/3095 , H01S2301/02
摘要： An optical structure that reduces the effects of spontaneous emissions from the active region of a laser. An optical structure includes optimizations to reduce the effects of spontaneous emissions. The optical structure includes a VCSEL with top and bottom DBR mirrors and an active region connected to the mirrors. The optical structure further includes a photodiode connected to the VCSEL. One or more optimizations may be included in the optical structure including optically absorbing materials, varying the geometry of the structure to change reflective angles, using optical apertures, changing the reflectivity of one or more mirrors, changing the photodiode to be more impervious to spontaneous emissions, and using ion implants to reduce photoluminescence efficiency.
摘要翻译：一种降低激光器有源区自发发射效应的光学结构。光学结构包括优化以减少自发辐射的影响。光学结构包括具有顶部和底部DBR反射镜的VCSEL和连接到反射镜的有源区域。光学结构还包括连接到VCSEL的光电二极管。可以在光学结构中包括一个或多个优化，包括光学吸收材料，改变结构的几何形状以改变反射角度，使用光学孔径，改变一个或多个反射镜的反射率，将光电二极管改变为对自发辐射更为不透明，并使用离子注入来降低光致发光效率。

10. 发明授权

US07801199B2 Vertical cavity surface emitting laser with photodiode having reduced spontaneous emissions 有权
标题翻译：具有减少自发辐射的光电二极管的垂直腔表面发射激光器
公开(公告)号：US07801199B2
公开(公告)日：2010-09-21
申请号：US11026495
申请日：2004-12-30
申请人： James K. Guenter , Jimmy A. Tatum , James R. Biard
发明人： James K. Guenter , Jimmy A. Tatum , James R. Biard
IPC分类号： H01S5/00
CPC分类号： H01S5/0264 , H01S5/0422 , H01S5/18308 , H01S5/18313 , H01S5/1835 , H01S5/18358 , H01S5/3095 , H01S2301/02
摘要： An optical structure that reduces the effects of spontaneous emissions from the active region of a laser. An optical structure includes optimizations to reduce the effects of spontaneous emissions. The optical structure includes a VCSEL with top and bottom DBR mirrors and an active region connected to the mirrors. The optical structure further includes a photodiode connected to the VCSEL. One or more optimizations may be included in the optical structure including optically absorbing materials, varying the geometry of the structure to change reflective angles, using optical apertures, changing the reflectivity of one or more mirrors, changing the photodiode to be more impervious to spontaneous emissions, and using ion implants to reduce photoluminescence efficiency.
摘要翻译：一种降低激光器有源区自发发射效应的光学结构。光学结构包括优化以减少自发辐射的影响。光学结构包括具有顶部和底部DBR反射镜的VCSEL和连接到反射镜的有源区域。光学结构还包括连接到VCSEL的光电二极管。可以在光学结构中包括一个或多个优化，包括光学吸收材料，改变结构的几何形状以改变反射角度，使用光学孔径，改变一个或多个反射镜的反射率，将光电二极管改变为对自发辐射更为不透明，并使用离子注入来降低光致发光效率。

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