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1. 发明申请

US20060184769A1 Localized generation of global flush requests while guaranteeing forward progress of a processor 审中-公开
标题翻译：本地化的全局刷新请求，同时保证处理器的进度
公开(公告)号：US20060184769A1
公开(公告)日：2006-08-17
申请号：US11056692
申请日：2005-02-11
申请人： Michael Floyd , Hung Le , Larry Leitner , Brian Thompto
发明人： Michael Floyd , Hung Le , Larry Leitner , Brian Thompto
IPC分类号： G06F9/40
CPC分类号： G06F9/3867 , G06F9/3814 , G06F9/3836 , G06F9/3859
摘要： Localized generation of global flush requests while providing a means for increasing the likelihood of forward progress in a controlled fashion. Local hazard (error) detection is accomplished with a trigger network situated between execution units and configurable state machines that track trigger events. Once a hazardous state is detected, a local detection mechanism requests a workaround flush from the flush control logic. The processor is flushed and a centralized workaround control is informed of the workaround flush. The centralized control blocks subsequent workaround flushes until forward progress has been made. The centralized control can also optionally send out a control to activate a set of localized workarounds or reduced performance modes to avoid the hazardous condition once instructions are re-executed after the flush until a configurable amount of forward progress has been made.
摘要翻译：本地化的全球冲刷请求，同时提供了一种增加以受控方式推进进展的可能性的手段。本地危险（错误）检测是通过位于执行单元和跟踪触发事件的可配置状态机之间的触发网络完成的。一旦检测到危险状态，本地检测机制就会从刷新控制逻辑请求解决冲突。处理器被刷新，并且通知了一个集中的解决方法控制措施。集中式控制块后续的解决方法会刷新，直到进行进一步的进展。集中式控制还可以选择性地发送控制以激活一组本地化的解决方案或降低的性能模式，以避免在冲洗之后重新执行指令直到可配置的前进进度为止的危险状况。

2. 发明申请

US20060184770A1 Method of implementing precise, localized hardware-error workarounds under centralized control 审中-公开
标题翻译：在集中控制下实施精确的本地化硬件错误解决方法的方法
公开(公告)号：US20060184770A1
公开(公告)日：2006-08-17
申请号：US11056878
申请日：2005-02-12
申请人： James Bishop , Michael Floyd , Hung Le , Larry Leitner , Brian Thompto
发明人： James Bishop , Michael Floyd , Hung Le , Larry Leitner , Brian Thompto
IPC分类号： G06F9/40
CPC分类号： G06F11/0793 , G06F11/0721
摘要： In a processor, a localized workaround is activated upon the sensing of a problematic condition occurring on said processor, and then control of the deactivation of the localized workaround is superseded by a centralized controller. In a preferred embodiment, the centralized controller monitors forward progress of the processor and maintains the workaround in an active condition until a threshold level of forward progress has occurred. Optionally, the localized workaround may be re-activated while under centralized control, resetting the notion of forward progress. Using the present invention, localized workarounds perform effectively while having a minimal impact on processor performance.
摘要翻译：在处理器中，当感测到在所述处理器上发生的有问题的状况时激活本地化解决方案，然后由集中式控制器取代对本地化解决方案的停用的控制。在优选实施例中，集中控制器监视处理器的前进进程，并将解决方案维持在活动状态，直到发生了前进进程的阈值级别。可选地，本地化的解决方法可以在集中控制的情况下被重新激活，重置前进进程的概念。使用本发明，本地化的解决方法在对处理器性能具有最小影响的同时有效地执行。

3. 发明申请

US20060184771A1 Mini-refresh processor recovery as bug workaround method using existing recovery hardware 审中-公开
标题翻译：微型刷新处理器恢复作为使用现有恢复硬件的错误解决方法
公开(公告)号：US20060184771A1
公开(公告)日：2006-08-17
申请号：US11055823
申请日：2005-02-11
申请人： Michael Floyd , Larry Leitner , Sheldon Levenstein , Scott Swaney , Brian Thompto
发明人： Michael Floyd , Larry Leitner , Sheldon Levenstein , Scott Swaney , Brian Thompto
IPC分类号： G06F9/30
CPC分类号： G06F9/3863 , G06F9/3851
摘要： A method in a data processing system for avoiding a microprocessor's design defects and recovering a microprocessor from failing due to design defects, the method comprised of the following steps: The method detects and reports of events which warn of an error. Then the method locks a current checkpointed state and prevents instructions not checkpointed from checkpointing. After that, the method releases checkpointed state stores to a L2 cache, and drops stores not checkpointed. Next, the method blocks interrupts until recovery is completed. Then the method disables the power savings states throughout the processor. After that, the method disables an instruction fetch and an instruction dispatch. Next, the method sends a hardware reset signal. Then the method restores selected registers from the current checkpointed state. Next, the method fetches instructions from restored instruction addresses. Then the method resumes a normal execution after a programmable number of instructions.
摘要翻译：一种用于避免微处理器设计缺陷并由于设计缺陷而使微处理器故障恢复的数据处理系统中的方法，该方法包括以下步骤：该方法检测并报告发生错误的事件。然后，该方法锁定当前的检查点状态，并防止从检查点进行检查点的指令。之后，该方法将检查点状态存储发送到L2缓存，并且将不检查点丢弃存储。接下来，该方法将阻止中断，直到恢复完成。然后该方法将禁用整个处理器的省电状态。之后，该方法禁用指令提取和指令分派。接下来，该方法发送硬件复位信号。然后，该方法将从当前检查点状态恢复所选寄存器。接下来，该方法从恢复的指令地址获取指令。然后，该方法在可编程指令数量之后恢复正常执行。

4. 发明申请

US20060184832A1 Method and apparatus for achieving high cycle/trace compression depth by adding width 审中-公开
标题翻译：通过增加宽度实现高循环/跟踪压缩深度的方法和装置
公开(公告)号：US20060184832A1
公开(公告)日：2006-08-17
申请号：US11055801
申请日：2005-02-11
申请人： Michael Floyd , Larry Leitner
发明人： Michael Floyd , Larry Leitner
IPC分类号： G06F11/00
CPC分类号： G01R31/318335 , G01R13/0254
摘要： A trace array with added width is provided. Each trace array entry includes a data portion and a side counter portion. When a programmable subset of trace data repeats, a side counter is incremented. When the programmable subset of the trace data stops repeating, the trace data and the side counter value are stored in the trace array. The trace array may also include a larger counter. In this implementation, if the smaller side counter reaches its maximum value, a larger counter may begin counting. The larger counter value may then be stored in its own trace array entry instead of the trace data. A predetermined side counter value may mark the entry as a larger compression counter instead of as a data entry.
摘要翻译：提供添加宽度的跟踪数组。每个迹线阵列条目包括数据部分和侧部计数器部分。当跟踪数据的可编程子集重复时，边计数器递增。当跟踪数据的可编程子集停止重复时，跟踪数据和边计数器值存储在跟踪数组中。跟踪阵列还可以包括较大的计数器。在该实现中，如果较小的侧计数器达到其最大值，则较大的计数器可开始计数。然后可以将较大的计数器值存储在其自己的跟踪数组条目中，而不是跟踪数据。预定的侧计数器值可以将条目标记为更大的压缩计数器而不是数据条目。

5. 发明申请

US20060179289A1 Intelligent SMT thread hang detect taking into account shared resource contention/blocking 有权
标题翻译：智能SMT线程挂机检测考虑到共享资源争用/阻塞
公开(公告)号：US20060179289A1
公开(公告)日：2006-08-10
申请号：US11055044
申请日：2005-02-10
申请人： Michael Floyd , Larry Leitner
发明人： Michael Floyd , Larry Leitner
IPC分类号： G06F9/44
CPC分类号： G06F9/3851 , G06F9/3012 , G06F9/30123 , G06F9/3013 , G06F9/3842 , G06F9/3867 , G06F11/0715 , G06F11/0721 , G06F11/0757 , G06F11/1407
摘要： Monitoring is performed to detect a hang condition. A timer is set to detect a hang based on a core hang limit. If a thread hangs for the duration of the core hang limit, then a core hang is detected. If the thread is performing an external memory transaction, then the timer is increased to a longer memory hang limit. If the thread is waiting for a shared resource, then the timer may be increased to the longer memory hang limit if another thread or, more particularly, the thread blocking the resource has a pending memory transaction. Responsive to detecting a hang condition, instructions dispatched to the plurality of execution units may be flushed, or the processor may be reset and restored to a previously known good, checkpointed architected state.
摘要翻译：执行监视以检测挂起状况。一个定时器被设置为基于核心挂起限制来检测挂起。如果线程在核心挂起限制的持续时间内挂起，则会检测到核心挂起。如果线程正在执行外部存储器事务，则定时器增加到更长的内存挂起限制。如果线程正在等待共享资源，则如果另一个线程，更具体地说，阻塞资源的线程具有未决的存储器事务，则定时器可能会增加到更长的内存挂起限制。响应于检测挂起状况，可以刷新发送到多个执行单元的指令，或者可以将处理器复位并恢复到先前已知的良好的，检查点的架构状态。

6. 发明申请

US20060179251A1 Method and apparatus to operate cache-inhibited memory mapped commands to access registers 失效
标题翻译：用于操作缓存禁止的存储器映射命令以访问寄存器的方法和装置
公开(公告)号：US20060179251A1
公开(公告)日：2006-08-10
申请号：US11055160
申请日：2005-02-10
申请人： James Fields , Michael Floyd , Paul Lecocq , Larry Leitner , Kevin Reick
发明人： James Fields , Michael Floyd , Paul Lecocq , Larry Leitner , Kevin Reick
IPC分类号： G06F13/28
CPC分类号： G06F9/3885 , G06F9/30003 , G06F9/30101 , G06F9/30181 , G06F12/0888
摘要： In a multiprocessor environment, by executing cache-inhibited reads or writes to registers, a scan communication is used to rapidly access registers inside and outside a chip originating the command. Cumbersome locking of the memory location may be thus avoided. Setting of busy latches at the outset virtually eliminates the chance of collisions, and status bits are set to inform the requesting core processor that a command is done and free of error, if that is the case.
摘要翻译：在多处理器环境中，通过对寄存器执行高速缓存禁止读或写操作，使用扫描通信来快速访问发起命令的芯片内外的寄存器。因此可以避免存储器位置的繁琐的锁定。一开始就设置忙锁实际上消除了冲突的机会，并且设置状态位以通知请求的核心处理器完成命令并且没有错误，如果是这样的话。

7. 发明申请

US20060184840A1 Using timebase register for system checkstop in clock running environment in a distributed nodal environment 审中-公开
标题翻译：在分布式节点环境中的时钟运行环境中使用系统checkstop的时基寄存器
公开(公告)号：US20060184840A1
公开(公告)日：2006-08-17
申请号：US11055827
申请日：2005-02-11
申请人： Michael Floyd , Larry Leitner
发明人： Michael Floyd , Larry Leitner
IPC分类号： G06F11/00
CPC分类号： G06F11/0793 , G06F11/0724
摘要： A mechanism is provided for determining a cause of a primary error in a complex communications topology without clockstop. A time of day register, or another synchronized register, is provided in each node of the topology for another existing purpose. When an error is encountered, a copy of the register is captured and frozen. The node with the lowest value in the register is determined to be the node that saw the error first. With the copy of the register frozen, the system can continue to function using the time of day register. For the case of determining the cause of primary error for system checkstop only, the actual register may be frozen, providing a solution without requiring the addition of latches to the design.
摘要翻译：提供了一种用于在没有时钟抑制的情况下确定复杂通信拓扑中的主要错误的原因的机制。在拓扑的每个节点中提供了一天的时间寄存器或另一个同步寄存器，用于另一个现有的目的。当遇到错误时，会捕获并冻结该寄存器的副本。寄存器中具有最低值的节点被确定为首先看到错误的节点。随着寄存器的复制冻结，系统可以使用时间寄存器继续运行。对于仅确定系统检查停止原因的原因，实际寄存器可能被冻结，提供解决方案，而不需要在设计中添加锁存器。

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