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1. 发明授权

US07368394B2 Etch methods to form anisotropic features for high aspect ratio applications 失效
标题翻译：蚀刻方法来形成高纵横比应用的各向异性特征
公开(公告)号：US07368394B2
公开(公告)日：2008-05-06
申请号：US11363834
申请日：2006-02-27
申请人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
发明人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/76802 , H01L21/32137 , H01L21/76814
摘要： Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
摘要翻译：在本发明中提供了用于在蚀刻工艺中形成用于高纵横比应用的各向异性特征的方法。本文描述的方法通过侧壁钝化管理方案有利地促进具有高纵横比的特征的轮廓和尺寸控制。在一个实施例中，通过在蚀刻层的侧壁和/或底部选择性地形成氧化钝化层来管理侧壁钝化。在另一个实施例中，通过周期性地清除覆盖层再沉积层以在其上保持均匀且均匀的钝化层来管理侧壁钝化。均匀和均匀的钝化允许以在衬底上的高和低特征密度区域中具有临界尺寸的期望深度和垂直分布的方式来逐渐蚀刻具有高纵横比的特征，而不产生缺陷和/或过蚀刻下面层。

2. 发明申请

US20080057729A1 ETCH METHODS TO FORM ANISOTROPIC FEATURES FOR HIGH ASPECT RATIO APPLICATIONS 审中-公开
标题翻译： ETCH方法形成高度比例应用的各向异性特征
公开(公告)号：US20080057729A1
公开(公告)日：2008-03-06
申请号：US11926531
申请日：2007-10-29
申请人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
发明人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
IPC分类号： H01L21/465
CPC分类号： H01L21/76802 , H01L21/32137 , H01L21/76814
摘要： Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
摘要翻译：在本发明中提供了用于在蚀刻工艺中形成用于高纵横比应用的各向异性特征的方法。本文描述的方法通过侧壁钝化管理方案有利地促进具有高纵横比的特征的轮廓和尺寸控制。在一个实施例中，通过在蚀刻层的侧壁和/或底部选择性地形成氧化钝化层来管理侧壁钝化。在另一个实施例中，通过周期性地清除覆盖层再沉积层以在其上保持均匀且均匀的钝化层来管理侧壁钝化。均匀和均匀的钝化允许以在衬底上的高和低特征密度区域中具有临界尺寸的期望深度和垂直分布的方式来逐渐蚀刻具有高纵横比的特征，而不产生缺陷和/或过蚀刻下面层。

3. 发明申请

US20070202700A1 Etch methods to form anisotropic features for high aspect ratio applications 审中-公开
标题翻译：蚀刻方法来形成高纵横比应用的各向异性特征
公开(公告)号：US20070202700A1
公开(公告)日：2007-08-30
申请号：US11363789
申请日：2006-02-27
申请人： Uwe Leucke , Meihua Shen , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
发明人： Uwe Leucke , Meihua Shen , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
IPC分类号： H01L21/302 , C23F1/00
CPC分类号： C23F4/00 , H01L21/3065 , H01L21/3086 , H01L21/31116 , H01L21/31122 , H01L21/32136 , H01L21/32137 , H01L21/32139
摘要： Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
摘要翻译：在本发明中提供了用于在蚀刻工艺中形成用于高纵横比应用的各向异性特征的方法。本文描述的方法通过侧壁钝化管理方案有利地促进具有高纵横比的特征的轮廓和尺寸控制。在一个实施例中，通过在蚀刻层的侧壁和/或底部选择性地形成氧化钝化层来管理侧壁钝化。在另一个实施例中，通过周期性地清除覆盖层再沉积层以在其上保持均匀且均匀的钝化层来管理侧壁钝化。均匀和均匀的钝化允许以在衬底上的高和低特征密度区域中具有临界尺寸的期望深度和垂直分布的方式来逐渐蚀刻具有高纵横比的特征，而不产生缺陷和/或过蚀刻下面层。

4. 发明申请

US20070199922A1 Etch methods to form anisotropic features for high aspect ratio applications 失效
公开(公告)号：US20070199922A1
公开(公告)日：2007-08-30
申请号：US11363834
申请日：2006-02-27
申请人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
发明人： Meihua Shen , Uwe Leucke , Guangxiang Jin , Xikun Wang , Wei Liu , Scott Williams
IPC分类号： H01L21/461 , B44C1/22 , H01L21/302
CPC分类号： H01L21/76802 , H01L21/32137 , H01L21/76814
摘要： Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.

5. 发明申请

US20070224813A1 Device and method for etching flash memory gate stacks comprising high-k dielectric 有权
标题翻译：用于蚀刻包括高k电介质的闪存存储器栅极堆叠的器件和方法
公开(公告)号：US20070224813A1
公开(公告)日：2007-09-27
申请号：US11386054
申请日：2006-03-21
申请人： Meihua Shen , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
发明人： Meihua Shen , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
IPC分类号： C23F1/00 , H01L21/302
CPC分类号： H01L21/32136 , H01L21/31116
摘要： In one implementation, a method is provided capable of etching a wafer to form devices including a high-k dielectric layer. The method includes etching an upper conductive material layer in a first plasma chamber with a low cathode temperature, transferring the wafer to a second chamber without breaking vacuum, etching a high-k dielectric layer in the second chamber, and transferring the wafer from the second chamber to the first plasma chamber without breaking vacuum. A lower conductive material layer is etched with a low cathode temperature in the first chamber. In one implementation, the high-k dielectric etch is a plasma etch using a high temperature cathode. In another implementation, the high-k dielectric etch is a reactive ion etch.
摘要翻译：在一个实施方式中，提供了能够蚀刻晶片以形成包括高k电介质层的器件的方法。该方法包括在具有低阴极温度的第一等离子体室中蚀刻上导电材料层，将晶片转移到第二室而不破坏真空，蚀刻第二室中的高k电介质层，以及从第二室转移晶片室到第一等离子体室，而不破坏真空。在第一室中以低阴极温度蚀刻下导电材料层。在一个实施方案中，高k电介质蚀刻是使用高温阴极的等离子体蚀刻。在另一个实施方案中，高k电介质蚀刻是反应离子蚀刻。

6. 发明授权

US07780862B2 Device and method for etching flash memory gate stacks comprising high-k dielectric 有权
标题翻译：用于蚀刻包括高k电介质的闪存存储器栅极堆叠的器件和方法
公开(公告)号：US07780862B2
公开(公告)日：2010-08-24
申请号：US11386054
申请日：2006-03-21
申请人： Meihua Shen , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
发明人： Meihua Shen , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
IPC分类号： H01L21/302
CPC分类号： H01L21/32136 , H01L21/31116
摘要： In one implementation, a method is provided capable of etching a wafer to form devices including a high-k dielectric layer. The method includes etching an upper conductive material layer in a first plasma chamber with a low cathode temperature, transferring the wafer to a second chamber without breaking vacuum, etching a high-k dielectric layer in the second chamber, and transferring the wafer from the second chamber to the first plasma chamber without breaking vacuum. A lower conductive material layer is etched with a low cathode temperature in the first chamber. In one implementation, the high-k dielectric etch is a plasma etch using a high temperature cathode. In another implementation, the high-k dielectric etch is a reactive ion etch.
摘要翻译：在一个实施方式中，提供了能够蚀刻晶片以形成包括高k电介质层的器件的方法。该方法包括在具有低阴极温度的第一等离子体室中蚀刻上导电材料层，将晶片转移到第二室而不破坏真空，蚀刻第二室中的高k电介质层，以及从第二室转移晶片室到第一等离子体室，而不破坏真空。在第一室中以低阴极温度蚀刻下导电材料层。在一个实施方案中，高k电介质蚀刻是使用高温阴极的等离子体蚀刻。在另一个实施方案中，高k电介质蚀刻是反应离子蚀刻。

7. 发明申请

US20080011423A1 DEVICE AND METHOD FOR ETCHING FLASH MEMORY GATE STACKS COMPRISING HIGH-K DIELECTRIC 审中-公开
标题翻译：用于蚀刻包含高K电介质的闪存存储器栅极堆叠的装置和方法
公开(公告)号：US20080011423A1
公开(公告)日：2008-01-17
申请号：US11777714
申请日：2007-07-13
申请人： MEIHUA SHEN , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
发明人： MEIHUA SHEN , Xikun Wang , Wei Liu , Yan Du , Shashank Deshmukh
IPC分类号： C23F1/00
CPC分类号： H01L21/32136 , H01L21/31116
摘要： In one implementation, a method for etching a flash memory high-k gate stack on a workpiece is provided which includes etching a conductive material layer in a low temperature plasma chamber and etching a high-k dielectric layer in a high temperature plasma chamber. The workpiece is transferred between the low temperature plasma chamber and the high temperature plasma chamber through a vacuum transfer chamber connecting the low temperature plasma chamber and the high temperature plasma chamber. In one embodiment, an integrated etch station for etching a high-k flash memory structure is provided, which includes an etch chamber configured for plasma etch processing of a conductive material layer connected via a transfer chamber to an etch chamber configured for plasma etch processing of a high-k dielectric layer.
摘要翻译：在一个实施方案中，提供了一种用于蚀刻工件上的闪存高k栅极堆叠的方法，其包括在低温等离子体室中蚀刻导电材料层并蚀刻高温等离子体室中的高k电介质层。工件通过连接低温等离子体室和高温等离子体室的真空传送室在低温等离子体室和高温等离子体室之间传递。在一个实施例中，提供了用于蚀刻高k闪速存储器结构的集成蚀刻站，其包括蚀刻室，其被配置用于经由传送室连接到导电材料层的等离子体蚀刻处理到蚀刻室，所述蚀刻室被配置用于等离子体蚀刻处理高k电介质层。

8. 发明授权

US10658161B2 Method and apparatus for reducing particle defects in plasma etch chambers 有权
公开(公告)号：US10658161B2
公开(公告)日：2020-05-19
申请号：US13174090
申请日：2011-06-30
申请人： Xikun Wang , Andrew Nguyen , Changhun Lee , Xiaoming He , Meihua Shen
发明人： Xikun Wang , Andrew Nguyen , Changhun Lee , Xiaoming He , Meihua Shen
IPC分类号： H01L21/3213 , H01J37/32
摘要： In-situ low pressure chamber cleans and gas nozzle apparatus for plasma processing systems employing in-situ deposited chamber coatings. Certain chamber clean embodiments for conductor etch applications include an NF3-based plasma clean performed at pressures below 30 mT to remove in-situ deposited SiOx coatings from interior surfaces of a gas nozzle hole. Embodiments include a gas nozzle with bottom holes dimensioned sufficiently small to reduce or prevent the in-situ deposited chamber coatings from building up a SiOx deposits on interior surfaces of a nozzle hole.

9. 发明申请

US20070042601A1 Method for etching high dielectric constant materials 有权
标题翻译：蚀刻高介电常数材料的方法
公开(公告)号：US20070042601A1
公开(公告)日：2007-02-22
申请号：US11208573
申请日：2005-08-22
申请人： Xikun Wang , Wei Liu , Yan Du , Mei Shen
发明人： Xikun Wang , Wei Liu , Yan Du , Mei Shen
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31116 , H01L27/115 , H01L27/11521
摘要： In one implementation, a method is provided for etching a high k dielectric material in a plasma etch reactor, the method comprising plasma etching the high k dielectric material with a first plasma gas reactant mixture having BCl3. The high k dielectric material may include Al2O3 in a stack having a silicon layer. The etching may include supplying a passivation gas, for example C2H4, and may further include supplying a diluent gas such as a noble gas, for example He. In some implementations, the etching may be performed with a reactive ion etch process.
摘要翻译：在一个实施方案中，提供了一种用于蚀刻等离子体蚀刻反应器中的高k电介质材料的方法，该方法包括用具有BCl 3 3的第一等离子体气体反应物混合物等离子体蚀刻高k电介质材料。高k电介质材料可以包括具有硅层的叠层中的Al 2 O 3 N 3。蚀刻可以包括提供钝化气体，例如C 2 H 4 H 4，并且还可以包括提供稀释气体，例如惰性气体，例如He。在一些实施方案中，蚀刻可以用反应离子蚀刻工艺进行。

10. 发明授权

US07964512B2 Method for etching high dielectric constant materials 有权
标题翻译：蚀刻高介电常数材料的方法
公开(公告)号：US07964512B2
公开(公告)日：2011-06-21
申请号：US11208573
申请日：2005-08-22
申请人： Xikun Wang , Wei Liu , Yan Du , Mei Hua Shen
发明人： Xikun Wang , Wei Liu , Yan Du , Mei Hua Shen
IPC分类号： H01L21/302
CPC分类号： H01L21/31116 , H01L27/115 , H01L27/11521
摘要： In one implementation, a method is provided for etching a high k dielectric material in a plasma etch reactor, the method comprising plasma etching the high k dielectric material with a first plasma gas reactant mixture having BCl3. The high k dielectric material may include Al2O3 in a stack having a silicon layer. The etching may include supplying a passivation gas, for example C2H4, and may further include supplying a diluent gas such as a noble gas, for example He. In some implementations, the etching may be performed with a reactive ion etch process.
摘要翻译：在一个实施方案中，提供了一种用于在等离子体蚀刻反应器中蚀刻高k电介质材料的方法，该方法包括用具有BCl 3的第一等离子体气体反应物混合物等离子体蚀刻高k电介质材料。高k介电材料可以包括具有硅层的堆叠中的Al 2 O 3。蚀刻可以包括提供钝化气体，例如C2H4，并且还可以包括提供稀释气体，例如惰性气体，例如He。在一些实施方案中，蚀刻可以用反应离子蚀刻工艺进行。

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