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1. 发明公开

EP3951870A1 METHOD FOR FORMING A FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP3951870A1
公开(公告)日：2022-02-09
申请号：EP21195647.9
申请日：2017-02-10
申请人： MEDIATEK Inc.
发明人： LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , LIU, Nai-Wei , HUANG, Wei-Che
IPC分类号： H01L25/16 , H01L25/10 , H01L23/498 , H01L23/31 , H01L21/56
摘要： A method for forming a semiconductor package structure, comprises: forming a first RDL structure on a carrier substrate, wherein the first RDL structure ( 110 ) has a first surface and a second surface opposite thereto and the second surface of the first RDL structure ( 110 ) is attached to the carrier substrate; forming a plurality of solder structures (120') on the first surface of the first RDL structure ( 110 ); mounting a first semiconductor die ( 300 ) and a first electronic component ( 400 ) onto the first surface of the first RDL structure ( 110 ), wherein the first semiconductor die ( 300 ) is electrically coupled to the plurality of solder structures through the first RDL structure; forming a first molding compound ( 130 ) on the first surface of the first RDL structure, such that the first semiconductor die ( 300 ) and the plurality of solder structures are embedded in the first molding compound ( 130 ); forming a plurality of openings ( 130 a) in the first molding compound ( 130 ) to correspondingly expose the plurality of solder structures; removing the carrier substrate from the first RDL structure; and mounting a second electronic component ( 500 ) onto the second surface of the first RDL structure after removing the carrier substrate.
Fig. 3 D

2. 发明公开

EP3104409A2 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体封装组件及其形成方法
公开(公告)号：EP3104409A2
公开(公告)日：2016-12-14
申请号：EP16166593.0
申请日：2016-04-22
申请人： MediaTek, Inc
发明人： LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen
IPC分类号： H01L23/538 , H01L25/16 , H01L25/10 , H01L21/60 , H01L21/56
CPC分类号： H01L25/16 , H01L21/568 , H01L21/78 , H01L23/49811 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/16145 , H01L2224/16265 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73209 , H01L2224/73253 , H01L2224/73265 , H01L2224/73267 , H01L2224/81815 , H01L2224/92124 , H01L2224/92225 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/37001 , H01L2924/014 , H01L2924/00012 , H01L2224/83 , H01L2224/81 , H01L2924/00
摘要： A semiconductor package assembly is provided. The semiconductor package assembly includes a semiconductor package. The semiconductor package includes a semiconductor die (100). A redistribution layer (RDL) structure (230) is disposed on the semiconductor die and is electrically connected to the semiconductor die. An active (140) or passive element (150) is disposed between the semiconductor die and the RDL structure. A molding compound (220) surrounds the semiconductor die and the active or passive element.
摘要翻译：提供半导体封装组件。该半导体封装组件包括半导体封装。该半导体封装包括半导体管芯（100）。再分布层（RDL）结构（230）设置在半导体管芯上并电连接到半导体管芯。有源（140）或无源元件（150）设置在半导体管芯和RDL结构之间。模塑料（220）围绕半导体管芯和有源或无源元件。

3. 发明公开

EP3091573A2 SEMICONDUCTOR CHIP PACKAGE ASSEMBLY WITH IMPROVED HEAT DISSIPATION PERFORMANCE 审中-公开
标题翻译： HALBLEITER-CHIPPACKUNGSANORDNUNG MIT VERBESSERTERWÄRMEABLEITUNGSLEISTUNG
公开(公告)号：EP3091573A2
公开(公告)日：2016-11-09
申请号：EP16161852.5
申请日：2016-03-23
申请人： MediaTek, Inc
发明人： HSIAO, Ching-Wen , LIN, Tzu-Hung , PENG, I-Hsuan , HSIEH, Tung-Hsien , CHANG, Sheng-Ming
IPC分类号： H01L25/16 , H01L25/10 , H01L23/538 , H01L23/34 , H01L23/50
CPC分类号： H01L23/3675 , H01L23/3114 , H01L23/3121 , H01L23/3677 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/49894 , H01L23/50 , H01L23/5389 , H01L24/06 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L2224/02373 , H01L2224/0401 , H01L2224/04105 , H01L2224/05572 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/16055 , H01L2224/16057 , H01L2224/16227 , H01L2224/16265 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2224/92125 , H01L2225/06517 , H01L2225/0652 , H01L2225/06524 , H01L2225/06589 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/00014 , H01L2924/10253 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19104 , H01L2924/00012 , H01L2924/014 , H01L2224/45015 , H01L2924/207 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor chip package assembly (1) includes a package substrate (200) having a chip mounting surface (200a); a plurality of solder pads (212) disposed on the chip mounting surface; a first dummy pad (211) and a second dummy pad (211) spaced apart from the first dummy pad disposed on the chip mounting surface; a solder mask (202) on the chip mounting surface and partially covering the solder pads, the first dummy pad, and the second dummy pad; a chip package (100) mounted on the chip mounting surface and electrically connected to the package substrate through a plurality of solder balls (250) on respective said solder pads (212); a discrete device (150)having a first terminal (151) and a second terminal (152) disposed between the chip package and the package substrate; a first solder (154) connecting the first terminal with the first dummy pad (211) and the chip package (100); and a second solder (154) connecting the second terminal (152) with the second dummy pad (211) and the chip package (100).
摘要翻译：半导体芯片封装组件（1）包括具有芯片安装表面（200a）的封装衬底（200）; 设置在所述芯片安装表面上的多个焊盘（212）; 与设置在芯片安装表面上的第一虚拟焊盘间隔开的第一虚拟焊盘（211）和第二虚拟焊盘（211）; 在芯片安装表面上的焊接掩模（202），并且部分地覆盖焊盘，第一虚拟焊盘和第二虚拟焊盘; 芯片封装（100），其安装在所述芯片安装表面上并且通过在所述焊盘（212）上的多个焊球（250）电连接到所述封装基板; 具有设置在所述芯片封装和所述封装基板之间的第一端子（151）和第二端子（152）的分立器件（150）将第一端子与第一虚拟焊盘（211）和芯片封装（100）连接的第一焊料（154）; 以及将第二端子（152）与第二虚拟焊盘（211）和芯片封装（100）连接的第二焊料（154）。

4. 发明公开

EP4006969A3 STACKED FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP4006969A3
公开(公告)日：2022-12-28
申请号：EP22150096.0
申请日：2016-09-01
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/538 , H01L23/31 , H01L21/60 , H01L25/03 , H01L21/56
摘要： The invention refers to semiconductor package structure (10) comprising a first semiconductor die (100) having a first surface and a second surface opposite thereto, a first molding compound (102) surrounding the first semiconductor die, a first redistribution layer (RDL) structure (104) disposed on the second surface of the first semiconductor die and laterally extending on the first molding compound, a second semiconductor die (200) disposed via an adhesion layer (203) on the first RDL structure having a first surface and a second surface opposite thereto, a second molding compound (202) surrounding the second semiconductor die, a second RDL structure (204) disposed on the second surface (200b) of the second semiconductor die (200) and laterally extending on the second molding compound (202); and a first protective layer (202a) covering a sidewall of the first RDL structure and a sidewall of the first molding compound he first protective layer is an extending portion (202a) of the second molding compound (202), wherein the semiconductor package structure (10; 20; 40) further comprises a backside film (500) disposed on the first surface (100a) of the first semiconductor die (100), and wherein the extending portion (202a) conformally extends along the sidewall (104a) of the first RDL structure (104) and the sidewall (102a) of the first molding compound (102) to the backside film (500), thereby entirely covering the sidewall of the first RDL structure (104) and the sidewall of the first molding compound (102).

5. 发明公开

EP4006969A2 STACKED FAN-OUT PACKAGE STRUCTURE 审中-实审
公开(公告)号：EP4006969A2
公开(公告)日：2022-06-01
申请号：EP22150096.0
申请日：2016-09-01
申请人： MediaTek Inc.
发明人： LIU, Nai-Wei , LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/538 , H01L23/31 , H01L21/60 , H01L21/56
摘要： The invention refers to semiconductor package structure (10) comprising a first semiconductor die (100) having a first surface and a second surface opposite thereto, a first molding compound (102) surrounding the first semiconductor die, a first redistribution layer (RDL) structure (104) disposed on the second surface of the first semiconductor die and laterally extending on the first molding compound, a second semiconductor die (200) disposed via an adhesion layer (203) on the first RDL structure having a first surface and a second surface opposite thereto, a second molding compound (202) surrounding the second semiconductor die, a second RDL structure (204) disposed on the second surface (200b) of the second semiconductor die (200) and laterally extending on the second molding compound (202); and a first protective layer (202a) covering a sidewall of the first RDL structure and a sidewall of the first molding compound he first protective layer is an extending portion (202a) of the second molding compound (202), wherein the semiconductor package structure (10; 20; 40) further comprises a backside film (500) disposed on the first surface (100a) of the first semiconductor die (100), and wherein the extending portion (202a) conformally extends along the sidewall (104a) of the first RDL structure (104) and the sidewall (102a) of the first molding compound (102) to the backside film (500), thereby entirely covering the sidewall of the first RDL structure (104) and the sidewall of the first molding compound (102).

6. 发明公开

EP3154083A3 FAN-OUT PACKAGE STRUCTURE HAVING EMBEDDED PACKAGE SUBSTRATE 有权
标题翻译：具有嵌入式封装基板的扇出封装结构
公开(公告)号：EP3154083A3
公开(公告)日：2017-07-26
申请号：EP16186286.7
申请日：2016-08-30
申请人： MediaTek Inc.
发明人： LIN, Tzu-Hung , LIEN, Chi-Chin , LIU, Nai-Wei , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/498 , H01L25/10
CPC分类号： H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/00
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.
摘要翻译：提供了一种半导体封装结构。该半导体封装结构包括第一半导体封装，该第一半导体封装包括具有第一表面和与其相对的第二表面的第一半导体管芯第一封装衬底设置在第一半导体管芯的第一表面上。第一模塑料围绕第一半导体管芯和第一封装衬底。第一重新分布层（RDL）结构设置在第一模塑料上，其中第一封装衬底插入并且电耦合在第一半导体管芯和第一RDL结构之间。

7. 发明公开

EP3154083A2 FAN-OUT PACKAGE STRUCTURE HAVING EMBEDDED PACKAGE SUBSTRATE 有权
标题翻译：风扇包装STR UR UR UR AT AT AT AT AT AT AT AT AT AT AT AT AT
公开(公告)号：EP3154083A2
公开(公告)日：2017-04-12
申请号：EP16186286.7
申请日：2016-08-30
申请人： MediaTek Inc.
发明人： LIN, Tzu-Hung , LIEN, Chi-Chin , LIU, Nai-Wei , PENG, I-Hsuan , HSIAO, Ching-Wen , HUANG, Wei-Che
IPC分类号： H01L23/498 , H01L25/10
CPC分类号： H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/5389 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/00
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.
摘要翻译：提供半导体封装结构。半导体封装结构包括第一半导体封装，其包括具有第一表面和与其相对的第二表面的第一半导体管芯。第一封装基板设置在第一半导体管芯的第一表面上。第一模制化合物围绕第一半导体管芯和第一封装衬底。第一再分配层（RDL）结构设置在第一模塑料上，其中插入第一封装衬底并电耦合在第一半导体管芯和第一RDL结构之间。

8. 发明公开

EP3104409A3 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译： HALBLEITERGEHÄUSEANORDNUNGUND VERFAHREN ZUR FORMUNG DAVON
公开(公告)号：EP3104409A3
公开(公告)日：2017-03-01
申请号：EP16166593.0
申请日：2016-04-22
申请人： MediaTek, Inc
发明人： LIN, Tzu-Hung , PENG, I-Hsuan , HSIAO, Ching-Wen
IPC分类号： H01L23/538 , H01L25/16 , H01L25/10 , H01L21/60 , H01L21/56
CPC分类号： H01L25/16 , H01L21/568 , H01L21/78 , H01L23/49811 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/16145 , H01L2224/16265 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73209 , H01L2224/73253 , H01L2224/73265 , H01L2224/73267 , H01L2224/81815 , H01L2224/92124 , H01L2224/92225 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/37001 , H01L2924/014 , H01L2924/00012 , H01L2224/83 , H01L2224/81 , H01L2924/00
摘要： A semiconductor package assembly is provided. The semiconductor package assembly includes a semiconductor package. The semiconductor package includes a semiconductor die (100). A redistribution layer (RDL) structure (230) is disposed on the semiconductor die and is electrically connected to the semiconductor die. An active (140) or passive element (150) is disposed between the semiconductor die and the RDL structure. A molding compound (220) surrounds the semiconductor die and the active or passive element.
摘要翻译：提供半导体封装组件。半导体封装组件包括半导体封装。半导体封装包括半导体管芯（100）。再分配层（RDL）结构（230）设置在半导体管芯上并与半导体管芯电连接。在半导体管芯和RDL结构之间设置有源（140）或无源元件（150）。模制化合物（220）围绕半导体管芯和有源或无源元件。

9. 发明公开

EP3091573A3 SEMICONDUCTOR CHIP PACKAGE ASSEMBLY WITH IMPROVED HEAT DISSIPATION PERFORMANCE 审中-公开
标题翻译：具有更好的散热功率半导体芯片封装布局
公开(公告)号：EP3091573A3
公开(公告)日：2017-02-22
申请号：EP16161852.5
申请日：2016-03-23
申请人： MediaTek, Inc
发明人： HSIAO, Ching-Wen , LIN, Tzu-Hung , PENG, I-Hsuan , HSIEH, Tung-Hsien , CHANG, Sheng-Ming
IPC分类号： H01L25/16 , H01L25/10 , H01L23/538 , H01L23/34 , H01L23/50
CPC分类号： H01L23/3675 , H01L23/3114 , H01L23/3121 , H01L23/3677 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/49894 , H01L23/50 , H01L23/5389 , H01L24/06 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L2224/02373 , H01L2224/0401 , H01L2224/04105 , H01L2224/05572 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/16055 , H01L2224/16057 , H01L2224/16227 , H01L2224/16265 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2224/92125 , H01L2225/06517 , H01L2225/0652 , H01L2225/06524 , H01L2225/06589 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/00014 , H01L2924/10253 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19104 , H01L2924/00012 , H01L2924/014 , H01L2224/45015 , H01L2924/207 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor chip package assembly (1) includes a package substrate (200) having a chip mounting surface (200a); a plurality of solder pads (212) disposed on the chip mounting surface; a first dummy pad (211) and a second dummy pad (211) spaced apart from the first dummy pad disposed on the chip mounting surface; a solder mask (202) on the chip mounting surface and partially covering the solder pads, the first dummy pad, and the second dummy pad; a chip package (100) mounted on the chip mounting surface and electrically connected to the package substrate through a plurality of solder balls (250) on respective said solder pads (212); a discrete device (150)having a first terminal (151) and a second terminal (152) disposed between the chip package and the package substrate; a first solder (154) connecting the first terminal with the first dummy pad (211) and the chip package (100); and a second solder (154) connecting the second terminal (152) with the second dummy pad (211) and the chip package (100).

10. 发明公开

EP3125292A1 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME 有权
标题翻译：半导体封装结构及其形成方法
公开(公告)号：EP3125292A1
公开(公告)日：2017-02-01
申请号：EP16175908.9
申请日：2016-06-23
申请人： MediaTek Inc.
发明人： LIN, Tzu-Hung , HSIAO, Ching-Wen , PENG, I-Hsuan
IPC分类号： H01L23/538 , H01L25/065
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first electronic component on a substrate. The semiconductor package structure also includes a second electronic component stacked on the first electronic component. The active surface of the first electronic component faces the active surface of the second electronic component. The semiconductor package structure further includes a molding compound on the first electronic component and surrounding the second electronic component. In addition, the semiconductor package structure includes a third electronic component stacked on the second electronic component and the molding compound.
摘要翻译：提供了一种半导体封装结构。该半导体封装结构包括衬底上的第一电子部件。半导体封装结构还包括堆叠在第一电子部件上的第二电子部件。第一电子部件的有效表面面向第二电子部件的有效表面。半导体封装结构还包括在第一电子部件上并围绕第二电子部件的模塑料。此外，半导体封装结构包括堆叠在第二电子部件和模塑料上的第三电子部件。

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