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1. 发明申请

US20090277965A1 SEMICONDUCTOR MEMORY CARD 审中-公开
标题翻译：半导体存储卡
公开(公告)号：US20090277965A1
公开(公告)日：2009-11-12
申请号：US12089825
申请日：2006-10-10
申请人： Masayuki Toyama , Masahiro Nakanishi , Hirofumi Nakagaki , Tomoaki Izumi
发明人： Masayuki Toyama , Masahiro Nakanishi , Hirofumi Nakagaki , Tomoaki Izumi
IPC分类号： G06K19/07
CPC分类号： G11C7/10
摘要： A semiconductor memory card is provided with a transmitting and receiving circuit of a plurality of transmission systems such as a single-end signaling transmitting and receiving unit and a differential signaling transmitting and receiving unit. When power is turned on, each transmitting and receiving unit is turned on. When a command is provided from a host device, a command processing unit judges the transmission system provided in the host device, based on reception results of each circuit. Then, only a transmitting and receiving unit of the system identical to the transmission system used for transmission is turned on, and the subsequent data transmission is performed. Thus, the semiconductor memory card provided with a plurality of transmission systems performs transmission by simply identifying the transmission system provided in the host device.
摘要翻译：半导体存储卡设置有诸如单端信令发送和接收单元和差分信令发送和接收单元的多个传输系统的发送和接收电路。当电源打开时，每个发送和接收单元都打开。当从主机设备提供命令时，命令处理单元基于每个电路的接收结果来判断主机设备中提供的传输系统。然后，只有与用于传输的传输系统相同的系统的发送和接收单元被接通，并且执行后续的数据传输。因此，设置有多个传输系统的半导体存储卡通过简单地识别在主机设备中提供的传输系统来执行传输。

2. 发明授权

US08209504B2 Nonvolatile memory device, nonvolatile memory system, and access device having a variable read and write access rate 有权
标题翻译：非易失性存储器件，非易失性存储器系统和具有可变读取和写入访问速率的访问设备
公开(公告)号：US08209504B2
公开(公告)日：2012-06-26
申请号：US12523756
申请日：2008-01-25
申请人： Masahiro Nakanishi , Isao Kato , Masayuki Toyama , Tatsuya Adachi , Hirofumi Nakagaki , Takuji Maeda
发明人： Masahiro Nakanishi , Isao Kato , Masayuki Toyama , Tatsuya Adachi , Hirofumi Nakagaki , Takuji Maeda
IPC分类号： G06F13/00
CPC分类号： G06F1/206 , G11C7/04 , G11C16/102
摘要： When an access device accesses a nonvolatile memory device, the nonvolatile memory device or the access device detects or calculates a temperature T of the nonvolatile memory device. A temperature-adaptive control part of the nonvolatile memory device controls an access rate to a nonvolatile memory on the basis of the temperature T. Accordingly, the control part controls the rate so that the temperature T of the nonvolatile memory devices cannot exceed a limit temperature Trisk. In this manner, a nonvolatile memory system can eliminate a risk of a burn when ejecting the semiconductor memory device and can read and write data at a high speed.
摘要翻译：当访问设备访问非易失性存储设备时，非易失性存储设备或访问设备检测或计算非易失性存储设备的温度T. 非易失性存储器件的温度自适应控制部分基于温度T控制对非易失性存储器的访问速率。因此，控制部分控制速率使得非易失性存储器件的温度T不能超过极限温度 Trisk。以这种方式，非易失性存储器系统可以在喷射半导体存储器件时消除燃烧的危险，并且可以高速读取和写入数据。

3. 发明申请

US20090100290A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND DATA WRITING METHOD 审中-公开
标题翻译：存储器控制器，非易失性存储器件，非易失性存储器系统和数据写入方法
公开(公告)号：US20090100290A1
公开(公告)日：2009-04-16
申请号：US12064469
申请日：2006-08-09
申请人： Masahiro Nakanishi , Masayuki Toyama , Manabu Inoue , Hirofumi Nakagaki
发明人： Masahiro Nakanishi , Masayuki Toyama , Manabu Inoue , Hirofumi Nakagaki
IPC分类号： G06F11/20 , G06F12/16
CPC分类号： G11C11/5628 , G11C16/102 , G11C16/105 , G11C29/00
摘要： A nonvolatile memory device comprises a nonvolatile memory and a memory controller. The nonvolatile memory includes the same memory cells striding over a plurality of pages. A page information instruction part has the page structure information of the nonvolatile memory. According to this information, a related page identification part identifies a page (related page) in which the data may change. The relation data stored in the related page are temporarily stored into a save memory before an error occurs, and if an error exists, these relation data are used to repair the data that have changed. By this method, in a memory device using a nonvolatile memory including the same memory cells striding over a plurality of pages, even if an error occurs during data writing, the error is repaired and the reliability can be ensured.
摘要翻译：非易失性存储器件包括非易失性存储器和存储器控制器。非易失性存储器包括跨越多个页面的相同存储器单元。页面信息指示部分具有非易失性存储器的页面结构信息。根据该信息，相关的页面识别部件识别数据可能改变的页面（相关页面）。存储在相关页面中的关系数据在错误发生之前临时存储到保存存储器中，并且如果存在错误，则这些关系数据用于修复已经改变的数据。通过这种方法，在使用包括跨越多个页面的相同存储单元的非易失性存储器的存储器件中，即使在数据写入期间发生错误，也可以修复错误并且可靠性得到确保。

4. 发明申请

US20100023678A1 NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND ACCESS DEVICE 有权
标题翻译：非易失性存储器件，非易失性存储器系统和访问器件
公开(公告)号：US20100023678A1
公开(公告)日：2010-01-28
申请号：US12523756
申请日：2008-01-25
申请人： Masahiro Nakanishi , Isao Kato , Masayuki Toyama , Tatsuya Adachi , Hirofumi Nakagaki , Takuji Maeda
发明人： Masahiro Nakanishi , Isao Kato , Masayuki Toyama , Tatsuya Adachi , Hirofumi Nakagaki , Takuji Maeda
IPC分类号： G06F12/00 , H01L35/00
CPC分类号： G06F1/206 , G11C7/04 , G11C16/102
摘要： When an access device accesses a nonvolatile memory device, the nonvolatile memory device or the access device detects or calculates a temperature T of the nonvolatile memory device. A temperature-adaptive control part of the nonvolatile memory device controls an access rate to a nonvolatile memory on the basis of the temperature T. Accordingly, the control part controls the rate so that the temperature T of the nonvolatile memory devices cannot exceed a limit temperature Trisk. In this manner, a nonvolatile memory system can eliminate a risk of a burn when ejecting the semiconductor memory device and can read and write data at a high speed.
摘要翻译：当访问设备访问非易失性存储设备时，非易失性存储设备或访问设备检测或计算非易失性存储设备的温度T. 非易失性存储器件的温度自适应控制部分基于温度T控制对非易失性存储器的访问速率。因此，控制部分控制速率使得非易失性存储器件的温度T不能超过极限温度 Trisk。以这种方式，非易失性存储器系统可以在喷射半导体存储器件时消除燃烧的危险，并且可以高速读取和写入数据。

5. 发明授权

US07900007B2 Host device, storage device, and method for accessing storage device 有权
标题翻译：主机设备，存储设备和访问存储设备的方法
公开(公告)号：US07900007B2
公开(公告)日：2011-03-01
申请号：US11571592
申请日：2005-06-28
申请人： Masayuki Toyama , Takuji Maeda , Tomoaki Izumi , Shouichi Tsujita , Masahiro Nakanishi , Shinji Inoue
发明人： Masayuki Toyama , Takuji Maeda , Tomoaki Izumi , Shouichi Tsujita , Masahiro Nakanishi , Shinji Inoue
IPC分类号： G06F13/14
CPC分类号： G06F3/0659 , G06F3/0619 , G06F3/0679
摘要： A host device transmits a command from a command transmission unit (101a) along a predetermined command sequence. A storage device (2) receives the command in a command reception unit (202a). An access determination unit (202c) determines the sequence of the command transmitted from the host device (1) and determines that reception of the access to the host device (1) is enabled only when the sequence is identical with a predetermined sequence. Thus, with simple control, it is possible to prevent data destruction by a host device of an old version.
摘要翻译：主机设备沿着预定的命令序列从命令发送单元（101a）发送命令。存储装置（2）在命令接收部（202a）中接收命令。访问确定单元（202c）确定从主机设备（1）发送的命令的顺序，并且确定只有当序列与预定序列相同时，对主机设备（1）的访问的接收才被使能。因此，通过简单的控制，可以防止主机装置破坏老版本的数据。

6. 发明授权

US07702846B2 Memory controller, nonvolatile storage device, nonvolatile storage system, and data writing method 有权
标题翻译：内存控制器，非易失性存储设备，非易失性存储系统和数据写入方式
公开(公告)号：US07702846B2
公开(公告)日：2010-04-20
申请号：US11908715
申请日：2006-03-09
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
IPC分类号： G06F12/12
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G06F2212/1016 , G06F2212/7203
摘要： A nonvolatile storage device is provided with a nonvolatile main storage memory whose erase size is larger than a cluster size, and a buffer, i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer, then, a plurality of data in the buffer are collectively taken out to be stored in the main storage memory. Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory at a high speed.
摘要翻译：非易失性存储装置具有擦除大小大于簇大小的非易失性主存储存储器和缓冲器，即非易失性辅助存储存储器。在将数据写入存储器时，将数据临时存储在缓冲器中，然后将缓冲器中的多个数据共同取出以存储在主存储器中。原始块中的数据保存在主存储器中的写入块中。因此，可以高速地将数据写入主存储存储器。

7. 发明申请

US20080109627A1 Nonvolatile Memory Device And Method For Accessing Nonvolatile Memory Device 审中-公开
标题翻译：非易失性存储器件和用于访问非易失性存储器件的方法
公开(公告)号：US20080109627A1
公开(公告)日：2008-05-08
申请号：US11718965
申请日：2005-11-08
申请人： Masayuki Toyama , Tomoaki Izumi , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masahiro Nakanishi
发明人： Masayuki Toyama , Tomoaki Izumi , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masahiro Nakanishi
IPC分类号： G06F12/00
CPC分类号： G06F13/1647 , G06F12/0607
摘要： The present invention provides a nonvolatile memory device that can be used in combination with a plurality of types of memory controllers that are different in number of banks to be simultaneously accessed, the nonvolatile memory device being also capable of achieving high-speed access.The nonvolatile memory device of the present invention includes: a memory area divided into a plurality of banks from/to which data can be read/written independently; and data registers for storing data that has been read from the memory area or that is to be written to the memory area, the data registers being at least equal in number to the banks, and connections between the banks and the data registers are changed in accordance with the number of banks that are to be simultaneously accessed.
摘要翻译：本发明提供一种非易失性存储器件，其可以与要同时存取的存储体数不同的多种存储器控制器组合使用，非易失性存储器件也能够实现高速存取。本发明的非易失性存储装置包括：分割成可独立读/写数据的多个存储体的存储区域; 以及数据寄存器，用于存储已经从存储器区域读取或要写入存储区域的数据，数据寄存器的数量至少等于存储区，并且存储体和数据寄存器之间的连接被改变为按照同时访问的银行数量。

8. 发明授权

US07962824B2 Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method 有权
标题翻译：存储控制器，非易失性存储器件，非易失性存储器系统和数据写入方法
公开(公告)号：US07962824B2
公开(公告)日：2011-06-14
申请号：US11434494
申请日：2006-05-16
申请人： Masahiro Nakanishi , Manabu Inoue , Masayuki Toyama , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno
发明人： Masahiro Nakanishi , Manabu Inoue , Masayuki Toyama , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno
IPC分类号： G06F11/00
CPC分类号： G11C29/82 , G11C11/5621 , G11C16/04 , G11C2029/0409
摘要： With nonvolatile memory device employing a nonvolatile memory suc h as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.
摘要翻译：采用非易失性存储器的非易失性存储器件成为多值NAND闪速存储器等，其中每个存储器单元保持多个页面中的数据，存在如下问题：如果在写入数据时发生错误，则存储数据在当前页面的同一组中的其他页面中被改变，因此本发明的目的是解决这个问题。在将数据写入非易失性存储器110时，当在特定页面中写入数据时发生错误时，错误页识别部件128识别错误发生的页面的错误类型和物理地址。错误校正器129然后校正属于同一组错误发生页面的其他页面中发生的错误。

9. 发明申请

US20080250188A1 Memory Controller, Nonvolatile Storage, Nonvolatile Storage System, and Memory Control Method 审中-公开
标题翻译：存储控制器，非易失存储，非易失存储系统和存储器控制方法
公开(公告)号：US20080250188A1
公开(公告)日：2008-10-09
申请号：US11722362
申请日：2005-11-17
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masayuki Toyama , Kunihiro Maki
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masayuki Toyama , Kunihiro Maki
IPC分类号： G06F12/16 , G06F12/06
CPC分类号： G06F11/1441 , G06F12/0246 , G06F2212/7201
摘要： A physical area management table (105) and a pointer table (106) are stored in a nonvolatile auxiliary storage memory (107). When a logical-physical conversion table (108) is updated (restored) in a main storage memory (140), the restored area is determined in a re-arrangement way by the pointer table to avoid rewrite concentration on the main storage memory (140). Immediately after data is written in the main storage memory (140), the state of the physical block on the physical area management table (105) is updated. Consequently, even if power interruption occurs, it is possible to reliably judge if the data is valid or not.
摘要翻译：物理区域管理表（105）和指针表（106）被存储在非易失性辅助存储存储器（107）中。当在主存储器（140）中更新（恢复）逻辑物理转换表（108）时，指针表以重新排列的方式确定恢复区域，以避免对主存储器（140）的重写集中）。在数据写入主存储器（140）之后，物理区域管理表（105）的物理块的状态立即被更新。因此，即使发生电力中断，也可以可靠地判断数据是否有效。

10. 发明申请

US20060129749A1 Nonvolatile memory system, nonvolatile memory device, memory controller, access device, and method for controlling nonvolatile memory device 有权
标题翻译：非易失性存储器系统，非易失性存储器件，存储器控制器，存取器件以及用于控制非易失性存储器件的方法
公开(公告)号：US20060129749A1
公开(公告)日：2006-06-15
申请号：US11280810
申请日：2005-11-17
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Shouichi Tsujita , Takuji Maeda , Shinji Inoue , Manabu Inoue , Masayuki Toyama , Keisuke Sakai
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Shouichi Tsujita , Takuji Maeda , Shinji Inoue , Manabu Inoue , Masayuki Toyama , Keisuke Sakai
IPC分类号： G06F12/00
CPC分类号： G06F3/0643 , G06F3/0613 , G06F3/0679
摘要： When a file system control part 155A writes file data into a main memory 142, a file can be easily written continuously and the number of file copy can be decreased at updating a directory entry by writing the file data and a directory entry into different allocation units. In this manner, when using a nonvolatile memory in which physical block size as an erase unit is larger than cluster size, the write performance can be enhanced.
摘要翻译：当文件系统控制部分155A将文件数据写入主存储器142时，可以容易地连续地写入文件，并且可以通过将文件数据和目录条目写入不同的分配来更新目录条目来减少文件拷贝的数量单位。以这种方式，当使用物理块大小作为擦除单位的非易失性存储器大于簇大小时，可以提高写入性能。

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