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1. 发明申请

US20140165462A1 PLANT CULTIVATION METHOD AND PLANT CULTIVATION EQUIPMENT 审中-公开
标题翻译：植物生长方法和植物培养设备
公开(公告)号：US20140165462A1
公开(公告)日：2014-06-19
申请号：US14236192
申请日：2012-08-03
申请人： Masayoshi Shigyo , Hiroshi Suzuki , Naoki Yamauchi , Hironori Ara , Akihiro Shimokawa , Misato Matsumoto , Yuki Tonooka
发明人： Masayoshi Shigyo , Hiroshi Suzuki , Naoki Yamauchi , Hironori Ara , Akihiro Shimokawa , Misato Matsumoto , Yuki Tonooka
IPC分类号： A01G7/04
CPC分类号： A01G7/045 , A01G33/00 , A01H3/02 , C12N1/12 , C12N13/00 , Y02A40/88 , Y02P60/146
摘要： As a plant cultivation method by an artificial light irradiation which is convenient, highly energy efficient, and excellent in growth promoting effect, a plant cultivation method which promotes the plant growth by conducting a step S1 for irradiating a red illuminative light to a plant and a step S2 for irradiating a blue illuminative light to the plant separately and independently of each other within a certain time period. In this plant cultivation method, an extremely remarkable plant growth promoting effect can be obtained by a method as simple as an alternate irradiation with a red illuminative light and a blue illuminative light.
摘要翻译：作为方便，高能效，生长促进效果优异的人造光照射的植物栽培方法，通过进行向植物照射红色照明光的步骤S1来促进植物生长的植物培养方法步骤S2，用于在一定时间段内分别地和独立地照射蓝色照明光。在这种植物栽培方法中，通过与红色照明光和蓝色照明光的交替照射一样简单的方法可以获得非常显着的植物生长促进效果。

2. 发明申请

US20140170733A1 ALGAE CULTIVATION METHOD AND ALGAE CULTIVATION EQUIPMENT 审中-公开
标题翻译： ALGAE培养方法和ALGAE培养设备
公开(公告)号：US20140170733A1
公开(公告)日：2014-06-19
申请号：US14236152
申请日：2012-03-27
申请人： Masayoshi Shigyo , Hiroshi Suzuki , Naoki Yamauchi , Hironori Ara , Akihiro Shimokawa , Misato Matsumoto , Yuki Tonooka
发明人： Masayoshi Shigyo , Hiroshi Suzuki , Naoki Yamauchi , Hironori Ara , Akihiro Shimokawa , Misato Matsumoto , Yuki Tonooka
IPC分类号： C12N1/12
CPC分类号： A01G7/045 , A01G33/00 , A01H3/02 , C12N1/12 , C12N13/00 , Y02A40/88 , Y02P60/146
摘要： As a simple and convenient method for promoting the proliferation of algae, a method for cultivating the algae while conducting a procedure S1 for irradiating a red illuminative light to the algae and a procedure S2 for irradiating a blue illuminative light to the algae separately and independently of each other within a certain time period is provided.
摘要翻译：作为促进藻类增殖的简单方便的方法，在进行用于向藻类照射红色照明光的步骤S1的同时培养藻类的方法以及将蓝色照明光单独照射到藻类的步骤S2 在一定时间段内相互提供。

3. 发明授权

US5243561A Data erasing and re-writing circuit for use in microcomputer integrated circuit device 失效
标题翻译： MICROCOMPUTER集成电路设备中使用的数据擦除和重写电路
公开(公告)号：US5243561A
公开(公告)日：1993-09-07
申请号：US749434
申请日：1991-08-26
申请人： Naoki Yamauchi
发明人： Naoki Yamauchi
IPC分类号： G06F15/78 , G11C7/10 , G11C16/10
CPC分类号： G11C7/1075
摘要： Data in an EEPROM contained in a microcomputer integrated circuit device is erased and re-writing. Upon a detection of a start bit of the data, data of a plurality of bits is accepted in a shift register in response to a clock signal applied from a synchronization circuit. A counter counts clock signals up to the number corresponding to the data of a plurality of bits to inhibit data writing in the shift register. The data accepted in the shift register is temporarily stored as bit parallel data of a plurality of bits in a receiving buffer and selected by a selector to be applied to the EEPROM. The data is written, by a write control circuit, at an address in the EEPROM designated by an address counter.
摘要翻译：包含在微计算机集成电路装置中的EEPROM中的数据被擦除和重写。在检测到数据的起始位时，响应于从同步电路施加的时钟信号，在移位寄存器中接受多个位的数据。计数器将时钟信号计数直到与多个位的数据相对应的数字，以禁止移位寄存器中的数据写入。在移位寄存器中接受的数据被暂时存储在接收缓冲器中的多个位的位并行数据，并由选择器选择以被应用于EEPROM。数据由写控制电路写入由地址计数器指定的EEPROM中的地址。

4. 发明申请

US20100229378A1 ELECTRONIC COMPONENT MOUNTING APPARATUS AND ELECTRONIC COMPONENT MOUNTING METHOD 有权
标题翻译：电子元件安装设备和电子元件安装方法
公开(公告)号：US20100229378A1
公开(公告)日：2010-09-16
申请号：US12293646
申请日：2007-03-12
申请人： Takashi Uchino , Tadashi Shinozaki , Norifumi Eguchi , Naoki Yamauchi , Masao Hidaka , Toru Nakazono
发明人： Takashi Uchino , Tadashi Shinozaki , Norifumi Eguchi , Naoki Yamauchi , Masao Hidaka , Toru Nakazono
IPC分类号： B23P19/00
CPC分类号： H05K13/0478 , H01L21/67144 , H01L24/29 , H01L24/83 , H01L24/97 , H01L2224/83192 , H01L2224/8385 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/07802 , H05K13/085 , Y10T29/4913 , Y10T29/49131 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183 , H01L2224/83
摘要： A challenge to be met by the present invention is to provide an electronic component mounting apparatus and an electronic component mounting method that enable a reduction in the frequency of operation required with switching of a component type, to thus enhance productivity.In component mount operation for taking chips of component types A, B, and C out of a component supply portion by means of a single mount head and mounting the chips on two substrates held by a first lane and a second lane, when a subsequently-carried-in subsequent substrate has come to be able to undergo component mount operation before completion of processing pertaining to a preceding substrate mount process in which component mount operation is carried out on a previously-carried-in preceding substrate among a plurality of substrates, processing pertaining to a subsequent substrate mount process is started by taking, as mount start components, chips already serving as targets of component mount operation for the preceding substrate at this timing, and processing pertaining to the preceding substrate mount process during which mounting is not yet completed is continually carried out. Thereby, the frequency of operation required with switching of a component type, such as replacement of a nozzle, can be reduced.
摘要翻译：本发明要解决的课题是提供一种电子部件安装装置和电子部件安装方法，其能够降低部件类型的切换所需的操作频率，从而提高生产率。在用于通过单个安装头从组件供应部分中取出组件类型A，B和C的芯片的组件安装操作中，并且将芯片安装在由第一通道和第二通道保持的两个基板上，随后的衬底已经能够在完成与之前的衬底安装工艺相关的处理之前进行组件安装操作，其中在多个衬底之间对先前存在的在前衬底进行组件安装操作，处理关于随后的基板安装工艺，通过作为安装启动部件开始已经作为前面基板的部件安装操作的目标的芯片，以及与之前的基板安装处理有关的处理，其中安装尚未完成不断进行由此，可以减少切换喷嘴等部件的切换所需的操作频率。

5. 发明授权

US07895736B2 Method and apparatus for electronic component mounting 有权
标题翻译：电子部件安装方法和装置
公开(公告)号：US07895736B2
公开(公告)日：2011-03-01
申请号：US12293646
申请日：2007-03-12
申请人： Takashi Uchino , Tadashi Shinozaki , Norifumi Eguchi , Naoki Yamauchi , Masao Hidaka , Toru Nakazono
发明人： Takashi Uchino , Tadashi Shinozaki , Norifumi Eguchi , Naoki Yamauchi , Masao Hidaka , Toru Nakazono
IPC分类号： B23P19/00
CPC分类号： H05K13/0478 , H01L21/67144 , H01L24/29 , H01L24/83 , H01L24/97 , H01L2224/83192 , H01L2224/8385 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/07802 , H05K13/085 , Y10T29/4913 , Y10T29/49131 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183 , H01L2224/83
摘要： A challenge to be met by the present invention is to provide an electronic component mounting apparatus and an electronic component mounting method that enable a reduction in the frequency of operation required with switching of a component type, to thus enhance productivity.In component mount operation for taking chips of component types A, B, and C out of a component supply portion by means of a single mount head and mounting the chips on two substrates held by a first lane and a second lane, when a subsequently-carried-in subsequent substrate has come to be able to undergo component mount operation before completion of processing pertaining to a preceding substrate mount process in which component mount operation is carried out on a previously-carried-in preceding substrate among a plurality of substrates, processing pertaining to a subsequent substrate mount process is started by taking, as mount start components, chips already serving as targets of component mount operation for the preceding substrate at this timing, and processing pertaining to the preceding substrate mount process during which mounting is not yet completed is continually carried out. Thereby, the frequency of operation required with switching of a component type, such as replacement of a nozzle, can be reduced.
摘要翻译：本发明要解决的课题是提供一种电子部件安装装置和电子部件安装方法，其能够降低部件类型的切换所需的操作频率，从而提高生产率。在用于通过单个安装头从组件供应部分中取出组件类型A，B和C的芯片的组件安装操作中，并且将芯片安装在由第一通道和第二通道保持的两个基板上，随后的衬底已经能够在完成与之前的衬底安装工艺相关的处理之前进行组件安装操作，其中在多个衬底之间对先前存在的在前衬底进行组件安装操作，处理关于随后的基板安装工艺，通过作为安装启动部件开始已经作为前面基板的部件安装操作的目标的芯片，以及与之前的基板安装处理有关的处理，其中安装尚未完成不断进行由此，可以减少切换喷嘴等部件的切换所需的操作频率。

6. 发明授权

US5097445A Semiconductor integrated circuit with selective read and write inhibiting 失效
标题翻译：具有选择性读写抑制的半导体集成电路
公开(公告)号：US5097445A
公开(公告)日：1992-03-17
申请号：US450809
申请日：1989-12-14
申请人： Naoki Yamauchi
发明人： Naoki Yamauchi
IPC分类号： G11C17/00 , G06F12/14 , G06F15/78 , G11C8/20 , G11C16/02 , G11C16/10 , H01L21/8247 , H01L29/788 , H01L29/792
CPC分类号： G11C16/10 , G06F12/1425 , G11C8/20
摘要： A semiconductor integrated circuit with a non-volatile memory capable of electric rewriting of data is disclosed. The circuit is provided with inhibiting means for comparing an address of a write inhibition area of the non-volatile memory and an address from an external or internal CPU and inhibiting the writing of data in the area when the two compared addresses coincide, and also comparing an address of a read inhibition area of the non-volatile memory and an address from an external reader/writer and inhibiting the reading of data from the area when the two compared addresses coincide. It is thus possible to prevent erroneous rewriting of a program or protection-required data due to runaway of CPU and also prevent reading of secret data by a third party. Thus, a microcomputer can be realized, in which a program memory and a data memory both consist of non-volatile memories capable of rewriting of data, and which is very easy to use and has improved reliability and confidential property.
摘要翻译：公开了具有能够重写数据的非易失性存储器的半导体集成电路。该电路设置有禁止装置，用于比较非易失性存储器的写入禁止区域的地址和来自外部或内部CPU的地址，并且当两个比较的地址重合时禁止写入该区域中的数据，并且还比较非易失性存储器的读取禁止区域的地址和来自外部读取器/写入器的地址，并且当两个比较的地址重合时禁止从区域读取数据。因此，可以防止程序的错误重写或由于CPU的失控导致的保护要求的数据，并且还防止第三方读取秘密数据。因此，可以实现微型计算机，其中程序存储器和数据存储器都由能够重写数据的非易失性存储器组成，并且其易于使用并具有改进的可靠性和保密性。

7. 发明授权

US06979943B2 Cathode ray tube having magnetic shield with a bent portion 失效
标题翻译：具有带有弯曲部分的磁屏蔽的阴极射线管
公开(公告)号：US06979943B2
公开(公告)日：2005-12-27
申请号：US10258266
申请日：2002-03-14
申请人： Naoki Yamauchi , Hideo Iguchi , Hideharu Omae , Yoshimi Kumei , Tetsuro Ozawa , Yoko Kannan
发明人： Naoki Yamauchi , Hideo Iguchi , Hideharu Omae , Yoshimi Kumei , Tetsuro Ozawa , Yoko Kannan
IPC分类号： H01J29/06 , H01J29/18 , H01J29/80
CPC分类号： H01J29/185 , H01J29/06 , H01J2229/003 , H01J2229/863 , H01J2229/8634
摘要： In a cathode ray tube including a panel provided with a phosphor screen, a funnel integrated with the panel, an electron gun disposed inside the funnel, a magnetic shield (1) for shielding an electron beam (5) emitted from the electron gun against an external magnetic field, and a frame (2) for holding the magnetic shield (1), the magnetic shield (1) includes, at a portion to be joined with the frame (2), a bent portion (20) bent toward a tube axis side, and a thickness T of the bent portion (20) at its edge on the tube axis side is 0.08 mm or less. By making the thickness T small, halation that is liable to occur in a cathode ray tube with a large deflection angle can be suppressed because electron beams reflected from an end face (11) and allowed to reach the screen without being shielded by the frame (2) are reduced.
摘要翻译：在包括设置有荧光屏的面板的阴极射线管中，与面板一体化的漏斗，设置在漏斗内的电子枪，用于屏蔽从电子枪发射的电子束（5）的磁屏蔽（1）外部磁场和用于保持磁屏蔽（1）的框架（2），磁屏蔽（1）在与框架（2）接合的部分处包括弯曲部分（20），弯曲部朝向管弯曲部（20）的管轴侧的边缘的厚度T为0.08mm以下。通过使厚度T小，可以抑制由于从端面（11）反射而被屏幕不被屏幕遮挡的电子束，因此可以抑制易于发生在具有大的偏转角的阴极射线管中的晕差 2）减少。

8. 发明授权

US06825601B2 Color cathode-ray tube 失效
标题翻译：彩色阴极射线管
公开(公告)号：US06825601B2
公开(公告)日：2004-11-30
申请号：US10363610
申请日：2003-03-04
申请人： Naoki Yamauchi , Jun Araya , Hideo Iguchi , Yoshimi Kumei , Masaki Kawasaki , Yoko Kannan
发明人： Naoki Yamauchi , Jun Araya , Hideo Iguchi , Yoshimi Kumei , Masaki Kawasaki , Yoko Kannan
IPC分类号： H01J2980
CPC分类号： H01J29/07 , H01J2229/0716 , H01J2229/0733
摘要： A color cathode-ray tube includes a shadow mask (20) stretched and held with tension applied thereto in one direction. The shadow mask is made of an Invar material. A stress generated in the shadow mask by the tension is 32 MPa or more in a range of ±20 mm with respect to a center position of the shadow mask in a direction orthogonal to a direction in which the tension is applied, and is 26 MPa or more outside the range. By stretching the shadow mask under this stress condition, magnetic shield characteristics are enhanced, and mislanding of an electron beam can be reduced. As a result, a satisfactory color image display can be obtained.
摘要翻译：彩色阴极射线管包括沿一个方向拉伸并保持张力的荫罩（20）。荫罩由Invar材料制成。相对于荫罩的中心位置在与施加张力的方向正交的方向上，通过张力在荫罩中产生的应力在±20mm的范围内为32MPa以上，为26MPa 或超出范围。通过在该应力条件下拉伸荫罩，增强了磁屏蔽特性，并且能够减小电子束的误着地。结果，可以获得令人满意的彩色图像显示。

9. 发明授权

US5428309A Delay circuit 失效
标题翻译：延时电路
公开(公告)号：US5428309A
公开(公告)日：1995-06-27
申请号：US161213
申请日：1993-12-02
申请人： Naoki Yamauchi , Hiroshi Kobayashi
发明人： Naoki Yamauchi , Hiroshi Kobayashi
IPC分类号： G11C11/407 , G11C11/4076 , H03K5/13 , H03K5/131 , H03K5/133 , H03K5/134 , H03L7/099 , H03L7/06 , H03H11/26
CPC分类号： H03L7/0805 , H03L7/0995
摘要： A delay circuit includes a semiconductor chip; a first inverter array formed on said semiconductor chip so as to have a number of first inverters so that it provides a number of delay signals; a second inverter array formed on the semiconductor ship so as to have second inverters, each having the same configuration as that of the first inverters, which are connected to form a ring counter; a phase locked lead-in unit for determining a phase difference between an oscillation output of the second inverter array and a basic clock and converting it into a voltage which is applied as power voltage to the first and second inverter arrays.
摘要翻译：延迟电路包括半导体芯片; 形成在所述半导体芯片上的第一反相器阵列，以便具有多个第一反相器，使得其提供多个延迟信号; 形成在所述半导体船上的第二逆变器阵列，以具有与所述第一反相器相同的配置的第二反相器，所述第二反相器被连接以形成环形计数器; 锁相引入单元，用于确定第二逆变器阵列的振荡输出与基本时钟之间的相位差，并将其转换为作为功率电压施加到第一和第二反相器阵列的电压。

10. 发明授权

US5353435A Microcomputer with circuit for generating multiple pulses each having different frequencies 失效
标题翻译：具有电路的微电脑，用于产生每个具有不同频率的多个脉冲
公开(公告)号：US5353435A
公开(公告)日：1994-10-04
申请号：US864999
申请日：1992-04-08
申请人： Hirokazu Kitagawa , Naoki Yamauchi
发明人： Hirokazu Kitagawa , Naoki Yamauchi
IPC分类号： H03K5/15 , G06F1/06 , G06F1/08
CPC分类号： G06F1/06
摘要： In a microcomputer according to the present invention, output pulse levels are stored in bit coles corresponding to respective addresses of a memory circuit which are outputted from a timer circuit which uses a clock as a count source, and each bit output of the memory circuit is latched in synchronism with the clock and outputted to a port output circuit, so as to obtain a plurality of desired phase pulses having different cycles.
摘要翻译：在根据本发明的微型计算机中，输出脉冲电平被存储在与使用时钟作为计数源的定时器电路输出的存储器电路的相应地址相对应的位列中，存储电路的每个位输出为与时钟同步锁存并输出到端口输出电路，以便获得具有不同周期的多个期望的相位脉冲。

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