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1. 发明授权

US06190834B1 Photosensitive resin composition, and multilayer printed circuit board using the same 失效
标题翻译：感光树脂组合物和使用其的多层印刷电路板
公开(公告)号：US06190834B1
公开(公告)日：2001-02-20
申请号：US09073645
申请日：1998-05-06
申请人： Masatoshi Narahara , Mineo Kawamoto , Tokihito Suwa , Masao Suzuki , Satoru Amou , Akio Takahashi , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
发明人： Masatoshi Narahara , Mineo Kawamoto , Tokihito Suwa , Masao Suzuki , Satoru Amou , Akio Takahashi , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
IPC分类号： G03C173
CPC分类号： C08F290/144 , C08F290/14 , G03F7/0388 , H01L2224/16225 , H05K3/0023 , H05K3/4661 , H05K2201/0133 , Y10S522/905
摘要： The present invention provides a photosensitive resin composition capable of forming an insulating film, which is superior in both a roughening property and an adhesiveness, and a via-hole, which is highly reliable in connection, and a multilayer printed circuit board. The present invention provides a photosensitive resin composition containing a first resin, which is an epoxy resin, and a second resin having a N-substituted carbamic acid ester atomic group and a radical polymeric unsaturated bond in its side chain. The second resin is desirably an oligomer having a repeating unit expressed by the following general formula (chem. 1) or (chem. 3) by 3-10 units. Where, X is H or CH3, Y and Z is H or an alkyl group of carbon number 1-4, n is 0 or 1, a part of R1 is an atomic group expressed by the following general formula (chem. 2), the residual R1 is a hydroxyl group, and R2 is an alkylene group of carbon number 1-4.
摘要翻译：本发明提供能够形成绝缘膜的感光性树脂组合物，其具有优异的粗糙性和粘合性，以及连接高度可靠的通孔以及多层印刷电路板。本发明提供含有作为环氧树脂的第一树脂和在其侧链具有N-取代氨基甲酸酯原子团和自由基聚合不饱和键的第二树脂的感光性树脂组合物。第二树脂理想地是具有由以下通式（化学式1）或（化学式3）表示的重复单元的低聚物3-10单元。其中，X为H或CH3，Y和Z为H或碳数为1-4的烷基，n为0或1，R1的一部分为由以下通式（化学式2）表示的原子团，残基R1为羟基，R2为碳数为1-4的亚烷基。

2. 发明授权

US06306481B1 Multilayer circuit board having insulating layer with via-holes 失效
标题翻译：多层电路板，具有带通孔的绝缘层
公开(公告)号：US06306481B1
公开(公告)日：2001-10-23
申请号：US09337268
申请日：1999-06-22
申请人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
发明人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
IPC分类号： B32B310
CPC分类号： H05K3/0023 , G03F7/038 , H05K1/0373 , H05K3/4644 , H05K2201/0195 , H05K2201/0209 , Y10S428/901 , Y10T428/24322 , Y10T428/24917 , Y10T428/31511 , Y10T428/31529
摘要： A multilayer circuit board having a resolution in the range of 25-80 &mgr;m, and blind via-holes between layers, the blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer having the blind via-holes between the layers has a glass transition temperature in the range of 150-220° C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process are reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes are suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
摘要翻译：具有分辨率在25-80μm的多层电路板和层之间的盲孔，盲孔通孔具有2.0-0.6范围内的纵横比，用于实现层之间的接近，其中绝缘层之间具有盲孔的层具有150-220℃的玻璃化转变温度，并且使用环氧基感光性树脂组合物。得到具有优选的分辨率和耐热性的感光性树脂组合物。提供了一种多层电路板，其中在裸芯片安装工艺中的回流工艺，金线接合工艺和修补工艺的步骤中产生的热应力减小，并且导体布线的剥离和多层的变形在加热过程中由机械应力引起的电路板被抑制。因此，电子设备的尺寸和重量的减小是可能的。

3. 发明授权

US5914216A Multilayer circuit board and photosensitive resin composition used therefor 失效
标题翻译：多层电路板和用于此的光敏树脂组合物
公开(公告)号：US5914216A
公开(公告)日：1999-06-22
申请号：US896456
申请日：1997-07-18
申请人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
发明人： Satoru Amou , Masao Suzuki , Tokihito Suwa , Mineo Kawamoto , Akio Takahashi , Masanori Nemoto , Hiroyuki Fukai , Mitsuo Yokota , Shiro Kobayashi , Masashi Miyazaki
IPC分类号： G03F7/004 , G03F7/038 , H05K1/03 , H05K3/00 , H05K3/46 , G03C1/725
CPC分类号： H05K3/0023 , G03F7/038 , H05K1/0373 , H05K2201/0195 , H05K2201/0209 , H05K3/4644 , Y10S428/901 , Y10T428/24322 , Y10T428/24917 , Y10T428/31511 , Y10T428/31529
摘要： A multilayer circuit board having a resolution in the range of 25-80 .mu.m, and blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer between said layers having the blind via-holes has a glass transition temperature in the range of 150-220.degree. C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process was reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes were suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
摘要翻译：具有25-80μm范围内分辨率的多层电路板和具有2.0-0.6范围内的纵横比的盲孔，以实现层之间的接近，其中所述层之间的绝缘层具有盲通孔的玻璃化转变温度为150〜220℃，使用环氧基感光性树脂组合物。得到具有优选的分辨率和耐热性的感光性树脂组合物。提供一种多层电路板，其中在裸芯片安装工艺中在回流处理，金线接合工艺和修补工艺的步骤中产生的热应力减少，并且导体布线的剥离和多层的变形在加热过程中由机械应力引起的电路板被抑制。因此，电子设备的尺寸和重量的减小是可能的。

4. 发明授权

US5712080A Method for manufacturing printed circuit board 失效
标题翻译：印刷电路板制造方法
公开(公告)号：US5712080A
公开(公告)日：1998-01-27
申请号：US801421
申请日：1997-02-18
申请人： Yuichi Satsu , Haruo Akahoshi , Mineo Kawamoto , Akio Takahashi , Masashi Miyazaki , Toshiaki Ishimaru
发明人： Yuichi Satsu , Haruo Akahoshi , Mineo Kawamoto , Akio Takahashi , Masashi Miyazaki , Toshiaki Ishimaru
IPC分类号： G03F7/004 , G03F7/038 , G03F7/085 , H05K3/00 , H05K3/06 , H05K3/10 , H05K3/18 , H05K3/38
CPC分类号： G03F7/085 , H05K3/108 , H05K2201/0347 , H05K2201/0355 , H05K2203/1105 , H05K2203/124 , H05K3/0076 , H05K3/062 , H05K3/384 , Y10S430/155
摘要： A method for manufacturing printed circuit board by forming wiring pattern by chemical metal plating using a negative pattern made of a photosensitive resin composition layer as the plating resist, wherein the photosensitive resin comprises at least a linear high polymer composed of repeating units expressed by the following general formula (1); ##STR1## where, R.sub.1 is H, an alkyl group having 1-9 carbon atoms, an alkoxy group having 1-9 carbon atoms, and a carboxyalkyl group having 1-9 carbon atoms, R.sub.2 is an alkylene group having 1-9 carbon atoms, and n is the polymerized number of the repeating unit, and an organic compound expressed by the following general formula (2); ##STR2## where, R.sub.3 is H or an alkyl group having 1-6 carbon atoms, X is NH or S, and Z is N or C--Y, where Y is H, NH.sub.2, or SH.
摘要翻译：一种印刷电路板的制造方法，其特征在于，使用由感光性树脂组合物层构成的负极图案，通过化学金属电镀形成配线图案作为电镀抗蚀剂，其特征在于，所述感光性树脂至少含有由以下所示的重复单元构成的直链状高分子通式（1）; 具有1-9个碳原子的烷氧基，具有1-9个碳原子的羧基烷基，R2是具有1-9个碳原子的亚烷基，n是重复单元的聚合数和由以下通式（2）表示的有机化合物。（2）其中，R3为H或具有1-6个碳原子的烷基，X为NH或S，Z为N或C-Y，其中Y为H，NH2或SH。

5. 发明授权

US5294291A Process for the formation of a conductive circuit pattern 失效
标题翻译：用于形成导电电路图案的工艺
公开(公告)号：US5294291A
公开(公告)日：1994-03-15
申请号：US947543
申请日：1992-09-21
申请人： Haruo Akahoshi , Toshinari Takada , Fujiko Yutani , Takeyuki Itabashi , Shin Nishimura , Satoru Amo , Akio Takahashi , Rituji Toba , Masashi Miyazaki
发明人： Haruo Akahoshi , Toshinari Takada , Fujiko Yutani , Takeyuki Itabashi , Shin Nishimura , Satoru Amo , Akio Takahashi , Rituji Toba , Masashi Miyazaki
IPC分类号： G03F7/40 , H05K3/06 , H05K3/10 , H05K3/38 , B44C1/22 , C23F1/00
CPC分类号： H05K3/108 , G03F7/40 , H05K2203/0285 , H05K2203/0392 , H05K2203/072 , H05K2203/0769 , H05K2203/0783 , H05K2203/0789 , H05K2203/1476 , H05K3/062 , H05K3/383
摘要： A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.
摘要翻译：提供了一种在形成在基板上的基底金属上形成导电电路图案的工艺。在基体金属上，首先以与要形成的电路对应的图案设置电镀抗蚀剂，然后通过电镀形成电路图案。用剥离剂处理电镀抗蚀剂，然后用汽提残渣去除剂通过脱水分解反应来切断抗蚀剂中的化学键。用贱金属的蚀刻剂处理贱金属，除去在用剥离残渣去除剂处理后仍然残留的任何抗蚀剂残渣，并在被电镀抗蚀剂覆盖的区域上蚀刻贱金属。

6. 发明授权

US07745926B2 Composite multi-layer substrate and module using the substrate 有权
标题翻译：复合多层基板和使用基板的模块
公开(公告)号：US07745926B2
公开(公告)日：2010-06-29
申请号：US11896013
申请日：2007-08-29
申请人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
发明人： Masashi Miyazaki , Mitsuhiro Takayama , Tatsuro Sawatari
IPC分类号： H01L23/04
CPC分类号： H05K1/185 , H01L23/49822 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/2518 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01037 , H01L2924/01057 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15159 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H05K1/021 , H05K3/445 , H05K3/4641 , H05K2201/0969 , H05K2201/09745 , H01L2924/00
摘要： A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
摘要翻译：一种复合多层基板，包括由具有优异导电性，优异导热性和高刚性的材料形成的平板状芯体，至少覆盖前后树脂层和后树脂层芯构件的表面和通过芯构件的前后侧形成在芯构件中的无底孔，其中电子部件安装在无底孔中，由此，复合多层基板的强度可以通过芯构件的刚性保证，可以消除传统的现有技术的玻璃布，可以避免由离子迁移引起的电特性的劣化，并且将导致降低生产成本。

7. 发明申请

US20090307323A1 APPARATUS AND METHOD FOR SUPPORTING SETTING OF DESTINATION OF EMAIL 审中-公开
标题翻译：支持电子邮件目的地的设备和方法
公开(公告)号：US20090307323A1
公开(公告)日：2009-12-10
申请号：US12475549
申请日：2009-05-31
申请人： Shingo Kato , Masashi Miyazaki , Hiroshige Ochimizu , Masami Tada
发明人： Shingo Kato , Masashi Miyazaki , Hiroshige Ochimizu , Masami Tada
IPC分类号： G06F15/82
CPC分类号： G06Q10/107
摘要： In a client 20, an operation accepting section 22 obtains a primary address entered in an address entry field, and a transmitting section 21 sends the primary address to a mail server 10. In the mail server 10, a receiving section 19 receives the primary address; a message generating section 13 generates a message including out-of-office information corresponding to the primary address; and a transmitting section 11 sends the message to the client 20. In the client 20, a receiving section 29 receives the message, and a display section 24 displays an out-of-office message that a user corresponding to the primary address is away, and thereafter displays detailed information including buttons for setting an alternative address according to a click operation on a specific portion. An address updating section 26a displays an alternative address in the address entry field according to a button click operation.
摘要翻译：在客户端20中，操作接受部分22获得在地址输入字段中输入的主地址，并且发送部分21将主地址发送到邮件服务器10.在邮件服务器10中，接收部分19接收主地址 ; 消息生成部13生成包含与主地址对应的不在办公信息的消息; 并且发送部11将消息发送到客户端20.在客户端20中，接收部分29接收消息，并且显示部分24显示与主地址相对应的用户离开的外出消息，然后根据特定部分的点击操作显示包括用于设置替代地址的按钮的详细信息。地址更新部分26a根据按钮点击操作在地址输入字段中显示替代地址。

8. 发明授权

US07275197B2 Testing apparatus 失效
标题翻译：测试仪器
公开(公告)号：US07275197B2
公开(公告)日：2007-09-25
申请号：US11048632
申请日：2005-02-01
申请人： Kenji Inaba , Masashi Miyazaki
发明人： Kenji Inaba , Masashi Miyazaki
IPC分类号： G01R31/28 , G06F11/00 , G01R27/28
CPC分类号： G01R31/31907 , G01R31/3167 , G01R31/31905 , G01R31/31908 , G01R31/31926 , H04B17/0085 , H04B17/17 , H04B17/20
摘要： A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes an operation order holding unit for holding information indicating that a test operation by a first testing module should be performed before a test operation by a second testing module, a trigger return signal receiving unit for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and a trigger signal supplying unit for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving unit receives the trigger return signal.
摘要翻译：一种测试装置，包括多个测试模块槽，可选地安装有用于测试被测设备的不同类型的测试模块的操作顺序保存单元，用于保存指示应该在第一测试模块之前执行测试操作的信息第二测试模块的测试操作，触发返回信号接收单元，用于从第一测试模块接收触发返回信号，触发返回信号指示第一测试模块已经完成了其测试操作，当测试操作第一测试模块已经完成，并且触发信号提供单元，用于向第二测试模块提供触发信号，触发信号指示第二测试模块应当开始其测试操作，当触发返回信号接收单元接收到触发返回信号。

9. 发明申请

US20050240852A1 Testing apparatus 失效
公开(公告)号：US20050240852A1
公开(公告)日：2005-10-27
申请号：US11048632
申请日：2005-02-01
申请人： Kenji Inaba , Masashi Miyazaki
发明人： Kenji Inaba , Masashi Miyazaki
IPC分类号： G01R31/28 , G01R31/3167 , G01R31/319 , G06F11/00
CPC分类号： G01R31/31907 , G01R31/3167 , G01R31/31905 , G01R31/31908 , G01R31/31926 , H04B17/0085 , H04B17/17 , H04B17/20
摘要： A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a first testing module among the plurality of testing modules should be performed before a test operation by a second testing module among the plurality of testing modules, trigger return signal receiving means for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and trigger signal supplying means for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving means receives the trigger return signal.

10. 发明授权

US08791783B2 Electronic component to be embedded in substrate and component-embedded substrate 有权
标题翻译：嵌入基板和部件嵌入式基板的电子部件
公开(公告)号：US08791783B2
公开(公告)日：2014-07-29
申请号：US13642469
申请日：2011-05-11
申请人： Masashi Miyazaki , Yuichi Sugiyama , Yoshiki Hamada , Yutaka Hata , Hideki Yokota
发明人： Masashi Miyazaki , Yuichi Sugiyama , Yoshiki Hamada , Yutaka Hata , Hideki Yokota
IPC分类号： H01F27/29 , H01F5/00 , H01L27/08
CPC分类号： H01F27/327 , H01F17/0013 , H01F27/29 , H01F2017/0066 , H01L21/568 , H01L24/19 , H01L24/24 , H01L2224/04105 , H01L2224/24227 , H01L2224/73267 , H01L2224/92144 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H05K1/165 , H05K1/185 , H05K3/4602 , H05K3/4608 , H05K2201/0355 , H05K2201/086 , H05K2201/1003 , H05K2201/10636 , H05K2201/10674 , H05K2203/0156 , Y02P70/611 , H01L2924/00
摘要： An electronic component to be embedded in a substrate is configured so that planar coils protected by insulators are sandwiched be a pair of magnetic layers. Ports, or openings or absent parts are provided at predetermined positions of one or both of the magnetic layers, and the predetermined positions correspond to the positions opposite to terminal electrodes of the planar coils. Accordingly, a contribution to reduction of the size and weight of electronic equipment can be made.
摘要翻译：嵌入在基板中的电子部件被配置为使得由绝缘体保护的平面线圈被夹在一对磁性层之间。在一个或两个磁性层的预定位置处提供端口或开口或不存在的部分，并且预定位置对应于与平面线圈的端子电极相对的位置。因此，可以对电子设备的尺寸和重量的减小做出贡献。

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