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1. 发明授权

US07755089B2 Semiconductor device including complementary MOS transistor having a strained Si channel 失效
标题翻译：包括具有应变Si沟道的互补MOS晶体管的半导体器件
公开(公告)号：US07755089B2
公开(公告)日：2010-07-13
申请号：US11858408
申请日：2007-09-20
申请人： Masamichi Suzuki , Masato Koyama
发明人： Masamichi Suzuki , Masato Koyama
IPC分类号： H01L31/112
CPC分类号： H01L21/823807 , H01L21/28079 , H01L21/28097 , H01L21/28194 , H01L21/823842 , H01L29/165 , H01L29/47 , H01L29/4958 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/66636 , H01L29/7843 , H01L29/7845
摘要： A semiconductor device includes a semiconductor substrate, p-type first and n-type second semiconductor regions formed on the substrate so as to be insulated with each other, n-channel and p-channel MOS transistors formed on the first and second semiconductor regions, the n-channel transistor including a first pair of source/drain regions formed on the first semiconductor region, a first gate insulator formed in direct contact with the first semiconductor region and formed as an amorphous insulator containing at least La, and a first gate electrode formed on the first gate insulator, the p-channel MOS transistor including a second pair of source/drain regions formed opposite to each other on the second semiconductor region, a second gate insulator including a silicon oxide film and the amorphous insulating film formed thereon on the second semiconductor region, and a second gate electrode formed on the second gate insulator.
摘要翻译：半导体器件包括半导体衬底，形成在衬底上以彼此绝缘的p型第一和n型第二半导体区，形成在第一和第二半导体区上的n沟道和p沟道MOS晶体管，所述n沟道晶体管包括形成在所述第一半导体区域上的第一对源极/漏极区域，与所述第一半导体区域直接接触形成并形成为至少包含La的非晶绝缘体的第一栅极绝缘体和第一栅极电极形成在所述第一栅极绝缘体上的所述p沟道MOS晶体管，包括在所述第二半导体区域上彼此相对形成的第二对源极/漏极区域，包括氧化硅膜的第二栅极绝缘体和在其上形成的非晶绝缘膜第二半导体区域和形成在第二栅极绝缘体上的第二栅电极。

2. 发明授权

US07348644B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07348644B2
公开(公告)日：2008-03-25
申请号：US11407077
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

3. 发明授权

US07863695B2 Complementary MISFET semiconductor device having an atomic density ratio aluminum/lanthanum (Al/La) in the gate insulating layer of PMIS is larger than that of the NMIS 有权
标题翻译：在PMIS的栅极绝缘层中具有铝/镧原子密度比（Al / La）的互补MISFET半导体器件大于NMIS
公开(公告)号：US07863695B2
公开(公告)日：2011-01-04
申请号：US12200599
申请日：2008-08-28
申请人： Masamichi Suzuki , Masato Koyama , Yoshinori Tsuchiya , Hirotaka Nishino , Reika Ichihara , Akira Takashima
发明人： Masamichi Suzuki , Masato Koyama , Yoshinori Tsuchiya , Hirotaka Nishino , Reika Ichihara , Akira Takashima
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823857 , H01L21/26506 , H01L21/31155 , H01L21/823842 , H01L29/517 , H01L29/665 , H01L29/66545 , H01L29/7842 , H01L29/7846 , H01L29/785
摘要： A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film.
摘要翻译：互补半导体器件包括半导体衬底，形成在半导体衬底的表面上的第一半导体区域，形成在半导体衬底的离开第一半导体区域的表面上的第二半导体区域，具有第一栅极的n-MIS晶体管形成在第一半导体区域上的包括La和Al的绝缘膜和形成在栅极绝缘膜上的第一栅电极和形成在第二半导体区上的具有包括La和Al的第二栅极绝缘膜的p-MIS晶体管，以及形成在所述栅极绝缘膜上的第二栅电极，所述第二栅极绝缘膜中的原子密度比Al / La大于所述第一栅极绝缘膜中的原子密度比Al / La。

4. 发明申请

US20080224226A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20080224226A1
公开(公告)日：2008-09-18
申请号：US11858408
申请日：2007-09-20
申请人： Masamichi Suzuki , Masato Koyama
发明人： Masamichi Suzuki , Masato Koyama
IPC分类号： H01L27/092
CPC分类号： H01L21/823807 , H01L21/28079 , H01L21/28097 , H01L21/28194 , H01L21/823842 , H01L29/165 , H01L29/47 , H01L29/4958 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/66636 , H01L29/7843 , H01L29/7845
摘要： A semiconductor device includes a semiconductor substrate, p-type first and n-type second semiconductor regions formed on the substrate so as to be insulated with each other, n-channel and p-channel MOS transistors formed on the first and second semiconductor regions, the n-channel transistor including a first pair of source/drain regions formed on the first semiconductor region, a first gate insulator formed in direct contact with the first semiconductor region and formed as an amorphous insulator containing at least La, and a first gate electrode formed on the first gate insulator, the p-channel MOS transistor including a second pair of source/drain regions formed opposite to each other on the second semiconductor region, a second gate insulator including a silicon oxide film and the amorphous insulating film formed thereon on the second semiconductor region, and a second gate electrode formed on the second gate insulator.
摘要翻译：半导体器件包括半导体衬底，形成在衬底上以彼此绝缘的p型第一和n型第二半导体区，形成在第一和第二半导体区上的n沟道和p沟道MOS晶体管，所述n沟道晶体管包括形成在所述第一半导体区域上的第一对源极/漏极区域，与所述第一半导体区域直接接触形成并形成为至少包含La的非晶绝缘体的第一栅极绝缘体和第一栅极电极形成在所述第一栅极绝缘体上的所述p沟道MOS晶体管，包括在所述第二半导体区域上彼此相对形成的第二对源极/漏极区域，包括氧化硅膜的第二栅极绝缘体和在其上形成的非晶绝缘膜第二半导体区域和形成在第二栅极绝缘体上的第二栅电极。

5. 发明授权

US07075158B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07075158B2
公开(公告)日：2006-07-11
申请号：US11244295
申请日：2005-10-06
申请人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
发明人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
IPC分类号： H01L29/76
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.
摘要翻译：可以制造具有低电阻的半导体器件，其器件特性不变化。半导体器件包括硅层，形成在硅层上的栅极电介质膜，形成在栅极电介质膜上的栅电极，并且包括部分结晶的氮化金属硅化物层，以及形成在栅电极两侧的硅层。

6. 发明授权

US07300838B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07300838B2
公开(公告)日：2007-11-27
申请号：US11407066
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L21/8238
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

7. 发明申请

US20090114995A1 COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：补充半导体器件及其制造方法
公开(公告)号：US20090114995A1
公开(公告)日：2009-05-07
申请号：US12200599
申请日：2008-08-28
申请人： Masamichi Suzuki , Masato Koyama , Yoshinori Tsuchiya , Hirotaka Nishino , Reika Ichihara , Akira Takashima
发明人： Masamichi Suzuki , Masato Koyama , Yoshinori Tsuchiya , Hirotaka Nishino , Reika Ichihara , Akira Takashima
IPC分类号： H01L27/08 , H01L21/3205
CPC分类号： H01L21/823857 , H01L21/26506 , H01L21/31155 , H01L21/823842 , H01L29/517 , H01L29/665 , H01L29/66545 , H01L29/7842 , H01L29/7846 , H01L29/785
摘要： A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film.
摘要翻译：互补半导体器件包括半导体衬底，形成在半导体衬底的表面上的第一半导体区域，形成在半导体衬底的离开第一半导体区域的表面上的第二半导体区域，具有第一栅极的n-MIS晶体管形成在第一半导体区域上的包括La和Al的绝缘膜和形成在栅极绝缘膜上的第一栅电极和形成在第二半导体区上的具有包括La和Al的第二栅极绝缘膜的p-MIS晶体管，以及形成在所述栅极绝缘膜上的第二栅电极，所述第二栅极绝缘膜中的原子密度比Al / La大于所述第一栅极绝缘膜中的原子密度比Al / La。

8. 发明申请

US20060186489A1 Semiconductor device and method of manufacturing semiconductor device 有权
公开(公告)号：US20060186489A1
公开(公告)日：2006-08-24
申请号：US11407077
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.

9. 发明授权

US07053455B2 Semiconductor device and method of manufacturing semiconductor device 有权
公开(公告)号：US07053455B2
公开(公告)日：2006-05-30
申请号：US10772280
申请日：2004-02-06
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94 , H01L31/62
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.

10. 发明申请

US20060186488A1 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060186488A1
公开(公告)日：2006-08-24
申请号：US11407066
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

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